architecture trb_net16_api_ipu_streaming_arch of trb_net16_api_ipu_streaming is
+ attribute syn_hier : string;
+ attribute syn_hier of trb_net16_iobuf_arch : architecture is "firm";
+
signal APL_CTS_TARGET_ADDRESS : std_logic_vector(15 downto 0) := x"FFFF";
signal APL_CTS_DATA_OUT : std_logic_vector(15 downto 0);
signal APL_CTS_PACKET_NUM_OUT : std_logic_vector(2 downto 0);
signal end_of_data_reached : std_logic;
signal data_counter : signed(17 downto 0);
signal data_length : signed(17 downto 0);
+ signal buf_FEE_DATAREADY_OUT : std_logic;
begin
APL_FEE_SEND_IN <= cts_start_readout_rising;
APL_FEE_READ_IN <= '1' when FEE_READ_IN = '1' or (APL_FEE_TYP_OUT /= TYPE_DAT) or end_of_data_reached = '1' else '0';
- FEE_DATAREADY_OUT <= APL_FEE_DATAREADY_OUT when APL_FEE_TYP_OUT = TYPE_DAT and end_of_data_reached = '0' else '0';
+ buf_FEE_DATAREADY_OUT <= APL_FEE_DATAREADY_OUT when APL_FEE_TYP_OUT = TYPE_DAT and end_of_data_reached = '0' else '0';
FEE_DATA_OUT <= APL_FEE_DATA_OUT;
FEE_BUSY_OUT <= APL_FEE_RUN_OUT;
APL_FEE_ERROR_PATTERN_IN(23 downto 16) <= buf_CTS_CODE_OUT;
APL_FEE_ERROR_PATTERN_IN(31 downto 24) <= buf_CTS_INFORMATION_OUT(7 downto 0);
APL_FEE_DTYPE_IN <= buf_CTS_READOUT_TYPE_OUT;
+ FEE_DATAREADY_OUT <= buf_FEE_DATAREADY_OUT;
CTS_NUMBER_OUT <= buf_CTS_NUMBER_OUT;
CTS_INFORMATION_OUT <= buf_CTS_INFORMATION_OUT;
begin
if rising_edge(CLK) then
if RESET = '1' or APL_FEE_RUN_OUT = '0' then
- data_counter <= to_signed(-4,18);
- elsif APL_FEE_DATAREADY_OUT = '1' and APL_FEE_TYP_OUT = TYPE_DAT then
+ data_counter <= to_signed(-3,18);
+ end_of_data_reached <= '0';
+ elsif APL_FEE_READ_IN = '1' and buf_FEE_DATAREADY_OUT = '1' then
data_counter <= data_counter + 1;
+ if data_counter = data_length then
+ end_of_data_reached <= '1';
+ end if;
end if;
end if;
end process;
begin
if rising_edge(CLK) then
if RESET = '1' or APL_FEE_RUN_OUT = '0' then
- end_of_data_reached <= '0';
data_length <= to_signed(0,18);
- elsif APL_FEE_DATAREADY_OUT = '1' and APL_FEE_TYP_OUT = TYPE_DAT and data_counter = to_signed(-2,18) then
+ elsif buf_FEE_DATAREADY_OUT = '1' and data_counter = to_signed(-1,18) then
data_length <= signed('0' & APL_FEE_DATA_OUT & '0');
- elsif data_counter = data_length then
- end_of_data_reached <= '1';
end if;
end if;
end process;
signal IOBUF_CTRL_GEN : std_logic_vector ((MII_NUMBER*2**(c_MUX_WIDTH-1))*32-1 downto 0);
signal IOBUF_STAT_INIT_OBUF_DEBUG : std_logic_vector ((MII_NUMBER*2**(c_MUX_WIDTH-1))*32-1 downto 0);
signal IOBUF_STAT_REPLY_OBUF_DEBUG : std_logic_vector ((MII_NUMBER*2**(c_MUX_WIDTH-1))*32-1 downto 0);
+ signal IOBUF_STAT_DATA_COUNTER : std_logic_vector ((MII_NUMBER*2**(c_MUX_WIDTH-1))*32-1 downto 0);
signal resync : std_logic_vector(MII_NUMBER-1 downto 0);
signal reset_i : std_logic;
signal stream_port_connected : std_logic;
+ signal stat_packets_addr : std_logic_vector(4 downto 0);
+ signal stat_packets_read : std_logic;
+ signal stat_packets_write : std_logic;
+ signal stat_packets_data : std_logic_vector(31 downto 0);
+ signal stat_packets_ready : std_logic;
+ signal stat_packets_unknown : std_logic;
+ signal stat_packets_ack : std_logic;
+ signal stat_packets_all : std_logic_vector(32*32-1 downto 0);
+
+ signal stat_errorbits_addr : std_logic_vector(3 downto 0);
+ signal stat_errorbits_read : std_logic;
+ signal stat_errorbits_write : std_logic;
+ signal stat_errorbits_data : std_logic_vector(31 downto 0);
+ signal stat_errorbits_ready : std_logic;
+ signal stat_errorbits_unknown : std_logic;
+
+ signal iobuf_ctrl_stat : std_logic_vector(63 downto 0);
+ signal iobuf_reset_ipu_counter : std_logic;
+ signal iobuf_reset_sctrl_counter : std_logic;
+
attribute syn_preserve : boolean;
attribute syn_keep : boolean;
attribute syn_preserve of m_DATA_IN : signal is true;
--generate media resync
gen_resync : for i in 0 to MII_NUMBER-1 generate
resync(i) <= MED_STAT_OP(i*16+15) when MII_IS_UPLINK(i) = c_YES else '0';
- MED_CTRL_OP(13+i*16 downto i*16) <= (others => '0');
- MED_CTRL_OP(14+i*16) <= HUB_CTRL_media_interfaces_off(i);
- MED_CTRL_OP(15+i*16) <= combined_resync or local_network_reset(i) when MII_IS_UPLINK(i) = 0 else combined_resync;
+ proc_SYNC_CTRL_OP : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ MED_CTRL_OP(13+i*16 downto i*16) <= (others => '0');
+ MED_CTRL_OP(14+i*16) <= HUB_CTRL_media_interfaces_off(i);
+ if MII_IS_UPLINK(i) = 0 then
+ MED_CTRL_OP(15+i*16) <= combined_resync or local_network_reset(i);
+ else
+ MED_CTRL_OP(15+i*16) <= combined_resync;
+ end if;
+ end if;
+ end process;
end generate;
combined_resync <= or_all(resync);
-- Status and control port
STAT_GEN => IOBUF_STAT_GEN((i+1)*32-1 downto i*32),
STAT_IBUF_BUFFER => IOBUF_IBUF_BUFFER((i+1)*32-1 downto i*32),
+ STAT_DATA_COUNTER => IOBUF_STAT_DATA_COUNTER((i+1)*32-1 downto i*32),
CTRL_GEN => IOBUF_CTRL_GEN((i+1)*32-1 downto i*32),
CTRL_OBUF_settings( 3 downto 0) => HUB_CTRL_TIMEOUT_TIME(k*4+19 downto k*4+16),
CTRL_OBUF_settings(15 downto 4) => (others => '0'),
STAT_INIT_OBUF_DEBUG => IOBUF_STAT_INIT_OBUF_DEBUG((i+1)*32-1 downto i*32),
STAT_REPLY_OBUF_DEBUG => IOBUF_STAT_REPLY_OBUF_DEBUG((i+1)*32-1 downto i*32),
TIMER_TICKS_IN(0) => timer_us_tick,
- TIMER_TICKS_IN(1) => timer_ms_tick
+ TIMER_TICKS_IN(1) => timer_ms_tick,
+ CTRL_STAT => iobuf_ctrl_stat(k*16+15 downto k*16)
);
end generate;
gen_trmbuf: if HUB_USED_CHANNELS(k) = 0 generate
THE_BUS_HANDLER : trb_net16_regio_bus_handler
generic map(
- PORT_NUMBER => 1,
- PORT_ADDRESSES => (0 => x"8000", others => x"0000"),
- PORT_ADDR_MASK => (0 => 15, others => 0)
+ PORT_NUMBER => 3,
+ PORT_ADDRESSES => (0 => x"8000", 1 => x"4000", 2 => x"4020", others => x"0000"),
+ PORT_ADDR_MASK => (0 => 15, 1 => 5, 2 => 4, others => 0)
)
port map(
CLK => CLK,
BUS_NO_MORE_DATA_IN(0) => REGIO_NO_MORE_DATA_IN,
BUS_UNKNOWN_ADDR_IN(0) => REGIO_UNKNOWN_ADDR_IN,
+ BUS_ADDR_OUT(20 downto 16) => stat_packets_addr,
+ BUS_ADDR_OUT(31 downto 21) => open,
+ BUS_DATA_OUT(63 downto 32) => open,
+ BUS_READ_ENABLE_OUT(1) => stat_packets_read,
+ BUS_WRITE_ENABLE_OUT(1) => stat_packets_write,
+ BUS_TIMEOUT_OUT(1) => open,
+ BUS_DATA_IN(63 downto 32) => stat_packets_data,
+ BUS_DATAREADY_IN(1) => stat_packets_ready,
+ BUS_WRITE_ACK_IN(1) => stat_packets_ack,
+ BUS_NO_MORE_DATA_IN(1) => '0',
+ BUS_UNKNOWN_ADDR_IN(1) => stat_packets_unknown,
+
+ BUS_ADDR_OUT(35 downto 32) => stat_errorbits_addr,
+ BUS_ADDR_OUT(47 downto 36) => open,
+ BUS_DATA_OUT(95 downto 64) => open,
+ BUS_READ_ENABLE_OUT(2) => stat_errorbits_read,
+ BUS_WRITE_ENABLE_OUT(2) => stat_errorbits_write,
+ BUS_TIMEOUT_OUT(2) => open,
+ BUS_DATA_IN(95 downto 64) => stat_errorbits_data,
+ BUS_DATAREADY_IN(2) => stat_errorbits_ready,
+ BUS_WRITE_ACK_IN(2) => '0',
+ BUS_NO_MORE_DATA_IN(2) => '0',
+ BUS_UNKNOWN_ADDR_IN(2) => stat_packets_unknown,
+
STAT_DEBUG => open
);
buf_HC_STAT_REGS(7*32-1 downto 6*32+17) <= (others => '0');
buf_HC_STAT_REGS(8*32-1 downto 7*32) <= stat_ipu_fsm;
buf_HC_STAT_REGS(16*32-1 downto 12*32) <= HC_STAT_ack_waiting;
- buf_HC_STAT_REGS(32*32-1 downto 16*32) <= HUB_ERROR_BITS(16*32-1 downto 0);
+ buf_HC_STAT_REGS(32*32-1 downto 16*32) <= (others => '0');
buf_HC_STAT_REGS(36*32-1 downto 32*32) <= HUB_STAT_ERRORBITS;
buf_HC_STAT_REGS(64*32-1 downto 36*32) <= (others => '0');
buf_HC_STAT_REGS(6*32+i) <= '1' when (i < MII_NUMBER or (i = MII_NUMBER and INT_NUMBER > 0)) and MII_IS_DOWNLINK(i) = 1 else '0';
end generate;
- loop_links_2 : for i in 0 to 15 generate
- HUB_ERROR_BITS(i*32+7 downto i*32+0) <= buf_HUB_ALL_ERROR_BITS(i*32+7 downto i*32+0);
- HUB_ERROR_BITS(i*32+15 downto i*32+8) <= buf_HUB_ALL_ERROR_BITS(i*32+23 downto i*32+16);
- HUB_ERROR_BITS(i*32+23 downto i*32+16) <= buf_HUB_ALL_ERROR_BITS(i*32+32*16+7 downto i*32+32*16+0);
- HUB_ERROR_BITS(i*32+31 downto i*32+24) <= buf_HUB_ALL_ERROR_BITS(i*32+32*16+23 downto i*32+32*16+16);
- end generate;
+
PROC_TIMEOUT : process(CLK)
begin
if rising_edge(CLK) then
reg_STROBES <= STAT_REG_STROBE;
if reg_STROBES(8) = '1' then
- HC_STAT_REGS(8*32+31 downto 8*32) <= (others => '0');
+ buf_HC_STAT_REGS(8*32+31 downto 8*32) <= (others => '0');
else
- HC_STAT_REGS(8*32+31 downto 8*32) <= STAT_TIMEOUT(0*32+31 downto 0*32) or buf_HC_STAT_REGS(8*32+31 downto 8*32);
+ buf_HC_STAT_REGS(8*32+31 downto 8*32) <= STAT_TIMEOUT(0*32+31 downto 0*32) or buf_HC_STAT_REGS(8*32+31 downto 8*32);
end if;
if reg_STROBES(9) = '1' then
- HC_STAT_REGS(9*32+31 downto 9*32) <= (others => '0');
+ buf_HC_STAT_REGS(9*32+31 downto 9*32) <= (others => '0');
else
- HC_STAT_REGS(9*32+31 downto 9*32) <= STAT_TIMEOUT(1*32+31 downto 1*32) or buf_HC_STAT_REGS(9*32+31 downto 9*32);
+ buf_HC_STAT_REGS(9*32+31 downto 9*32) <= STAT_TIMEOUT(1*32+31 downto 1*32) or buf_HC_STAT_REGS(9*32+31 downto 9*32);
end if;
if reg_STROBES(10) = '1' then
- HC_STAT_REGS(10*32+31 downto 10*32) <= (others => '0');
+ buf_HC_STAT_REGS(10*32+31 downto 10*32) <= (others => '0');
else
- HC_STAT_REGS(10*32+31 downto 10*32) <= STAT_TIMEOUT(2*32+31 downto 2*32) or buf_HC_STAT_REGS(10*32+31 downto 10*32);
+ buf_HC_STAT_REGS(10*32+31 downto 10*32) <= STAT_TIMEOUT(2*32+31 downto 2*32) or buf_HC_STAT_REGS(10*32+31 downto 10*32);
end if;
if reg_STROBES(11) = '1' then
- HC_STAT_REGS(11*32+31 downto 11*32) <= (others => '0');
+ buf_HC_STAT_REGS(11*32+31 downto 11*32) <= (others => '0');
else
- HC_STAT_REGS(11*32+31 downto 11*32) <= STAT_TIMEOUT(3*32+31 downto 3*32) or buf_HC_STAT_REGS(11*32+31 downto 11*32);
+ buf_HC_STAT_REGS(11*32+31 downto 11*32) <= STAT_TIMEOUT(3*32+31 downto 3*32) or buf_HC_STAT_REGS(11*32+31 downto 11*32);
end if;
if reg_STROBES(36) = '1' then
end if;
end process;
+ HC_STAT_REGS(11*32+31 downto 8*32) <= buf_HC_STAT_REGS(11*32+31 downto 8*32);
PROC_REG_STAT_REGS : process(CLK)
begin
if rising_edge(CLK) then
HC_STAT_REGS(8*32-1 downto 0) <= buf_HC_STAT_REGS(8*32-1 downto 0);
HC_STAT_REGS(31*32-1 downto 12*32) <= buf_HC_STAT_REGS(31*32-1 downto 12*32);
- HC_STAT_REGS(64*32-1 downto 37*32) <= buf_HC_STAT_REGS(64*32-1 downto 37*32);
+ HC_STAT_REGS(48*32-1 downto 37*32) <= buf_HC_STAT_REGS(48*32-1 downto 37*32);
+ HC_STAT_REGS(64*32-1 downto 48*32) <= buf_HC_STAT_REGS(64*32-1 downto 48*32);
+ end if;
+ end process;
+
+------------------------------------
+--STAT error bits
+------------------------------------
+ loop_links_2 : for i in 0 to 15 generate
+ HUB_ERROR_BITS(i*32+7 downto i*32+0) <= buf_HUB_ALL_ERROR_BITS(i*32+7 downto i*32+0);
+ HUB_ERROR_BITS(i*32+15 downto i*32+8) <= buf_HUB_ALL_ERROR_BITS(i*32+23 downto i*32+16);
+ HUB_ERROR_BITS(i*32+23 downto i*32+16) <= buf_HUB_ALL_ERROR_BITS(i*32+32*16+7 downto i*32+32*16+0);
+ HUB_ERROR_BITS(i*32+31 downto i*32+24) <= buf_HUB_ALL_ERROR_BITS(i*32+32*16+23 downto i*32+32*16+16);
+ end generate;
+
+ PROC_ERROR_BITS : process(CLK, stat_errorbits_addr)
+ variable tmp : integer;
+ begin
+ tmp := to_integer(unsigned(stat_errorbits_addr));
+ if rising_edge(CLK) then
+ stat_errorbits_unknown <= stat_errorbits_write;
+ stat_errorbits_ready <= stat_errorbits_read;
+ stat_errorbits_data <= HUB_ERROR_BITS(tmp*32+31 downto tmp*32);
end if;
end process;
+------------------------------------
+--STAT packet counters
+------------------------------------
+ gen_packet_cnt : for i in 0 to MII_NUMBER-1 generate
+ stat_packets_all(i*32+31 downto i*32) <= IOBUF_STAT_DATA_COUNTER(i*128+63 downto i*128+32);
+ stat_packets_all((i+16)*32+31 downto (i+16)*32) <= IOBUF_STAT_DATA_COUNTER(i*128+127 downto i*128+96);
+ end generate;
+ stat_packets_all(16*32-1 downto MII_NUMBER*32) <= (others => '0');
+ stat_packets_all(32*32-1 downto (MII_NUMBER+16)*32) <= (others => '0');
+ PROC_PACKET_COUNTERS : process(CLK, stat_packets_addr)
+ variable tmp : integer;
+ begin
+ tmp := to_integer(unsigned(stat_packets_addr));
+ if rising_edge(CLK) then
+ iobuf_reset_ipu_counter <= '0';
+ iobuf_reset_sctrl_counter <= '0';
+ stat_packets_unknown <= '0';
+ stat_packets_ack <= '0';
+ stat_packets_ready <= stat_packets_read;
+ stat_packets_data <= stat_packets_all(tmp*32+31 downto tmp*32);
+ if stat_packets_addr = "00000" and stat_packets_write = '1' then
+ stat_packets_ack <= '1';
+ iobuf_reset_ipu_counter <= '1';
+ elsif stat_packets_addr = "10000" and stat_packets_write = '1' then
+ stat_packets_ack <= '1';
+ iobuf_reset_sctrl_counter <= '1';
+ elsif stat_packets_write = '1' then
+ stat_packets_unknown <= stat_packets_write;
+ end if;
+ end if;
+ end process;
+
+------------------------------------
--Control Registers
+------------------------------------
HUB_CTRL_media_interfaces_off <= HC_CTRL_REGS(2**2*32+31 downto 2**2*32);
HUB_CTRL_LOCAL_NETWORK_RESET <= HC_CTRL_REGS(7*32+MII_NUMBER-1 downto 7*32);
HC_STAT_ack_waiting(64+31 downto 64+MII_NUMBER) <= (others => '0');
HC_STAT_ack_waiting(96+31 downto 96+MII_NUMBER) <= (others => '0');
- stream_port_connected <= '1' when CTRL_DEBUG(2 downto 0) = (not ERROR_OK) else '0';
+ stream_port_connected <= '1' when CTRL_DEBUG(2 downto 0) = (not ERROR_OK) else '0';
+---------------------------------------------------------------------
+-- Counter reset signals
+---------------------------------------------------------------------
+ iobuf_ctrl_stat(15 downto 0) <= (others => '0');
+ iobuf_ctrl_stat(16) <= iobuf_reset_ipu_counter;
+ iobuf_ctrl_stat(47 downto 17) <= (others => '0');
+ iobuf_ctrl_stat(48) <= iobuf_reset_sctrl_counter;
+ iobuf_ctrl_stat(63 downto 49) <= (others => '0');
---------------------------------------------------------------------
--Debugging Signals
use work.trb_net_std.all;
use work.trb_net_components.all;
+--CTRL_STAT(0) : reset packet counter in IBUF
entity trb_net16_iobuf is
generic (
CTRL_OBUF_settings : in std_logic_vector (31 downto 0) := (others => '0'); --0..15 for init, 16..31 for reply
STAT_INIT_OBUF_DEBUG : out std_logic_vector (31 downto 0);
STAT_REPLY_OBUF_DEBUG : out std_logic_vector (31 downto 0);
- TIMER_TICKS_IN : in std_logic_vector (1 downto 0) := "00"
+ STAT_BUFFER_COUNTER : out std_logic_vector (31 downto 0);
+ STAT_DATA_COUNTER : out std_logic_vector (31 downto 0);
+ TIMER_TICKS_IN : in std_logic_vector (1 downto 0) := "00";
+ CTRL_STAT : in std_logic_vector (15 downto 0) := x"0000"
);
end entity;
signal INITOBUF_stat_buffer, INITOBUF_ctrl_buffer: STD_LOGIC_VECTOR (31 downto 0);
signal REPLYOBUF_stat_buffer, REPLYOBUF_ctrl_buffer: STD_LOGIC_VECTOR (31 downto 0);
signal ibuf_dataready_in, ibuf_read_out : std_logic;
- signal STAT_BUFFER_COUNTER : std_logic_vector (31 downto 0);
+ signal buf_stat_buffer_counter : std_logic_vector (31 downto 0);
+ signal buf_stat_data_counter : std_logic_vector (31 downto 0);
begin
GEN_IBUF: if IBUF_DEPTH>0 generate
INT_REPLY_PACKET_NUM_OUT => INT_REPLY_PACKET_NUM_OUT,
INT_REPLY_READ_IN => INT_REPLY_READ_IN,
INT_ERROR_OUT => IBUF_error,
- STAT_BUFFER_COUNTER => STAT_BUFFER_COUNTER,
- STAT_BUFFER(31 downto 0) => IBUF_stat_buffer
+ STAT_BUFFER_COUNTER => buf_stat_buffer_counter,
+ STAT_DATA_COUNTER => buf_stat_data_counter,
+ STAT_BUFFER(31 downto 0) => IBUF_stat_buffer,
+ CTRL_STAT => CTRL_STAT
);
end generate;
-- build the CTRL register of the OBUFs
INITOBUF_ctrl_buffer(9 downto 0) <= IBUF_stat_buffer(9 downto 0);
INITOBUF_ctrl_buffer(15 downto 10) <= (others => '0');
- INITOBUF_ctrl_buffer(31 downto 16) <= STAT_BUFFER_COUNTER(15 downto 0);
+ INITOBUF_ctrl_buffer(31 downto 16) <= buf_stat_buffer_counter(15 downto 0);
REPLYOBUF_ctrl_buffer(7 downto 0) <= IBUF_stat_buffer(7 downto 0);
REPLYOBUF_ctrl_buffer(9 downto 8) <= IBUF_stat_buffer(11 downto 10);
REPLYOBUF_ctrl_buffer(15 downto 10) <= (others => '0');
- REPLYOBUF_ctrl_buffer(31 downto 16) <= STAT_BUFFER_COUNTER(31 downto 16);
+ REPLYOBUF_ctrl_buffer(31 downto 16) <= buf_stat_buffer_counter(31 downto 16);
STAT_GEN <= (others => '0');
+ STAT_BUFFER_COUNTER <= buf_stat_buffer_counter;
+ STAT_DATA_COUNTER <= buf_stat_data_counter;
end architecture;