corrected clock names in the constraints

diff --git a/base/cbmtof.lpf b/base/cbmtof.lpf
index 106afc9fe5ae2c5738df31ec6bf4d729d0caf4de..9434a9143e0728d3f1c99daa77385c220c32d490 100644 (file)
--- a/base/cbmtof.lpf
+++ b/base/cbmtof.lpf
@@ -16,8 +16,8 @@ FREQUENCY PORT CLK_EXT 200 MHz;
 #MULTICYCLE FROM CLKNET "clk_100_i_c" TO CLKNET "CLK_OSC_c" 2 X ;
 ##MULTICYCLE FROM CLKNET "CLK_OSC_c" TO CLKNET "clk_100_i_c" 1 X ;
 
-MULTICYCLE FROM CLKNET "clk_100_i_c" TO CLKNET "CLK_EXT" 2 X ;
-#MULTICYCLE FROM CLKNET "CLK_EXT" TO CLKNET "clk_100_i_c" 1 X ;
+MULTICYCLE FROM CLKNET "clk_100_i_c" TO CLKNET "CLK_EXT_c" 1 X ;
+MULTICYCLE FROM CLKNET "CLK_EXT_c" TO CLKNET "clk_100_i_c" 2 X ;
 
 LOCATE COMP   "THE_MEDIA_UPLINK/gen_serdes_0_200_ctc.THE_SERDES/PCSD_INST" SITE "PCSA" ;
 

diff --git a/cbmtof/unimportant_lines_constraints.lpf b/cbmtof/unimportant_lines_constraints.lpf
index c6b7e101f4510e6a7d47d080e79f355db045b0e7..30e7c73d604125f94894e80b5607bc58e271b409 100644 (file)
--- a/cbmtof/unimportant_lines_constraints.lpf
+++ b/cbmtof/unimportant_lines_constraints.lpf
@@ -8,8 +8,8 @@ MULTICYCLE FROM CELL "PROC_TDC_CTRL_REG*tdc_ctrl_reg*" 4x;
 MULTICYCLE TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/SimAdderNo*FC/FF*" 4x;
 MULTICYCLE TO CELL "THE_TDC/ReferenceChannel/Channel200/SimAdderNo*FC/FF*" 4x;
 
-MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET CLK_PCLK_LEFT_c TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_100_i_c 2x;
-MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET CLK_PCLK_LEFT_c TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_100_i_c 2x;
+MULTICYCLE FROM CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET CLK_EXT_c TO CELL "THE_TDC/GEN_Channels*Channels/Channel200/RingBuffer*FIFO/*" CLKNET clk_100_i_c 2x;
+MULTICYCLE FROM CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET CLK_EXT_c TO CELL "THE_TDC/ReferenceChannel/Channel200/RingBuffer*FIFO/*" CLKNET clk_100_i_c 2x;
 
 MULTICYCLE TO CELL "THE_TDC/GEN_Channels*Channels/sync_q*" 4 x;
 MULTICYCLE TO CELL "THE_TDC/ReferenceChannel/sync_q*" 4 x;