+
+--Ports:
+-- LVL1/IPU SCtrl
+-- 0 FPGA 1 FPGA 1
+-- 1 FPGA 2 FPGA 2
+-- 2 FPGA 3 FPGA 3
+-- 3 FPGA 4 FPGA 4
+-- 4 opt. link opt. link
+-- 5-7 SFP 2-4
+-- 5(8) CTS read-out internal 0 1 - X X O --downlink only
+-- 6(9) CTS TRG Sctrl GbE 2 3 4 X X X --uplink only
+
type hub_mii_t is array(0 to 1) of integer;
type hub_ct is array(0 to 16) of integer;
type hub_cfg_t is array(0 to 1) of hub_ct;
- type hw_info_t is array(0 to 1) of std_logic_vector(31 downto 0);
-
+ type hw_info_t is array(0 to 1) of std_logic_vector(31 downto 0);
+
--this is used to select the proper configuration in the main code
constant CFG_MODE : integer;
constant INTERNAL_NUM_ARR : hub_mii_t := (5,5);
constant INTERFACE_NUM_ARR : hub_mii_t := (5,8);
constant IS_UPLINK_ARR : hub_cfg_t := ((0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0),
- (0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0,0));
+ (0,0,0,0,1,0,0,0,0,1,0,0,0,0,0,0,0));
constant IS_DOWNLINK_ARR : hub_cfg_t := ((1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0),
- (1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0));
+ (1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0));
constant IS_UPLINK_ONLY_ARR : hub_cfg_t := ((0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0),
- (0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0));
- constant HARDWARE_INFO_ARR : hw_info_t := (x"9000CEE0",x"9000CEE2");
+ (0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0));
+ constant HARDWARE_INFO_ARR : hw_info_t := (x"9000CEE0",x"9000CEE2");
constant INTERNAL_NUM : integer;
constant INTERFACE_NUM : integer;
constant IS_UPLINK : hub_ct;
constant IS_DOWNLINK : hub_ct;
constant IS_UPLINK_ONLY : hub_ct;
- constant HARDWARE_INFO : std_logic_vector(31 downto 0);
+ constant HARDWARE_INFO : std_logic_vector(31 downto 0);
-- MII_NUMBER => 5, --(8)
-- INT_NUMBER => 5,