adc.pl: First step to full ADC testing

diff --git a/tools/adc.pl b/tools/adc.pl
index edd0812dd480562be978ffdbe91b373e1d83e4b4..791251ff31a59e78801efcf15462907b6db178db 100755 (executable)
--- a/tools/adc.pl
+++ b/tools/adc.pl
@@ -19,11 +19,13 @@ unless(defined $ARGV[0] && defined $ARGV[1]) {
   print 'usage: adc.pl $FPGA $cmd',"\n\n";
   print "\t time\t\t read compile time of MachXO firmware\n";
   print "\t",' led [$value]',"\t set/read onboard LEDs controlled by MachXO\n";
-  print "\t init_lmk\t init the clock chip\n";
+  print "\t",' init',"\t init LMK/ADC and set clock phase\n";
+  print "\t",' lmk_init',"\t init the clock chip\n";
   print "\t",' adc_init',"\t power up and initialize ADC\n";
   print "\t",' adc_reg $addr $val',"\t write to register of all ADCs, arguments are oct()'ed\n";
   print "\t",' adc_testio $id',"\t enable testio of all ADCs, id=0 disables\n";
   print "\t",' adc_phase $phase',"\t set the clock-data output phase\n";
+  print "\t",' adc_testall',"\t test all ADC channels with patterns\n";
   exit;
 }
 
@@ -76,6 +78,8 @@ sub sendcmd_bitbang {
 
 
 sub adc_init {
+  print ">>> Power-up and init of ADC\n";
+
   #power down
   trb_register_write($board,0xa080,0x40);
   usleep(200000);
@@ -92,13 +96,14 @@ sub adc_init {
   #send commands (at least 1 needed!)
   sendcmd_adc(0x0d,0x00);
   sendcmd_adc(0xff,0x01);
-  }
+
+  print ">>> ADC initialized\n";
+}
 
 if ($ARGV[1] eq "adc_init") {
-  print "Power-up and init of ADC\n";
   adc_init();
-  }
-  
+}
+
 if ($ARGV[1] eq "time") {
   my $ids;
   for (my $i = 0; $i <= 1; $i++) {
@@ -125,7 +130,8 @@ if ($ARGV[1] eq "led" && defined $ARGV[2]) {
   print "Wrote LED settings.\n";
 }
 
-if ($ARGV[1] eq "init_lmk") {
+
+sub lmk_init {
   # start with the first lmk, the input P_CLOCK is driven by a PLL
   # the the LMKs just need to distribute it, so CLK MUX should be 0x0
 
@@ -176,6 +182,10 @@ if ($ARGV[1] eq "init_lmk") {
   print ">>> Both clock chips LMK01010 initialized.\n"
 }
 
+if ($ARGV[1] eq "lmk_init") {
+  &lmk_init;
+}
+
 sub sendcmd_adc {
   my $adc_reg = (shift) & 0xfff; # register address
   my $adc_val = (shift) & 0xff; # register value
@@ -210,14 +220,19 @@ if ($ARGV[1] eq "adc_reg" && defined $ARGV[2] && defined $ARGV[3]) {
   print "Wrote ADC register.\n";
 }
 
-if ($ARGV[1] eq "adc_testio" && defined $ARGV[2]) {
+sub adc_testio {
+  my $pattern = shift;
   # interpret the arguments as hex
-  sendcmd_adc(0xd,oct($ARGV[2]) & 0xf);
+  sendcmd_adc(0xd, $pattern);
   # initiate transfer
   sendcmd_adc(0xFF,0x1);
   print "Set ADC testio mode.\n";
 }
 
+if ($ARGV[1] eq "adc_testio" && defined $ARGV[2]) {
+  adc_testio(oct($ARGV[2]) & 0xf);
+}
+
 if ($ARGV[1] eq "adc_phase" && defined $ARGV[2]) {
   # interpret the arguments as hex
   sendcmd_adc( 0x16 , oct($ARGV[2]) & 0xf );
@@ -226,3 +241,52 @@ if ($ARGV[1] eq "adc_phase" && defined $ARGV[2]) {
   print "Set ADC output phase mode.\n";
 }
 
+if ($ARGV[1] eq "init") {
+  # init stuff
+  &lmk_init;
+  &adc_init;
+
+  # set the ADC phase to 0x0
+  # this is mandatory in order to get
+  # working communication!
+  sendcmd_adc(0x16, 0);
+  sendcmd_adc(0xFF, 0x1);
+  print ">>> Phase set to 0°, your board should be working now.\n";
+}
+
+sub read_channels {
+  my @result;
+  my $ctrlreg = 0xa081;
+  trb_register_write($board,$ctrlreg,0);
+  usleep(100000);
+  trb_register_write($board,$ctrlreg,2);
+  for (my $ch=0;$ch<2;$ch++) {
+    my $r = trb_register_read_mem($board,0xa000+$ch,1,10);
+    push(@result, $r->{$board});
+    #print Dumper($r);
+  }
+  trb_register_write($board,$ctrlreg,0);
+
+  return @result;
+}
+
+if ($ARGV[1] eq "adc_testall") {
+  # set pattern to checkerboard,
+  # should give alternating 0x155, 0x2aa, 0x155, 0x2aa ...
+  adc_testio(0b0100);
+
+  my @result = read_channels();
+  print Dumper(\@result);
+
+
+  adc_testio(0b1100);
+  
+  my @result = read_channels();
+  print Dumper(\@result);
+  
+  
+  # disable testio
+  adc_testio(0);
+}
+
+