include negative trigger windows

diff --git a/releases/tdc_v2.3/Readout_record.vhd b/releases/tdc_v2.3/Readout_record.vhd
index 4ad4e52d71c1d8860ac31dccbe99406656d28b51..c4564a0c6e36035f86b09ab2136dedcf8ee819cf 100644 (file)
--- a/releases/tdc_v2.3/Readout_record.vhd
+++ b/releases/tdc_v2.3/Readout_record.vhd
@@ -70,7 +70,7 @@ architecture behavioral of Readout_record is
 
   -- trigger window
   signal trg_win_pre             : unsigned(10 downto 0);
-  signal trg_win_post            : unsigned(10 downto 0);
+  signal trg_win_post            : signed(10 downto 0);
   signal trg_time                : std_logic_vector(38 downto 0);
   signal TW_pre                  : std_logic_vector(38 downto 0);
   signal TW_post                 : std_logic_vector(38 downto 0);
@@ -92,6 +92,7 @@ architecture behavioral of Readout_record is
   signal ch_data_3r              : std_logic_vector_array_36(0 to CHANNEL_NUMBER-1);
   signal ch_data_4r              : std_logic_vector(31 downto 0);
   signal ch_hit_time             : std_logic_vector(38 downto 0);
+  signal ch_hit_chan             : std_logic_vector( 6 downto 0);
   signal ch_epoch_cntr           : std_logic_vector(27 downto 0);
   signal buffer_transfer_done    : std_logic;
   signal buffer_transfer_done_r  : std_logic;
@@ -230,7 +231,7 @@ begin  -- behavioral
   end generate DATA_FORMAT_15;
 
   trg_win_pre  <= unsigned(TRG_WIN_PRE_IN);
-  trg_win_post <= unsigned(TRG_WIN_POST_IN);
+  trg_win_post <= signed(TRG_WIN_POST_IN);
 
 -------------------------------------------------------------------------------
 -- Trigger window
@@ -240,7 +241,7 @@ begin  -- behavioral
   begin
     if rising_edge(CLK_100) then
       TW_pre  <= std_logic_vector(unsigned(trg_time)-trg_win_pre);
-      TW_post <= std_logic_vector(unsigned(trg_time)+trg_win_post);
+      TW_post <= std_logic_vector(signed('0' & trg_time)+trg_win_post)(38 downto 0);
     end if;
   end process TrigWinCalculation;
 
@@ -266,6 +267,7 @@ begin  -- behavioral
 
       if ch_data_r(fifo_nr_wr)(35 downto 32) = x"1" and ch_data_r(fifo_nr_wr)(31) = '1' then
         ch_hit_time <= ch_epoch_cntr & ch_data_r(fifo_nr_wr)(10 downto 0);
+        ch_hit_chan <= ch_data_r(fifo_nr_wr)(28 downto 22);
       elsif ch_data_r(fifo_nr_wr)(35 downto 32) = x"1" and ch_data_r(fifo_nr_wr)(31 downto 29) = "011" then
         ch_hit_time <= (others => '0');
       end if;
@@ -288,7 +290,7 @@ begin  -- behavioral
   Check_Trigger_Win_Right : process (CLK_100)
   begin
     if rising_edge(CLK_100) then
-      if unsigned(ch_hit_time) <= unsigned(TW_post) then
+      if unsigned(ch_hit_time) <= unsigned(TW_post) or ch_hit_chan = "0000000" then
         trg_win_r <= '1';
       else
         trg_win_r <= '0';

diff --git a/releases/tdc_v2.3/TriggerHandler.vhd b/releases/tdc_v2.3/TriggerHandler.vhd
index e125f1b2fc3a8279be826a27544d3185fc0d2798..0eaf56dd738eb1f02c257f3666a78b0959f7f26d 100644 (file)
--- a/releases/tdc_v2.3/TriggerHandler.vhd
+++ b/releases/tdc_v2.3/TriggerHandler.vhd
@@ -244,7 +244,7 @@ trg_pulse_tdc(0) <= valid_timing_200;
         trg_win_state_debug_f <= x"1";
 
       when COUNT =>
-        if trg_win_cnt(10 downto 0) = TRG_WIN_POST_IN then
+        if trg_win_cnt(9 downto 0) = TRG_WIN_POST_IN(9 downto 0) or TRG_WIN_POST_IN(10) = '1' then
           STATE_TW_NEXT <= VALIDATE_TRIGGER;
         else
           STATE_TW_NEXT <= COUNT;