Couple of changes to MDC OEP

- add debug features
- few general updates

diff --git a/OEP/config.vhd b/OEP/config.vhd
index 76e637383ddaa486b23df541932da28fd6ca5486..c659ce3ca58fc6604da716b820172797d43ec249 100644 (file)
--- a/OEP/config.vhd
+++ b/OEP/config.vhd
@@ -29,7 +29,7 @@ package config is
     constant INCLUDE_SPI            : integer  := c_NO;
     constant INCLUDE_ADC            : integer  := c_YES;
     constant INCLUDE_I2C            : integer  := c_YES; 
-    constant INCLUDE_DEBUG_INTERFACE: integer  := c_NO; 
+    constant INCLUDE_DEBUG_INTERFACE: integer  := c_YES; 
 
     --input monitor and trigger generation logic
     constant INCLUDE_TRIGGER_LOGIC  : integer  := c_NO;

diff --git a/OEP/mdcoep.prj b/OEP/mdcoep.prj
index 4523d84b4caa0c8e6c9679b80d617447ac6f1a3e..4ce1a6ce1ee50f571b323ccc97dfa418bc59eeee 100644 (file)
--- a/OEP/mdcoep.prj
+++ b/OEP/mdcoep.prj
@@ -14,6 +14,7 @@ set_option -default_enum_encoding sequential
 set_option -symbolic_fsm_compiler 1
 set_option -top_module "mdcoep"
 set_option -resource_sharing false
+set_option -vhdl2008 1
 
 # map options
 set_option -frequency 120
@@ -128,6 +129,8 @@ add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/med_sync_define.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/rx_control.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/tx_control.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_rx_reset_RS.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/main_tx_reset_RS.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/rx_reset_fsm.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/tx_reset_fsm.vhd"
 add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/sci_reader.vhd"

diff --git a/OEP/mdcoep.vhd b/OEP/mdcoep.vhd
index f2c9e479f8d0b80879aac04bd86008da5bdeccf5..d6a14c6e4280edc92586f870fb66229b666825dd 100644 (file)
--- a/OEP/mdcoep.vhd
+++ b/OEP/mdcoep.vhd
@@ -47,10 +47,10 @@ entity mdcoep is
     ADC_CS       : out   std_logic;
     
     --LED
-    LED            : out   std_logic_vector(7 downto 0);
+    LED          : out   std_logic_vector(7 downto 0);
     
     --Other Connectors
-    TEST           : out   std_logic_vector(8 downto 1)
+    IO           : inout   std_logic_vector(8 downto 1)
     );
 
 
@@ -98,6 +98,7 @@ architecture arch of mdcoep is
 
   signal common_stat_reg : std_logic_vector(std_COMSTATREG*32-1 downto 0) := (others => '0');
   signal common_ctrl_reg : std_logic_vector(std_COMCTRLREG*32-1 downto 0);
+  signal hub_stat_debug  : std_logic_vector(31 downto 0);
 
   signal sed_error_i       : std_logic;
   signal bus_master_active : std_logic;
@@ -139,6 +140,7 @@ begin
 
   THE_MEDIA_INTERFACE : entity work.med_ecp5_sfp_sync_2
     generic map(
+      USE_NEW_ECP5_RESET => 0,
       DUAL => 0,
       IS_SYNC_SLAVE => (c_YES,c_NO)
       )
@@ -178,6 +180,7 @@ begin
 ---------------------------------------------------------------------------
   THE_DOWN_INTERFACE_2 : entity work.med_ecp5_sfp_sync_2
     generic map(
+      USE_NEW_ECP5_RESET => 0,
       DUAL => 1,
       IS_SYNC_SLAVE => (c_NO,c_NO)
 
@@ -215,13 +218,14 @@ begin
       MII_IS_UPLINK       => (1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0),
       MII_IS_DOWNLINK     => (0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0),
       MII_IS_UPLINK_ONLY  => (1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0),
+      HUB_CTRL_BROADCAST_BITMASK => x"FA", --hub and mdc
       USE_ONEWIRE         => c_I2C,
       HARDWARE_VERSION    => HARDWARE_INFO,
       INCLUDED_FEATURES   => INCLUDED_FEATURES,
       INIT_ENDPOINT_ID    => x"0005",
       INIT_CTRL_REGS      => x"00000000_00000000_00000000_00000000" &
                              x"00000000_00000000_00000000_00000000" &
-                             x"00000000_00000000_800a4000_00000000" &
+                             x"00000000_00000000_800a2000_00000000" &
                              x"FFFFFFFF_FFFFFFFF_FFFFFFFF_FFFFFFFF",
       CLOCK_FREQUENCY     => CLOCK_FREQUENCY,
       BROADCAST_SPECIAL_ADDR => BROADCAST_SPECIAL_ADDR,
@@ -268,7 +272,7 @@ begin
       --Status ports (for debugging)
       MPLEX_CTRL            => (others => '0'),
       CTRL_DEBUG            => (others => '0'),
-      STAT_DEBUG            => open
+      STAT_DEBUG            => hub_stat_debug
       );
 
   gen_media_record : for i in 0 to INTERFACE_NUM-1 generate
@@ -354,8 +358,11 @@ begin
       ADC_CLK           => ADC_SCK,
       --I2C
       HEADER_IO(7)      => SFP_MOD2,
-      HEADER_IO(8)      => SFP_MOD1,      
-      --Trigger & Monitor 
+      HEADER_IO(8)      => SFP_MOD1,
+      HEADER_IO(9)      => IO(1), --uart rx
+      HEADER_IO(10)     => IO(2), --uart tx
+
+      --Trigger & Monitor
       MONITOR_INPUTS    => monitor_inputs_i,
       TRIG_GEN_INPUTS   => trigger_inputs_i,
       TRIG_GEN_OUTPUTS(1 downto 0)  => open,
@@ -383,11 +390,15 @@ begin
 monitor_inputs_i <= (others => '0');
 trigger_inputs_i <= (others => '0');
 
+IO(3) <= GPIO(1) when rising_edge(clk_sys);
+IO(4) <= med_dataready_in(1);
+IO(5) <= hub_stat_debug(8);
+IO(6) <= GPIO(5) when rising_edge(clk_sys);
+IO(7) <= med_dataready_in(3);
+IO(8) <= hub_stat_debug(9);
+--IO(7) <= hub_stat_debug(8);
+--IO(8) <= hub_stat_debug(9);
 
--- TEST(1) <= ADC_CS;
--- TEST(2) <= ADC_MOSI;
--- TEST(3) <= ADC_MISO;
--- TEST(4) <= ADC_SCK;
 
 ---------------------------------------------------------------------------
 -- LED

diff --git a/pinout/oep.lpf b/pinout/oep.lpf
index 7686d078a442eaef8fd7b64242bd8669b99e2353..ee7d3e2134578fa936e08ff17b5b857273f287a3 100644 (file)
--- a/pinout/oep.lpf
+++ b/pinout/oep.lpf
@@ -68,16 +68,16 @@ LOCATE COMP "LED_7" SITE "K20";
 DEFINE PORT GROUP "LED_group" "LED*";\r
 IOBUF GROUP "LED_group" IO_TYPE=LVCMOS25 ;\r
 \r
-LOCATE COMP "TEST_1" SITE "U19";\r
-LOCATE COMP "TEST_2" SITE "N20";\r
-LOCATE COMP "TEST_3" SITE "U20";\r
-LOCATE COMP "TEST_4" SITE "M20";\r
-LOCATE COMP "TEST_5" SITE "T20";\r
-LOCATE COMP "TEST_6" SITE "L20";\r
-LOCATE COMP "TEST_7" SITE "R20";\r
-LOCATE COMP "TEST_8" SITE "P20";\r
-DEFINE PORT GROUP "TEST_group" "TEST*";\r
-IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 ;\r
+LOCATE COMP "IO_1" SITE "U19";\r
+LOCATE COMP "IO_2" SITE "N20";\r
+LOCATE COMP "IO_3" SITE "U20";\r
+LOCATE COMP "IO_4" SITE "M20";\r
+LOCATE COMP "IO_5" SITE "T20";\r
+LOCATE COMP "IO_6" SITE "L20";\r
+LOCATE COMP "IO_7" SITE "R20";\r
+LOCATE COMP "IO_8" SITE "P20";\r
+DEFINE PORT GROUP "IO_group" "IO*";\r
+IOBUF GROUP "IO_group" IO_TYPE=LVCMOS25 ;\r
 \r
 \r
 LOCATE COMP "TMP_ALERT" SITE "A12";\r
@@ -100,4 +100,3 @@ LOCATE COMP "ADC_CS" SITE "B20";
 DEFINE PORT GROUP "ADC_group" "ADC*";\r
 IOBUF GROUP "ADC_group" IO_TYPE=LVCMOS25 ;\r
 \r
-\r