remove second tx reset from dual

diff --git a/media_interfaces/med_ecp5_sfp_sync_2.vhd b/media_interfaces/med_ecp5_sfp_sync_2.vhd
index cfa98d2fc4006e25f31fa6f72d707a2c2c538d3d..08e4038c64ede70004e1ccf6a5842d899d83ba96 100644 (file)
--- a/media_interfaces/med_ecp5_sfp_sync_2.vhd
+++ b/media_interfaces/med_ecp5_sfp_sync_2.vhd
@@ -13,7 +13,7 @@ use work.med_sync_define.all;
 
 entity med_ecp5_sfp_sync_2 is
   generic(
-    USE_NEW_ECP5_RESET : integer := c_YES;
+    USE_NEW_ECP5_RESET : integer := c_NO;
     DUAL            : integer := 0; --which Dual to use
     IS_SYNC_SLAVE   : int_array_t(0 to 1) := (c_YES, c_NO) --select slave mode
     );
@@ -179,7 +179,7 @@ THE_SERDES : entity work.dual_serdes
         serdes1_rsl_rst           => '0',
         serdes1_rsl_rx_rdy        => rx_ready(1),
         serdes1_rsl_tx_rdy        => tx_ready(1),
-        serdes1_rst_dual_c        => rst_qd(1),
+        serdes1_rst_dual_c        => rst_qd(0), --230920
         serdes1_rx_cdr_lol_s      => rx_cdr_lol(1),
         serdes1_rx_cv_err(0)      => rx_error(1),
         serdes1_rxdata            => rx_data(1),
@@ -199,7 +199,7 @@ THE_SERDES : entity work.dual_serdes
         serdes1_tx_idle_c         => '0',
         serdes1_tx_k(0)           => tx_k(1),
         serdes1_tx_pclk           => clk_tx_full(1),
-        serdes1_tx_pcs_rst_c      => tx_pcs_rst(1),
+        serdes1_tx_pcs_rst_c      => tx_pcs_rst(0), --230920
         serdes1_tx_pwrup_c        => '1',
         serdes1_tx_serdes_rst_c   => '0', 
          
@@ -268,7 +268,7 @@ THE_SERDES : entity work.dual_serdes_1
         serdes1_rsl_rst           => '0',
         serdes1_rsl_rx_rdy        => rx_ready(1),
         serdes1_rsl_tx_rdy        => tx_ready(1),
-        serdes1_rst_dual_c        => rst_qd(1),
+        serdes1_rst_dual_c        => rst_qd(0), --230920
         serdes1_rx_cdr_lol_s      => rx_cdr_lol(1),
         serdes1_rx_cv_err(0)      => rx_error(1),
         serdes1_rxdata            => rx_data(1),
@@ -288,7 +288,7 @@ THE_SERDES : entity work.dual_serdes_1
         serdes1_tx_idle_c         => '0',
         serdes1_tx_k(0)           => tx_k(1),
         serdes1_tx_pclk           => clk_tx_full(1),
-        serdes1_tx_pcs_rst_c      => tx_pcs_rst(1),
+        serdes1_tx_pcs_rst_c      => tx_pcs_rst(0), --230920
         serdes1_tx_pwrup_c        => '1',
         serdes1_tx_serdes_rst_c   => '0',