tdc register information is exported from xml-db and integrated into the manual

diff --git a/trb3/TdcControlReg.tex b/trb3/TdcControlReg.tex
new file mode 100644 (file)
index 0000000..41b8ec3
--- /dev/null
+++ b/trb3/TdcControlReg.tex
@@ -0,0 +1,43 @@
+% remember to include the following latex packages:
+%\usepackage{booktabs}
+%\usepackage{longtable}
+%\usepackage[table]{xcolor}  
+%\definecolor{light-gray}{gray}{0.90}
+  
+\begin{longtable}
+{ p{4cm} l c p{8cm} }
+\toprule
+  \textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
+\midrule
+\midrule
+\endfirsthead\multicolumn{4}{c}{\tablename\ \thetable\ -- \textit{Continued from previous page}} \\\toprule
+  \textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
+\midrule
+\midrule
+\endhead\multicolumn{4}{r}{\textit{Continued on next page}} \\
+  \endfoot 
+  \endlastfoot  \textbf{BasicControl}\hfill(rw) & c800 &   & Basic control for all channels \\
+  \quad  DebugOutput &  & 0--3 & Enables different signals to the HPLA* output for debugging with logic analyser \\
+  \quad  DebugMode &  & 4 & Enables the Debug Mode. Different statistics and debug words are sent after every trigger \\
+  \quad  LightMode &  & 5 & Enables the Light Mode. No header and reference channel information is sent if there are no recorded hits. Works only in the free streaming mode (trigger window off) \\
+  \quad  ResetCounters &  & 8 & Resets the internal counters \\
+  \quad  ResetCoarseCounter &  & 13 & Used to reset the coarse counters. Setting this bit signals for the coarse counter reset but the action will take place with the arrival of the next valid trigger in order to synchronise the coarse counters in a large system. \\
+  \quad  CalibrationPrescaler &  & 28--31 & Used to divide the calibration hit frequency. \\
+\hline
+  \textbf{TriggerWindowConfig}\hfill(rw) & c801 &   & Configuration of the TriggerWindow feature \\
+  \quad  TriggerWindowBefore &  & 0--10 & Trigger window width BEFORE the trigger with granularity of 5 ns \\
+  \quad  TriggerWindowAfter &  & 16--26 & Trigger window width AFTER the trigger with granularity of 5 ns. ATTENTION: Minimum value is x"00f"! \\
+  \quad  TriggerWindowEnable &  & 31 & Trigger window enable \\
+\hline
+  \textbf{ChannelEnable.0}\hfill(rw) & c802 & 0--31 & Enable signals/hits of the specific channel. LSB is channel 1. \\
+\hline
+  \textbf{ChannelEnable.1}\hfill(rw) & c803 & 0--31 & Enable signals/hits of the specific channel. LSB is channel 1. \\
+\hline
+  \textbf{ChannelRingBufferSize}\hfill(rw) & c804 &   & Defines the size of the channel ring buffer size \\
+  \quad  MaxWords &  & 0--6 & Defines the size of the channel ring buffer size. Maximum value 124. \\
+\hline
+  \textbf{ChannelInvert.0}\hfill(rw) & c805 & 0--31 & Inverts the polarity of the signals/hits of the specific channel. LSB is channel 1. \\
+\hline
+  \textbf{ChannelInvert.1}\hfill(rw) & c806 & 0--31 & Inverts the polarity of the signals/hits of the specific channel. LSB is channel 1. \\
+\bottomrule
+\caption{The control registers of the TDC.}\label{tab:tdcControlReg}\end{longtable}

diff --git a/trb3/TdcStatusReg.tex b/trb3/TdcStatusReg.tex
new file mode 100644 (file)
index 0000000..1c1512c
--- /dev/null
+++ b/trb3/TdcStatusReg.tex
@@ -0,0 +1,67 @@
+% remember to include the following latex packages:
+%\usepackage{booktabs}
+%\usepackage{longtable}
+%\usepackage[table]{xcolor}  
+%\definecolor{light-gray}{gray}{0.90}
+  
+\begin{longtable}
+{ p{4cm} l c p{8cm} }
+\toprule
+  \textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
+\midrule
+\midrule
+\endfirsthead\multicolumn{4}{c}{\tablename\ \thetable\ -- \textit{Continued from previous page}} \\\toprule
+  \textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
+\midrule
+\midrule
+\endhead\multicolumn{4}{r}{\textit{Continued on next page}} \\
+  \endfoot 
+  \endlastfoot  \textbf{BasicStatus}\hfill(r) & c100 &   & Basic config and status information for all channels \\
+  \quad  ReadoutFSM &  & 0--3 & Debug word of the TDC readout FSM \\
+  \quad  WriteoutFSM &  & 4--7 & Debug word of the TDC writeout FSM \\
+  \quad  ChannelCount &  & 8--15 & Number of implemented channels \\
+  \quad  RefTimePolarity &  & 16 & Reference time polarity \\
+  \quad  TdcVersion &  & 17--27 & TDC core version number \\
+  \quad  TriggerType &  & 28--31 & Trigger type \\
+\hline
+  \textbf{DebugRegister}\hfill(r) & c101 &   & Various state machine states. \\
+  \quad  TriggerHandlerFSM &  & 0--3 & Debug word of the Trigger Handler FSM \\
+\hline
+  \textbf{TriggerTime}\hfill(r) & c102 & 0--31 & Arrival time of the last valid timing trigger at the reference channel with granularity of 5 ns \\
+\hline
+  \textbf{TriggerWindowStatus}\hfill(r) & c103 &   & Status of the TriggerWindow feature \\
+  \quad  TriggerWindowBeforeValue &  & 0--10 & Trigger window width BEFORE the trigger with granularity of 5 ns \\
+  \quad  TriggerWindowAfterValue &  & 16--26 & Trigger window width AFTER the trigger with granularity of 5 ns \\
+  \quad  TriggerWindowEnabled &  & 31 & Trigger window enabled? \\
+\hline
+  \textbf{TriggerCounter}\hfill(r) & c104 & 0--23 & Number of valid triggers received \\
+\hline
+  \textbf{TimingTriggerCounter}\hfill(r) & c105 & 0--23 & Number of valid timing triggers received \\
+\hline
+  \textbf{NoTimingTriggerCounter}\hfill(r) & c106 & 0--23 & Number of valid triggers received which are not timing triggers \\
+\hline
+  \textbf{InvalidTriggerCounter}\hfill(r) & c107 & 0--23 & Number of invalid triggers received \\
+\hline
+  \textbf{MultiTimingTriggerCounter}\hfill(r) & c108 & 0--23 & Number of multi timing triggers received (triggers received before trigger is released) \\
+\hline
+  \textbf{SpuriousTriggerCounter}\hfill(r) & c109 & 0--23 & Number of spurious triggers received (in case of timing trigger is validated although it was a timing-trigger-less trigger) \\
+\hline
+  \textbf{WrongReadoutsCounter}\hfill(r) & c10a & 0--23 & Number of wrong readouts due to spurious triggers \\
+\hline
+  \textbf{SpikesCounter}\hfill(r) & c10b & 0--23 & Number of spikes (pulses narrower than 40 ns) detected at the timing trigger input \\
+\hline
+  \textbf{IdleTime}\hfill(r) & c10c & 0--23 & Total time length, that the readout FSM waited in the idle state (with granularity of 10 ns) \\
+\hline
+  \textbf{WaitTime}\hfill(r) & c10d & 0--23 & Total time length, that the readout FSM waited in the wait states (with granularity of 10 ns) \\
+\hline
+  \textbf{TotalEmptyChannelsCounter}\hfill(r) & c10e & 0--23 & Total number of empty channels since the last reset signal \\
+\hline
+  \textbf{ReleaseCounter}\hfill(r) & c10f & 0--23 & Number of release signals sent \\
+\hline
+  \textbf{ReadoutTime}\hfill(r) & c110 & 0--23 & Total time length of the readout process (with granularity of 10 ns) \\
+\hline
+  \textbf{TimeoutCounter}\hfill(r) & c111 & 0--23 & Number of timeouts detected (too long delay after the timing trigger) \\
+\hline
+  \textbf{FinishedCounter}\hfill(r) & c112 & 0--23 & Number of sent finished signals \\
+\bottomrule
+\caption{The status registers of the TDC.}\label{tab:tdcStatusReg}\end{longtable}

diff --git a/trb3/main.tex b/trb3/main.tex
index ad8564d842309e7d70415cd76c47f7258dd1d22d..c626afd8260f72d02f767c30c07a86a16d0e7091 100644 (file)
--- a/trb3/main.tex
+++ b/trb3/main.tex
@@ -199,7 +199,17 @@
     \subsection{Data Format}
       \input{TdcDataFormat}
     \subsection{Slow Control Registers}
-      \input{TdcSlowControl}
+%      \input{TdcSlowControl}
+ A set of control registers (0xc800) are assigned in order to access the basic
+ controls, edit the features and debug information of the TDC. A detailed
+ explanation of the control registers are given in Table \ref{tab:tdcControlReg}.
+       \input{TdcControlReg}
+ Some status information and statistics of the TDC can be accessed via the
+ status registers (0xc100). The status registers of the TDC are explained in
+ Table \ref{tab:tdcStatusReg}.
+       \input{TdcStatusReg}
+
+
     \newpage
     \subsection{TDC Version Table}
       \input{TdcVersion}