STAT_DEBUG(63 downto 8) <= (others => '0');
-- SerDes #3 is used for debugging
- DEBUG_OUT <= debug_i(3*32+31 downto 3*32);
+-- DEBUG_OUT <= debug_i(0*32+31 downto 0*32);
+ -- all SerDes debug
+ DEBUG_OUT(31 downto 24) <= debug_i(3*32+7 downto 3*32);
+ DEBUG_OUT(23 downto 16) <= debug_i(2*32+7 downto 2*32);
+ DEBUG_OUT(15 downto 8) <= debug_i(1*32+7 downto 1*32);
+ DEBUG_OUT(7 downto 0) <= debug_i(0*32+7 downto 0*32);
end architecture;
LINK_ACTIVE_OUT <= link_active_qref;
-- TEST_LINE signals
- DEBUG_OUT(31 downto 12) <= (others => '0');
- DEBUG_OUT(11) <= link_full_done_qsys;
- DEBUG_OUT(10) <= link_half_done_qsys;
- DEBUG_OUT(9) <= '0';
- DEBUG_OUT(8) <= link_rx_ready_qsys;
- DEBUG_OUT(7) <= link_tx_ready_qsys;
- DEBUG_OUT(6 downto 2) <= (others => '0');
- DEBUG_OUT(1 downto 0) <= debug_rx_control_i(1 downto 0);
+-- DEBUG_OUT(31 downto 12) <= (others => '0');
+-- DEBUG_OUT(11) <= link_full_done_qsys;
+-- DEBUG_OUT(10) <= link_half_done_qsys;
+-- DEBUG_OUT(9) <= '0';
+-- DEBUG_OUT(8) <= link_rx_ready_qsys;
+-- DEBUG_OUT(7) <= link_tx_ready_qsys;
+-- DEBUG_OUT(6 downto 2) <= (others => '0');
+-- DEBUG_OUT(1 downto 0) <= debug_rx_control_i(1 downto 0);
-- DEBUG_OUT <= (others => '0');
+ DEBUG_OUT(31 downto 8) <= (others => '0');
+ -- these signals will be used outside!
+ DEBUG_OUT(7 downto 4) <= (others => '0');
+ DEBUG_OUT(3) <= link_full_done_qsys;
+ DEBUG_OUT(2) <= link_half_done_qsys;
+ DEBUG_OUT(1) <= link_rx_ready_qsys;
+ DEBUG_OUT(0) <= link_tx_ready_qsys;
+
-- Some remarks on the SerDes issue:
-- - slave ports keep everything in global reset until SFP detects light on receiver (SFP_LOS = 0)
STAT_REG_OUT(17) <= '0';\r
STAT_REG_OUT(31 downto 18) <= (others => '0');\r
\r
- DEBUG_OUT(0) <= idle0_detected when rising_edge(CLK_RXI);\r
- DEBUG_OUT(1) <= idle1_detected when rising_edge(CLK_RXI);\r
- DEBUG_OUT(31 downto 2) <= (others => '0');\r
+ DEBUG_OUT(31 downto 0) <= (others => '0');\r
\r
end architecture;\r