removed returned subs

diff --git a/soft/toolbox/jtag_atomic/ui_generators.pl b/soft/toolbox/jtag_atomic/ui_generators.pl
index 06ba822d8737b04e360c4efb55c9940cc9a2da42..3b904b52c08ad1e85152158111afa8f49de94c4b 100644 (file)
--- a/soft/toolbox/jtag_atomic/ui_generators.pl
+++ b/soft/toolbox/jtag_atomic/ui_generators.pl
@@ -20,40 +20,40 @@ sub any2dec { # converts numeric expressions 0x, 0b or decimal to decimal
 
 sub generate_h_read_ram1b_word {
   my ($chain, $fpga_addr, $debug_ram1baddr, $debug_ram1bdata, $addr) = @_;
-  return sub {
+#   return sub {
     init_msg( "read ram1b word " . $chain);
     execute_shell_command("trbcmd w $fpga_addr $debug_ram1baddr $addr", "");
     # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
     my $regval = execute_shell_command_return("trbcmd r $fpga_addr $debug_ram1bdata");
     report('report_general', "regval: ". substr($regval, 8, 10). "\n");
     report('data', substr($regval, 8, 10));
-  }
+#   }
 }
 sub generate_h_read_ram1c_word {
   my ($chain, $fpga_addr, $debug_ram1caddr, $debug_ram1cdata, $addr) = @_;
-  return sub {
+#   return sub {
     init_msg( "read ram1b word " . $chain);
     execute_shell_command("trbcmd w $fpga_addr $debug_ram1caddr $addr", "");
     # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
     my $regval = execute_shell_command_return("trbcmd r $fpga_addr $debug_ram1cdata");
     report('report_general', "regval: ". substr($regval, 8, 10). "\n");
     report('data', substr($regval, 8, 10));
-  }
+#   }
 }
 
 
 sub generate_h_copy_ram1b1c {
   my ($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr, $addr) = @_;
-  return sub {
+#   return sub {
     init_msg( "read ram1b word " . $chain);
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000008,0x00000064); #M26C_CMD_COPY_RAM1B1C_SINGLE_TRIGGER with unconditional trigger
-  }
+#   }
 }
 
 
 sub generate_h_man_maps_reset {
   my ($chain, $fpga_addr, $conf_signals_addr) = @_;
-  return sub {
+#   return sub {
     init_msg( "manual reset chain " . $chain);
     # set signals_invert bit 10 (reset inverted) temporarily to generate a manual reset
     my $regval = execute_shell_command_return("trbcmd r $fpga_addr $conf_signals_addr");
@@ -65,12 +65,12 @@ sub generate_h_man_maps_reset {
     trb_register_write($fpga_addr, $conf_signals_addr,$resetinv);
     sleep 1;
     trb_register_write($fpga_addr, $conf_signals_addr,$resetnormal);
-  }
+#   }
 }
 
 sub generate_h_maps_start_signal {
   my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
-  return sub {
+#   return sub {
     init_msg( "generate MAPS start $onoroff " . $chain);
     if($onoroff == 0) {
       trb_register_clearbit($fpga_addr,$conf_signals_addr,(1 << 9));
@@ -78,11 +78,11 @@ sub generate_h_maps_start_signal {
     else {
       trb_register_setbit($fpga_addr,$conf_signals_addr,(1 << 9));
       }
-  }
+#   }
 }
 sub generate_h_maps_reset_signal {
   my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
-  return sub {
+#   return sub {
     init_msg("MAPS reset signal $onoroff " . $chain);
     if($onoroff == 0) {
       trb_register_clearbit($fpga_addr,$conf_signals_addr,(1 << 11));
@@ -90,12 +90,12 @@ sub generate_h_maps_reset_signal {
     else {
       trb_register_setbit($fpga_addr,$conf_signals_addr,(1 << 11));
       }
-  }
+#   }
 }
 
 sub generate_h_maps_clk_signal {
   my ($onoroff, $chain, $fpga_addr, $conf_signals_addr) = @_;
-  return sub {
+#   return sub {
     init_msg("generate MAPS clk $onoroff " . $chain);
     
     if($onoroff == 0) {
@@ -104,20 +104,20 @@ sub generate_h_maps_clk_signal {
     else {
       trb_register_setbit($fpga_addr,$conf_signals_addr,(1 << 13));
       }
-  }
+#   }
 }
 
 sub generate_h_prog_ram {
   my($chain) = @_;
-  return sub {
+#   return sub {
     init_msg("program RAM $chain.");
     execute_shell_command("./ui_writeram.pl -c $chain", "$chain: done.\n"); # load sensor*.ini
-  }
+#   }
 }
 
 sub generate_h_set_timing_10mhz {
   my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("timing 10 MHz $chain.");
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A);         #M26C_CMD_STOP
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x0000000A,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
@@ -128,12 +128,12 @@ sub generate_h_set_timing_10mhz {
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000004,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000009,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009);         #M26C_CMD_START
-  }
+#   }
 }
 
 sub generate_h_set_timing_1mhz {
   my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("timing 1 MHz $chain.");
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A);         #M26C_CMD_STOP
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000064,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
@@ -144,12 +144,12 @@ sub generate_h_set_timing_1mhz {
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000030,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x00000063,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009);         #M26C_CMD_START
-   }
+#    }
 }
 
 sub generate_h_set_timing_100khz {
   my($chain, $fpga_addr, $cmd_reg_addr, $data_reg_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("timing 100 kHz $chain.");
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x0000000A);         #M26C_CMD_STOP
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000003E8,0x00000040);#M26C_CMD_SET_JTAG_CLOCK_CYCLE_LENGTH
@@ -160,7 +160,7 @@ sub generate_h_set_timing_100khz {
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000001F0,0x0000004a);#M26C_CMD_SET_JTAG_SAMPLE_TIME3
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0x000003E7,0x0000004c);#M26C_CMD_SET_JTAG_SET_DATA_TIME
     send_write_command($fpga_addr,$data_reg_addr,$cmd_reg_addr,0,0x00000009);         #M26C_CMD_START
-  }
+#   }
 }
 
 
@@ -175,7 +175,7 @@ sub generate_h_delay {
 sub generate_h_waitbeforestart_6us { 
 
   my($board, $fpga_addr, $conf_waitstart_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("Wait before start $board 6us.");
     if(!defined($conf_waitstart_addr)) {
       report('report_general', "TrbNet address missing. Doing nothing.\n");
@@ -183,13 +183,13 @@ sub generate_h_waitbeforestart_6us {
     }
     # Set time to wait after finished programming before sending MAPS_start
     trb_register_write($fpga_addr, $conf_waitstart_addr, 0x00000200);# wait before start (counted with 80 MHz)
-  }
+#   }
 }
 
 sub generate_h_waitbeforestart_1ms { 
 
   my($board, $fpga_addr, $conf_waitstart_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("Wait before start $board 1ms.");
     if(!defined($conf_waitstart_addr)) {
       report('report_general', "TrbNet address missing. Doing nothing.\n");
@@ -198,13 +198,13 @@ sub generate_h_waitbeforestart_1ms {
     # Set time to wait after finished programming before sending MAPS_start
     trb_register_write($fpga_addr, $conf_waitstart_addr, 0x00013880);# wait before start (counted with 80 MHz)
 
-  }
+#   }
 }
 
 sub generate_h_waitbeforestart_1s { 
 
   my($board, $fpga_addr, $conf_waitstart_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("Wait before start $board 1s.");
     if(!defined($conf_waitstart_addr)) {
       report('report_general', "TrbNet address missing. Doing nothing.\n");
@@ -213,12 +213,12 @@ sub generate_h_waitbeforestart_1s {
     # Set time to wait after finished programming before sending MAPS_start
     trb_register_write($fpga_addr, $conf_waitstart_addr, 0x04C4B400);# wait before start (counted with 80 MHz)
 
-  }
+#   }
 }
 
 sub generate_h_maps_reset {
   my ($onoroff, $chain, $chainnr, $fpga_addr, $conf_resets_addr) = @_;
-  return sub {
+#   return sub {
     init_msg("initseq setting: MAPS reset addr $conf_resets_addr $onoroff " . $chain);
     if($onoroff == 0) {
       trb_register_clearbit($fpga_addr,$conf_resets_addr,(1 << $chainnr));
@@ -226,26 +226,26 @@ sub generate_h_maps_reset {
     else {
       trb_register_setbit($fpga_addr,$conf_resets_addr,(1 << $chainnr));
       }    
-  }
+#   }
 }
 
 
 sub generate_h_trig {
   my ($board, $fpga_addr, $conf_trigger_addr) = @_;
-  return sub {
+#   return sub {
     init_msg("generate trigger addr $conf_trigger_addr  " . $board);
     # hack: for runjtag trigger single trigger address is used, otherwise setting LSB would be sufficient
     trb_register_write($fpga_addr, $conf_trigger_addr, 0xFFFFFFFF);
-  }
+#   }
 }
 
 sub generate_h_chain_trig {
   my ($chain, $chainnr, $fpga_addr, $conf_trigger_addr) = @_;
-  return sub {
+#   return sub {
     init_msg("generate trigger addr $conf_trigger_addr chainnr:$chainnr " . $chain);
     # set bit in trigger register correspondig to chain-# $chainnr
     trb_register_write($fpga_addr, $conf_trigger_addr, 1<<$chainnr);
-  }
+#   }
 }
 
 
@@ -253,14 +253,14 @@ sub generate_h_chain_trig {
 
 sub generate_h_set_inout {
   my($chain, $fpga_addr, $conf_signals_addr) =  @_;
-  return sub {
+#   return sub {
     init_msg("Set IN/OUT $chain.");
     if(!defined($conf_signals_addr)){
       report('report_general', "TrbNet address missing. Doing nothing.\n");
       return;
     }
     trb_register_write($fpga_addr, $conf_signals_addr, 0x000002EAA);
-  }
+#   }
 }