WrEn : in std_logic;
RdEn : in std_logic;
Reset : in std_logic;
- AmFullThresh : in std_logic_vector(12 downto 0);
+ AmFullThresh : in std_logic_vector(13 downto 0);
Q : out std_logic_vector(35 downto 0);
- WCNT : out std_logic_vector(13 downto 0);
+ WCNT : out std_logic_vector(14 downto 0);
Empty : out std_logic;
Full : out std_logic;
AlmostFull : out std_logic
WrEn : in std_logic;
RdEn : in std_logic;
Reset : in std_logic;
- AmFullThresh : in std_logic_vector(13 downto 0);
+ AmFullThresh : in std_logic_vector(14 downto 0);
Q : out std_logic_vector(35 downto 0);
WCNT : out std_logic_vector(14 downto 0);
Empty : out std_logic;
-end package;
\ No newline at end of file
+end package;