master_clk_i <= link_clock;
+ HDR_IO(1) <= int2med(0).packet_num(0); --'0';
+ HDR_IO(2) <= int2med(0).packet_num(1); --'0';
+ HDR_IO(3) <= int2med(0).packet_num(2); --'0';
+ HDR_IO(4) <= int2med(0).dataready; --'0';
+ HDR_IO(5) <= int2med(0).data(0); --'0';
+ HDR_IO(6) <= int2med(0).data(1); --'0';
+ HDR_IO(7) <= int2med(0).data(2); --'0';
+ HDR_IO(8) <= int2med(0).data(3); --'0';
+ HDR_IO(9) <= med2int(0).dataready; --'0';
+ HDR_IO(10) <= med2int(0).tx_read; --'0';
+
+-- type MED2INT is record
+-- data : std_logic_vector(15 downto 0);
+-- packet_num: std_logic_vector(2 downto 0);
+-- dataready : std_logic;
+-- tx_read : std_logic;
+-- stat_op : std_logic_vector(15 downto 0);
+-- clk_half : std_logic;
+-- clk_full : std_logic;
+-- end record;
+--
+-- type INT2MED is record
+-- data : std_logic_vector(15 downto 0);
+-- packet_num: std_logic_vector(2 downto 0);
+-- dataready : std_logic;
+-- ctrl_op : std_logic_vector(15 downto 0);
+-- end record;
+
THE_MAIN_TX_RST: main_tx_reset_RS
port map (
CLEAR => init_quad,
Q => start_pong_q
);
-HDR_IO(1) <= ping_q;
-HDR_IO(3) <= pong_q;
-HDR_IO(5) <= ping_stretched_q;
-HDR_IO(7) <= pong_stretched_q;
-HDR_IO(9) <= '0';
-
-HDR_IO(2) <= tx_dlm_q;
-HDR_IO(4) <= rx_dlm_q;
-HDR_IO(6) <= start_ping_q;
-HDR_IO(8) <= start_pong_q;
-HDR_IO(10) <= '0';
+--HDR_IO(1) <= ping_q;
+--HDR_IO(3) <= pong_q;
+--HDR_IO(5) <= ping_stretched_q;
+--HDR_IO(7) <= pong_stretched_q;
+--HDR_IO(9) <= '0';
+
+--HDR_IO(2) <= tx_dlm_q;
+--HDR_IO(4) <= rx_dlm_q;
+--HDR_IO(6) <= start_ping_q;
+--HDR_IO(8) <= start_pong_q;
+--HDR_IO(10) <= '0';
THE_PING_OR_LVDS: OFS1P3DX
port map(