--- /dev/null
+LIBRARY IEEE;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.std_logic_ARITH.ALL;
+USE IEEE.std_logic_UNSIGNED.ALL;
+library work;
+use work.trb_net_std.all;
+
+
+entity trb_net16_ipudata is
+ port(
+ -- Misc
+ CLK : in std_logic;
+ RESET : in std_logic;
+ CLK_EN : in std_logic;
+ -- Port to API
+ API_DATA_OUT : out std_logic_vector (c_DATA_WIDTH-1 downto 0);
+ API_PACKET_NUM_OUT : out std_logic_vector (c_NUM_WIDTH-1 downto 0);
+ API_DATAREADY_OUT : out std_logic;
+ API_READ_IN : in std_logic;
+ API_SHORT_TRANSFER_OUT : out std_logic;
+ API_DTYPE_OUT : out std_logic_vector (3 downto 0);
+ API_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0);
+ API_SEND_OUT : out std_logic;
+ -- Receiver port
+ API_DATA_IN : in std_logic_vector (c_DATA_WIDTH-1 downto 0);
+ API_PACKET_NUM_IN : in std_logic_vector (c_NUM_WIDTH-1 downto 0);
+ API_TYP_IN : in std_logic_vector (2 downto 0);
+ API_DATAREADY_IN : in std_logic;
+ API_READ_OUT : out std_logic;
+ -- APL Control port
+ API_RUN_IN : in std_logic;
+ API_SEQNR_IN : in std_logic_vector (7 downto 0);
+ API_LENGTH_OUT : out std_logic_vector (15 downto 0);
+
+ --Information received with request
+ IPU_TRG_NUMBER_OUT : out std_logic_vector (15 downto 0);
+ IPU_TRG_RND_CODE_OUT : out std_logic_vector (7 downto 0);
+ --start strobe
+ IPU_START_READOUT_OUT: out std_logic;
+ --detector data, equipped with DHDR
+ IPU_DATA_IN : in std_logic_vector (31 downto 0);
+ IPU_DATAREADY_IN : in std_logic;
+ --no more data, end transfer, send TRM
+ IPU_READOUT_FINISHED_IN : in std_logic;
+ --will be low every second cycle due to 32bit -> 16bit conversion
+ IPU_READ_OUT : out std_logic;
+ IPU_LENGTH_IN : in std_logic_vector (15 downto 0);
+ IPU_ERROR_PATTERN_IN : in std_logic_vector (31 downto 0);
+
+
+ STAT_DEBUG : out std_logic_vector(31 downto 0)
+ );
+end entity;
+
+architecture trb_net16_ipudata_arch of trb_net16_ipudata is
+
+ signal buf_IPU_ERROR_PATTERN_IN : std_logic_vector(31 downto 0);
+ signal buf_IPU_LENGTH_IN : std_logic_vector(15 downto 0);
+ signal update_buffers : std_logic;
+ signal buf_API_READ_OUT : std_logic;
+ signal buf_API_DATAREADY_OUT : std_logic;
+ signal buf_API_DATA_OUT : std_logic_vector (c_DATA_WIDTH-1 downto 0);
+ signal buf_API_PACKET_NUM_OUT : std_logic_vector (c_NUM_WIDTH-1 downto 0);
+ type state_t is (IDLE, );
+ signal state : state_t;
+ signal buf_API_TRG_NUMBER_OUT : std_logic_vector (15 downto 0);
+ signal buf_API_TRG_RND_CODE_OUT : std_logic_vector (7 downto 0);
+begin
+
+
+ PROC_STATE_MACHINE : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ state <= IDLE;
+ buf_API_READ_OUT <= '0';
+ else
+ case state is
+ when IDLE =>
+ if API_DATAREADY_IN = '1' and buf_API_READ_OUT = '1' then
+ case API_PACKET_NUM_IN is
+ when c_F0 =>
+ when c_F1 =>
+ when c_F2 =>
+ when c_F3 =>
+ when others => null
+ end case;
+ end if;
+ when others =>
+ state <= IDLE;
+ end case;
+ end if;
+ end if;
+ end process;
+
+ PROC_buffer_inputs : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if RESET = '1' then
+ buf_IPU_LENGTH_IN <= (others => '1');
+ buf_IPU_ERROR_PATTERN_IN <= (others => '0');
+ elsif update_buffers = '1' then
+ buf_IPU_LENGTH_IN <= IPU_LENGTH_IN;
+ buf_IPU_ERROR_PATTERN_IN <= IPU_ERROR_PATTERN_IN;
+ end if;
+ end if;
+ end process;
+
+ API_ERROR_PATTERN_OUT <= buf_IPU_ERROR_PATTERN_IN;
+ API_LENGTH_OUT <= buf_IPU_LENGTH_IN;
+ API_READ_OUT <= buf_API_READ_OUT;
+ API_DATAREADY_OUT <= buf_API_DATAREADY_OUT;
+ API_DATA_OUT <= buf_API_DATA_OUT;
+ API_PACKET_NUM_OUT <= buf_API_PACKET_NUM_OUT;
+
+
+
+end architecture;
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