\section*{Legend}
\discuss{This is a feature to be discussed}\\
\agreed{Good solution that should be implemented}\\
-\reject{This was a dumb idea}
+\reject{This was a dumb idea}\\
+\final{A comment regarding the final design}
\section{General Set-up}
-
+\begin{figure}[htbp]
+\begin{center}
+ \includegraphics[width=.8\textwidth]{./boardchain.png}
+\end{center}
+\caption{The setup of the new read-out board chain between sensor and read-out controller. Redish,
+Bluish and Yellowish colors show the origin of components.}
+\end{figure}
\section{TRB3 \& AddOn}
-If 20 differential lines between FPGA and converter board are enough -> use 4-con AddOn board,
-otherwise Ada-AddOn with two connectors and 40 wire pairs.
+I/O from the TRB is provided via an Ada-AddOn with two connectors and 40 wire pairs each.
Using the standard AddOns from GSI with their standard connector (KEL 8925E series) saves us from
building new boards.
-If there is an AddOn, it could have these features:
+\final{
+If there is a special AddOn later on, it could have these features:
\begin{itemize*}
- \item LVDS drivers / receivers
- \begin{itemize*}
- \item Improve signal quality on really long cables
- \item Improve robustness
+ \item Improve signal quality with LVDS drivers
+ \item Improve robustness by using different cables
+ \item Additional optical link for higher data bandwidth
\item Not required for first iteration, can easily be added later
- \end{itemize*}
\end{itemize*}
+}
-\subsection{Required Connections TRB to converter board}
+\section{Cable TRB to CB}
\begin{table}[htp]
\centering
\begin{tabularx}{\textwidth}{X|c|c}
\textbf{Purpose} & \textbf{Inputs} & \textbf{Outputs} \\
\hline
-JTAG: TDI,TMS,TCK, TDO& 1/0 & 3/0 \\
-Sensor Data: Clock, Marker, 2x Data per sensor & 8/0 & 0/0 \\
-Sensor Control: Clock, Start, Reset. & 0/0 & 3/0 or 1/2 \\
-ADC for voltages and currents (SPI) & 2/1 & 2/0 \\
-Voltage and JTAG switch (SPI) & 0/0 & 3/0 or 2/1 \\
+JTAG: TDI,TMS,TCK, TDO& 1 & 3 \\
+Sensor Data: Clock, Marker, 2x Data per sensor & 8 & 0 \\
+Sensor Control: Clock, Start, Reset. & 0 & 3 / 1+2 \\
+ADC for voltages and currents (SPI) & 4 & 3 \\
+Voltage and JTAG switch (Bus) & 0 & 6 / 0+6 \\
\hline
-Total v1 & 10/1 & 11/0\\
-Total v2 & 10/1 & 8/3\\
+Total & 13 & 15 / 7+8\\
\end{tabularx}
\caption{Inputs/Outputs from the FPGA, first value differential, second single ended}
\end{table}
-\section{Converter Board}
+\section{Converter Board (CB)}
\subsection{General Setup}
-\begin{itemize*}
- \item\discuss{One (final) converter board serves one ladder (whatever that means, e.g. 5)
-sensors and has its own JTAG chain} This removes both queue and termination boards.
- \item Design of the converter board should be in a way to easily change the number of sensors,
-i.e. all electronics should be modular, eithre independent for each sensor - or shared between all
+The converter boards handles all signals for the sensors: data, JTAG, control, voltages.
+\final{One final converter board serves one ladder (whatever that means, e.g. 5)
+sensors}. For the current setup, one converter board handles two
+sensors.
+The design of the converter board should be in a way to easily change the number of sensors,
+i.e. all electronics should be modular, either independent for each sensor - or shared between all
of them.
- \item For the telescope, the board should support two sensors.
-\end{itemize*}
-\subsection{Features}
+\subsection{Voltage and Current Monitoring}
+All voltages and currents should be monitored. These are three supply voltages and currents per
+sensor, the 8 internally generated bias voltages and the temperature.
+The temperature measurement needs an external differential amplification.
+
+The 8 VDiscr signals must be monitored both single ended and differential. I.e. must use a ADC that
+can switch input pairs from single ended to differential and provides a selectable input
+amplification of 50 - 100. In total, 7 single ended plus 4 differential ADC channels are needed per
+sensor.
+
+The on-board ADC should provide at least 1 MSPS and a SPI (or similar) interface. AD7928 is a
+possible candidate. If necessary, an external monitoring board can be connected for testing
+purposes. Such a TRB3-AddOn is currently in preparation at GSI (52 channels, 12 Bit, 40 MSPS).
+
+Current sensing can be implemented with dedicated current monitors, e.g. TSC101 to reduce count of
+components.
+
+\subsection{Board Control}
+All voltages are switchable from FPGA. The JTAG chain needs the option to disable individual
+sensors. Both features can make use of a 74HC259 IC to reduce number of lines.
+
+
+\subsection{Connectivity}
+All communication to the TRB3 should be differential, despite on some static signals. Test pads for
+most signals should be added to connect external, more precise instruments.
+
+
+\subsection{Test Features}
\begin{itemize*}
- \item Jumpers to bridge power supplies of both sensors to test running several sensors in
-parallel, at least for main voltages.
- \item Additional sense line for ground on sensors. E.g. for temperature measurement
- \item All converters switchable from FPGA - via SPI to reduce number of lines
- \item \discuss{There should be a way to set the latchup protection threshold quantitatively (via a DAC?).
- Sensors draw most current when they are being programmed. If the thresholds would be set digitally by
- the FPGA, the latchup protection could be set to an alternate threshold during programming and set back
- afterwards.
- }
- \end{itemize*}
+ \item The final setup will profit if the number of voltage regulators is reduced. We should
+prepare a test to run several sensors in parallel on one supply. That is, provide jumpers to bridge
+power supplies of both sensors to test running several sensors in parallel on all three voltages.
+\end{itemize*}
+
\subsection{Components}
\begin{itemize*}
- \item ADC, about 1 MSPS. AD7928 would fit perfectly. For all voltages, currents, temperatures. 7
-channels for each sensor.
\item Inductivities on power rails can be replaced by ferrite beads (less DC resistance, higher
current, smaller form factor), e.g. BLM41 and similar.
- \item current sensing: e.g. TSC101 instead of two opamps plus external components.
\end{itemize*}
-\section{Converter to Frontend Board}
-First iteration: \discuss{reuse old flex cables}, e.g. have both available cables (from converter
-and from queue board) in parallel or use two of the old cables. \discuss{Later, we can work on an
-optimized cable}:
-\begin{itemize*}
- \item Can use a thick, optimized flex cable
- \item Should foresee to be fed into the vacuum vessel
-\end{itemize*}
+\section{Cable CB to FEB}
+First iteration: Reuse old flex cables, two old cables should provide enough connections to the
+front-end board, also with respect to the number of additional monitoring signals needed.
+
+Later, a new cable can be developed taking into account that it will be fully placed outside the
+acceptance of the detector. I.e. a two-layer cable with broad ground and power planes should
+provide a much cleaner voltage for the sensor. One important fact is that this cable has to be fed
+into the vacuum vessel. The total length of the cable must at least 50 cm in the final version.
+
+The pin-out on the FEB should be slighly changed, at least a additional sense line for ground up to
+the sensor is needed. Using sense lines for the supply voltages would be nice but is most liekly
+not viable with the current bonding / cable set-up.
+
+\clearpage
+\section{Front-end Board (FEB)}
+
+\subsection{Jtag}
+The switches for bridging of sensors will be located on the CB as before, so no active
+components are necessary for Jtag.
+\discuss{Termination might be foreseen if necessary}.
+
+
+\subsection{Data}
+Data lines from the sensor can be forwarded directly to the CB.
+\subsection{Monitoring}
+All reference voltages from the sensors should be forwarded to the converter board. The critical
+signals like clamping and bias voltages can be decoupled from the sensor either by 0R resistors (to
+remove the connection when needed) or via impedance converters. This is possible since this version
+of front-end does not need to stand high radiation doses, the feature might be unnecessary on the
+final board and there is no harm if such a circuit fails.
-\section{Front-end Board}
+\section{Cable FEB to Sensors}
+There is no need to develop a new sensor flex print cable at the current stage. The final length of
+this cable is likely to be about 15 cm.
\end{document}
jspc29 / mvd_docu.git / commitdiff
