]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
frame reception deadlock solved.
authorMichael Boehmer <mboehmer@ph.tum.de>
Sun, 6 Nov 2022 20:18:58 +0000 (21:18 +0100)
committerMichael Boehmer <mboehmer@ph.tum.de>
Sun, 6 Nov 2022 20:18:58 +0000 (21:18 +0100)
gbe_trb/base/gbe_frame_receiver.vhd
gbe_trb/base/gbe_logic_wrapper.vhd
gbe_trb/base/gbe_receive_control.vhd
gbe_trb/protocols/gbe_response_constructor_ARP.vhd

index 73b5b73155900e1748b70b72309aa20116a00d93..c2120581839b913fe3ae60249a7897a5d594ff8e 100644 (file)
@@ -1,22 +1,11 @@
-LIBRARY IEEE;\r
-USE IEEE.std_logic_1164.ALL;\r
-USE IEEE.numeric_std.ALL;\r
-USE IEEE.std_logic_UNSIGNED.ALL;\r
+library IEEE;\r
+  use IEEE.std_logic_1164.all;\r
+  use IEEE.numeric_std.all;\r
+  use IEEE.std_logic_UNSIGNED.all;\r
 \r
 library work;\r
-use work.trb_net_std.all;\r
---use work.trb_net_components.all;\r
-use work.gbe_protocols.all;\r
-\r
---********\r
--- here all frame checking has to be done, if the frame fits into protocol standards\r
--- if so FR_FRAME_VALID_OUT is asserted after having received all bytes of a frame\r
--- otherwise, after receiving all bytes, FR_FRAME_VALID_OUT keeps low and the fifo is cleared\r
--- also a part of addresses assignment has to be done here\r
-\r
--- This entity receives an Ethernet frame, disassembles it and checks if the frame has to be processed.\r
--- In case, decoded information from header is stored in FIFOs and next stage is informed about available\r
--- data by FR_FRAME_VALID_OUT.\r
+  use work.trb_net_std.all;\r
+  use work.gbe_protocols.all;\r
 \r
 entity gbe_frame_receiver is\r
   port(\r
@@ -60,571 +49,441 @@ entity gbe_frame_receiver is
   );\r
 end gbe_frame_receiver;\r
 \r
--- This entity receives frames from the MAC. The MAC will send the frames once they are received\r
--- from SGMII core. Start of frame is marked by 'new_frame' signal. The incoming frame will be\r
--- reviewed, and checked if it should be forwarded to the next level.\r
--- First check is MAC address: only broadcast frames and frames with the board's MAC address are accepted.\r
--- VLAN tagged frames are handled, but will be checked later.\r
--- Second check is done inside gbe_type_validator: IPV4 UDP with correct port number are accepted,\r
--- as well as ICMP inside IPv4. In addition, in gbe_protocols more accepted combinations can be defined.\r
--- VLAN tagged frames are accepted, in case of tag == 0x0000, or if the VLAN tag is identical to one of the\r
--- two stored ones.\r
-\r
--- BUG: MAC_RX_ERROR is not really used. Broken frames will not be discarded!\r
-\r
--- BUG: no protection against overflow of FIFOs!\r
-\r
 architecture gbe_frame_receiver_arch of gbe_frame_receiver is\r
 \r
-  attribute syn_encoding  : string;\r
-  type filter_states is (IDLE, REMOVE_DEST, REMOVE_SRC, REMOVE_TYPE, SAVE_FRAME, DROP_FRAME,\r
-                         REMOVE_IP, REMOVE_UDP, DELAY, CLEANUP);\r
-  signal FILTER_CS, FILTER_NS : filter_states;\r
-  attribute syn_encoding of FILTER_CS : signal is "onehot";\r
-\r
-  signal fifo_wr_en                           : std_logic;\r
-  signal rx_bytes_ctr                         : std_logic_vector(15 downto 0);\r
-  signal frame_valid_q                        : std_logic;\r
-  signal delayed_frame_valid                  : std_logic;\r
-  signal delayed_frame_valid_q                : std_logic;\r
-\r
-  signal rec_fifo_empty                       : std_logic;\r
-  signal rec_fifo_full                        : std_logic;\r
-\r
-  signal remove_ctr                           : unsigned(7 downto 0);\r
-  signal new_frame                            : std_logic;\r
-  signal new_frame_lock                       : std_logic := '0';\r
-  signal saved_frame_type                     : std_logic_vector(15 downto 0);\r
-  signal saved_src_mac                        : std_logic_vector(47 downto 0);\r
-  signal saved_dest_mac                       : std_logic_vector(47 downto 0);\r
-  signal frame_type_valid                     : std_logic;\r
-  signal saved_proto                          : std_logic_vector(7 downto 0);\r
-  signal saved_src_ip                         : std_logic_vector(31 downto 0);\r
-  signal saved_dest_ip                        : std_logic_vector(31 downto 0);\r
-  signal saved_src_udp                        : std_logic_vector(15 downto 0);\r
-  signal saved_dest_udp                       : std_logic_vector(15 downto 0);\r
-\r
-  signal error_frames_ctr                     : unsigned(15 downto 0);\r
-  signal dbg_rec_frames                       : unsigned(31 downto 0);\r
-  signal dbg_drp_frames                       : unsigned(31 downto 0);\r
-  signal mon_rec_bytes                        : unsigned(31 downto 0);\r
-\r
-  signal state                                : std_logic_vector(3 downto 0);\r
-\r
-  signal rx_data                              : std_logic_vector(8 downto 0);\r
-  signal fr_q                                 : std_logic_vector(8 downto 0);\r
-\r
-  signal fr_src_ip                            : std_logic_vector(31 downto 0);\r
-  signal fr_dest_ip                           : std_logic_vector(31 downto 0);\r
-  signal fr_dest_udp                          : std_logic_vector(15 downto 0);\r
-  signal fr_src_udp                           : std_logic_vector(15 downto 0);\r
-  signal fr_frame_size                        : std_logic_vector(15 downto 0);\r
-  signal fr_dest_mac                          : std_logic_vector(47 downto 0);\r
-  signal fr_src_mac                           : std_logic_vector(47 downto 0);\r
-  signal fr_ps                                : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
-\r
-  signal oob_register_0_int                   : std_logic_vector(31 downto 0);\r
-  signal oob_register_1_int                   : std_logic_vector(31 downto 0);\r
-  signal oob_register_2_int                   : std_logic_vector(31 downto 0);\r
-  signal oob_register_3_int                   : std_logic_vector(31 downto 0);\r
-  signal oob_write                            : std_logic;\r
-\r
-  signal oob_select_x                         : std_logic;\r
-  signal oob_select                           : std_logic;\r
-\r
-  signal proto_select                         : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
-\r
-  signal set_proto_x                          : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);\r
-\r
-  signal fucking_vhdl                         : std_logic_vector(1 downto 0);\r
+  signal mac_rxd_q                                                      : std_logic_vector(7 downto 0);\r
+  signal mac_rx_en_q                                                  : std_logic;\r
+  signal mac_rx_er_q                                                  : std_logic;\r
+  signal mac_rx_eof_q                                                 : std_logic;\r
+  signal mac_rx_eof_qq                                                : std_logic;\r
+\r
+  type DECODE_STATES is (IDLE, STORE_HEADER, STORE_FRAME, IGNORE_FRAME, LAST_BYTE, WRITE_HDR, DELAY);\r
+  signal DECODE_CS, DECODE_NS: DECODE_STATES;\r
+\r
+  signal decode_fsm                          : std_logic_vector(3 downto 0);\r
+  signal decode_ctr                          : unsigned(7 downto 0);\r
+\r
+  signal is_my_mac_x                         : std_logic;\r
+  signal is_broadcast_x                      : std_logic;\r
+  signal is_arp_x                            : std_logic;\r
+  signal is_ipv4_x                           : std_logic;\r
+  signal is_version_x                        : std_logic;\r
+  signal is_udp_x                            : std_logic;\r
+  signal is_icmp_x                           : std_logic;\r
+  signal is_dhcp_x                           : std_logic;\r
+  signal is_sctrl_x                          : std_logic;\r
+\r
+  signal stored_src_mac                      : std_logic_vector(47 downto 0);\r
+  signal stored_dst_mac                      : std_logic_vector(47 downto 0);\r
+  signal stored_ethertype                    : std_logic_vector(15 downto 0);\r
+  signal stored_version                      : std_logic_vector(7 downto 0);\r
+  signal stored_protocol                     : std_logic_vector(7 downto 0);\r
+  signal stored_src_ip                       : std_logic_vector(31 downto 0);\r
+  signal stored_dst_ip                       : std_logic_vector(31 downto 0);\r
+  signal stored_src_port                     : std_logic_vector(15 downto 0);\r
+  signal stored_dst_port                     : std_logic_vector(15 downto 0);\r
+\r
+  signal fifo_pl_wr_x                        : std_logic;\r
+  signal fifo_pl_wr                          : std_logic;\r
+  signal fifo_hd_wr_x                        : std_logic;\r
+  signal fifo_hd_wr                          : std_logic;\r
+  signal fifo_hd_wr_q                        : std_logic;\r
+  signal fifo_hd_wr_qq                       : std_logic;\r
+  signal rst_bytes_x                         : std_logic;\r
+  signal rst_bytes                           : std_logic;\r
+\r
+  signal protocol_select                     : std_logic_vector(7 downto 0);\r
+\r
+  signal rx_bytes_ctr                        : unsigned(15 downto 0);\r
+  signal dbg_rec_frames                      : unsigned(31 downto 0);\r
+  signal dbg_drp_frames                      : unsigned(31 downto 0);\r
+  signal mon_rec_bytes                       : unsigned(31 downto 0);\r
+\r
+  signal fr_src_ip                           : std_logic_vector(31 downto 0);\r
+  signal fr_dest_ip                          : std_logic_vector(31 downto 0);\r
+  signal fr_dest_udp                         : std_logic_vector(15 downto 0);\r
+  signal fr_src_udp                          : std_logic_vector(15 downto 0);\r
+  signal fr_frame_size                       : std_logic_vector(15 downto 0);\r
+  signal fr_dest_mac                         : std_logic_vector(47 downto 0);\r
+  signal fr_src_mac                          : std_logic_vector(47 downto 0);\r
+  signal fr_ps                               : std_logic_vector(7 downto 0);\r
+  signal fr_q                                : std_logic_vector(8 downto 0);\r
+\r
+  signal oob_register_0_int                  : std_logic_vector(31 downto 0);\r
+  signal oob_register_1_int                  : std_logic_vector(31 downto 0);\r
+  signal oob_register_2_int                  : std_logic_vector(31 downto 0);\r
+  signal oob_register_3_int                  : std_logic_vector(31 downto 0);\r
+  signal oob_write                           : std_logic;\r
+  signal drop_frame_x                        : std_logic;\r
+  signal drop_frame                          : std_logic;\r
 \r
 begin\r
 \r
-  -- Debug lines\r
-  DEBUG_OUT(31 downto 28) <= state;\r
-  DEBUG_OUT(27 downto 16) <= (others => '0');\r
-\r
-  DEBUG_OUT(15)           <= frame_valid_q;\r
-  DEBUG_OUT(14)           <= fifo_wr_en;\r
-  DEBUG_OUT(13)           <= frame_type_valid;\r
-  DEBUG_OUT(12)           <= new_frame_lock;\r
-  DEBUG_OUT(11)           <= new_frame;\r
-  DEBUG_OUT(10)           <= MAC_RX_ER_IN;\r
-  DEBUG_OUT(9)            <= MAC_RX_EOF_IN;\r
-  DEBUG_OUT(8)            <= MAC_RX_EN_IN;\r
-  DEBUG_OUT(7 downto 0)   <= MAC_RXD_IN;\r
-\r
-  -- new_frame is asserted when first byte of the frame arrives\r
-  PROC_NEW_FRAME: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) )then\r
-      if   ( (LINK_OK_IN = '0') or (MAC_RX_EOF_IN = '1') ) then\r
-        new_frame <= '0';\r
-        new_frame_lock <= '0';\r
-      elsif( (new_frame_lock = '0') and (MAC_RX_EN_IN = '1') ) then\r
-        new_frame <= '1';\r
-        new_frame_lock <= '1';\r
-      else\r
-        new_frame <= '0';\r
-      end if;\r
-    end if;\r
-  end process PROC_NEW_FRAME;\r
+  -- buffer incoming signals\r
+  mac_rxd_q     <= MAC_RXD_IN    when rising_edge(CLK);\r
+  mac_rx_en_q   <= MAC_RX_EN_IN  when rising_edge(CLK);\r
+  mac_rx_eof_q  <= MAC_RX_EOF_IN when rising_edge(CLK);\r
+  mac_rx_er_q   <= MAC_RX_ER_IN  when rising_edge(CLK);\r
+  -- generate a "emergency stop" signal\r
+  mac_rx_eof_qq <= mac_rx_eof_q  when rising_edge(CLK);\r
 \r
-  PROC_FILTER_FSM: process( CLK, RESET )\r
+    -- FSM to decode the incoming stream\r
+  PROC_DECODE_FSM: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
-      FILTER_CS <= IDLE;\r
-      oob_select <= '0';\r
+      DECODE_CS <= IDLE;\r
+        fifo_pl_wr <= '0';\r
+        fifo_hd_wr <= '0';\r
+        drop_frame <= '0';\r
+        rst_bytes  <= '1';\r
     elsif( rising_edge(CLK) ) then\r
-      FILTER_CS <= FILTER_NS;\r
-      oob_select <= oob_select_x;\r
+      DECODE_CS <= DECODE_NS;\r
+      fifo_pl_wr <= fifo_pl_wr_x;\r
+      fifo_hd_wr <= fifo_hd_wr_x;\r
+      drop_frame <= drop_frame_x;\r
+      rst_bytes  <= rst_bytes_x;\r
     end if;\r
-  end process PROC_FILTER_FSM;\r
+  end process PROC_DECODE_FSM;\r
 \r
-  PROC_FILTER_TRANSITIONS : process( FILTER_CS, saved_frame_type, LINK_OK_IN, saved_proto, MY_MAC_IN,\r
-                                     saved_dest_mac, remove_ctr, new_frame, MAC_RX_EOF_IN, frame_type_valid, ALLOW_RX_IN)\r
+  PROC_DECODE_TRANSITIONS : process( DECODE_CS, MAC_RX_EN_IN, MAC_RX_EOF_IN, decode_ctr, mac_rx_eof_q,\r
+                                     is_my_mac_x, is_broadcast_x, is_arp_x, is_ipv4_x, is_udp_x,\r
+                                     is_version_x, is_sctrl_x, is_icmp_x )\r
   begin\r
-    set_proto_x <= (others => '0');\r
-    oob_select_x <= '0';\r
+    fifo_pl_wr_x <= '0';\r
+    fifo_hd_wr_x <= '0';\r
+    drop_frame_x <= '0';\r
+    rst_bytes_x <= '0';\r
 \r
-    case FILTER_CS is\r
+    case DECODE_CS is\r
 \r
       when IDLE =>\r
-        state <= x"1";\r
-        if( (new_frame = '1') and (ALLOW_RX_IN = '1') and (LINK_OK_IN = '1') ) then\r
-          FILTER_NS <= REMOVE_DEST;\r
-        else\r
-          FILTER_NS <= IDLE;\r
-        end if;\r
-\r
-      -- frames arrive without preamble!\r
-      when REMOVE_DEST =>\r
-        state <= x"3";\r
-        if( remove_ctr = x"03" ) then  -- counter starts with a delay that's why only 3\r
-          -- destination MAC address filtering here\r
-          if( (saved_dest_mac = MY_MAC_IN) or (saved_dest_mac = x"ffffffffffff") ) then  -- must accept broadcasts for ARP\r
-            FILTER_NS <= REMOVE_SRC;\r
+        decode_fsm <= x"0";\r
+          if( MAC_RX_EN_IN = '1' ) then\r
+            DECODE_NS <= STORE_HEADER;\r
           else\r
-            FILTER_NS <= DROP_FRAME; -- wrong MAC, were are done\r
-            -- could be done in REMOVE_SRC to gain some clock cycles\r
+            DECODE_NS <= IDLE;\r
           end if;\r
-        else\r
-          FILTER_NS <= REMOVE_DEST;\r
-        end if;\r
 \r
-      when REMOVE_SRC =>\r
-        state <= x"4";\r
-        if( remove_ctr = x"09" ) then\r
-          FILTER_NS <= REMOVE_TYPE;\r
-        else\r
-          FILTER_NS <= REMOVE_SRC;\r
-        end if;\r
-\r
-      when REMOVE_TYPE =>\r
-        state <= x"5";\r
-        if( remove_ctr = x"0b" ) then\r
-          case saved_frame_type is\r
-            when x"0800" =>\r
-              -- IPv4 frame, to be investigated\r
-              FILTER_NS <= REMOVE_IP;\r
-            when x"0806" =>\r
-              -- ARP frame, to be stored\r
-              FILTER_NS <= DELAY;\r
-              set_proto_x(0) <= '1';\r
-              -- NB: first two bytes of ARP frame are dropped silently\r
-            when others =>\r
-              FILTER_NS <= DROP_FRAME;\r
-          end case;\r
-        else\r
-          FILTER_NS <= REMOVE_TYPE;\r
-        end if;\r
-\r
-      when REMOVE_IP =>\r
-        state <= x"c";\r
-        if( remove_ctr = x"11" ) then\r
-          -- BUG: add check for 0x45 (IP version, header length) here.\r
-          --      Drop frames which do not comply with this!\r
-          case saved_proto is\r
-            when x"11" =>\r
-              -- UDP, to be investigated\r
-              FILTER_NS <= REMOVE_UDP;\r
-            when x"01" =>\r
-              -- ICMP, to be stored\r
-              FILTER_NS <= DELAY;\r
-              set_proto_x(4) <= '1';\r
-            when others =>\r
-              FILTER_NS <= DROP_FRAME;\r
-          end case;\r
-        else\r
-          FILTER_NS <= REMOVE_IP;\r
-        end if;\r
+      when STORE_HEADER =>\r
+        decode_fsm <= x"1";\r
+        DECODE_NS <= STORE_HEADER;\r
+        case decode_ctr is\r
+\r
+          when x"05" =>\r
+            -- drop frames which are not intended for us, and also not broadcast\r
+            if( (is_my_mac_x = '0') and (is_broadcast_x = '0') ) then\r
+              DECODE_NS <= IGNORE_FRAME;\r
+            end if;\r
+\r
+          when x"0d" =>\r
+            -- ARP frames are always accepted\r
+            if( (is_arp_x = '1') ) then\r
+              if( (mac_rx_eof_q = '0') ) then\r
+                -- payload available, store it\r
+                DECODE_NS <= STORE_FRAME;\r
+                fifo_pl_wr_x <= '1';\r
+              else\r
+                -- empty payload, must never happen with ARP, so we drop it\r
+                DECODE_NS <= LAST_BYTE;\r
+              end if;\r
+            end if;\r
+\r
+          when x"21" =>\r
+            if( (is_ipv4_x = '1') and (is_version_x = '1') ) then\r
+              -- correct IPv4 header\r
+              if( (is_icmp_x = '1' ) ) then\r
+                -- ICMP\r
+                if( (mac_rx_eof_q = '0') ) then\r
+                  -- payload available\r
+                  DECODE_NS <= STORE_FRAME;\r
+                  fifo_pl_wr_x <= '1';\r
+                else\r
+                  -- empty payload, must never happen with ICMP, so we drop it\r
+                  DECODE_NS <= LAST_BYTE;\r
+                end if;\r
+              end if;\r
+            end if;\r
+\r
+          when x"29" =>\r
+            if( (is_ipv4_x = '1') and (is_version_x = '1') ) then\r
+              -- correct IPv4 header\r
+              if( (is_udp_x = '1') ) then\r
+                -- UDP header\r
+                if   ( (is_dhcp_x = '1') or (is_sctrl_x = '1') ) then\r
+                  -- DHCP, SCTRL\r
+                  if( (mac_rx_eof_q = '0') ) then\r
+                    -- payload available\r
+                    DECODE_NS <= STORE_FRAME;\r
+                    fifo_pl_wr_x <= '1';\r
+                  else\r
+                    -- empty payload, store raw frame, check that later?\r
+                    DECODE_NS <= LAST_BYTE;\r
+                    fifo_hd_wr_x <= '1';\r
+                  end if;\r
+                end if;\r
+              end if;\r
+            end if;\r
+\r
+          when x"2a" =>\r
+            -- emergency output - frame could not be decoded\r
+            if( (mac_rx_eof_q = '0') ) then\r
+              -- frame reception still ongoing\r
+              DECODE_NS <= IGNORE_FRAME;\r
+              drop_frame_x <= '1';\r
+            else\r
+              -- already last byte\r
+              DECODE_NS <= LAST_BYTE;\r
+              drop_frame_x <= '1';\r
+            end if;\r
+\r
+          when others =>\r
+            null;\r
+        end case;\r
 \r
-      when REMOVE_UDP =>\r
-        state <= x"d";\r
-        if( remove_ctr = x"19" ) then\r
-          case saved_dest_udp is\r
-            when x"0044" =>\r
-              -- DHCP frame, to be stored\r
-              FILTER_NS <= DELAY;\r
-              set_proto_x(1) <= '1';\r
-            when x"6590" =>\r
-              -- SCTRL frame, to be stored\r
-              FILTER_NS <= DELAY;\r
-              set_proto_x(2) <= '1';\r
-            when others =>\r
-              FILTER_NS <= DROP_FRAME;\r
-              oob_select_x <= '1';\r
-            end case;\r
-        else\r
-          FILTER_NS <= REMOVE_UDP;\r
+        -- we need an emergency exit in case frame is "strange"!\r
+        if( (mac_rx_eof_qq = '1') ) then\r
+          DECODE_NS <= WRITE_HDR;\r
         end if;\r
 \r
-      when DELAY =>\r
-        state <= x"6";\r
-        FILTER_NS <= SAVE_FRAME;\r
-\r
-      when SAVE_FRAME =>\r
-        state <= x"7";\r
+      when IGNORE_FRAME =>\r
+        decode_fsm <= x"2";\r
         if( MAC_RX_EOF_IN = '1' ) then\r
-          FILTER_NS <= CLEANUP;\r
+          DECODE_NS <= WRITE_HDR;\r
         else\r
-          FILTER_NS <= SAVE_FRAME;\r
+          DECODE_NS <= IGNORE_FRAME;\r
         end if;\r
 \r
-      when DROP_FRAME =>\r
-        state <= x"8";\r
+      when STORE_FRAME =>\r
+        decode_fsm <= x"3";\r
+        fifo_pl_wr_x <= '1';\r
         if( MAC_RX_EOF_IN = '1' ) then\r
-          FILTER_NS <= CLEANUP;\r
+          DECODE_NS <= LAST_BYTE;\r
+          fifo_hd_wr_x <= '1';\r
         else\r
-          FILTER_NS <= DROP_FRAME;\r
+          DECODE_NS <= STORE_FRAME;\r
         end if;\r
 \r
-      when CLEANUP =>\r
-        state <= x"9";\r
-        FILTER_NS <= IDLE;\r
+      -- deassert FIFO write signal, in case it is active\r
+      when LAST_BYTE =>\r
+        decode_fsm <= x"4";\r
+        DECODE_NS <= WRITE_HDR;\r
+        rst_bytes_x <= '1';\r
+\r
+      when WRITE_HDR =>\r
+        decode_fsm <= x"5";\r
+        DECODE_NS <= DELAY;\r
+\r
+      when DELAY =>\r
+        decode_fsm <= x"6";\r
+        -- NEEDED for secret registers!\r
+        DECODE_NS <= IDLE;\r
 \r
-      when others => null;\r
+      when others =>\r
+        decode_fsm <= x"f";\r
+        DECODE_NS <= IDLE;\r
 \r
     end case;\r
-  end process PROC_FILTER_TRANSITIONS;\r
+  end process PROC_DECODE_TRANSITIONS;\r
 \r
-  -- protocol selection\r
-  PROC_PROTO_SEL: process( CLK, RESET )\r
+  -- counter for decoding the byte stream\r
+  PROC_DECODE_CTR: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
-      proto_select <= (others => '0');\r
+      decode_ctr <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      for I in c_MAX_PROTOCOLS - 1 downto 0 loop\r
-        if   ( set_proto_x(I) = '1' ) then\r
-          proto_select(I) <= '1';\r
-        elsif( FILTER_CS = CLEANUP ) then\r
-          proto_select(I) <= '0';\r
-        end if;\r
-      end loop;\r
-    end if;\r
-  end process PROC_PROTO_SEL;\r
-\r
-  -- counts the bytes to be removed from the ethernet headers fields\r
-  PROC_REMOVE_CTR: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( (FILTER_CS = IDLE) or\r
-            ((FILTER_CS = REMOVE_TYPE) and (remove_ctr = x"0b")) ) then\r
-        remove_ctr <= (others => '1');\r
-      elsif( (MAC_RX_EN_IN = '1') and (FILTER_CS /= IDLE) ) then\r
-        remove_ctr <= remove_ctr + 1;\r
-      end if;\r
-  end if;\r
-  end process PROC_REMOVE_CTR;\r
-\r
-  -- saves the IP protocol\r
-  PROC_SAVED_PROTO: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_proto <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"07") ) then\r
-        saved_proto <= MAC_RXD_IN;\r
-      end if;\r
-    end if;\r
-  end process PROC_SAVED_PROTO;\r
-\r
-  -- saves the destination mac address of the incoming frame\r
-  PROC_SAVED_DEST_MAC: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_dest_mac <= (others => '0');\r
-      elsif( (FILTER_CS = IDLE) and (MAC_RX_EN_IN = '1') and (new_frame = '0') ) then\r
-        saved_dest_mac(7 downto 0) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = IDLE) and (new_frame = '1') and (ALLOW_RX_IN = '1') ) then\r
-        saved_dest_mac(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_DEST) and (remove_ctr = x"FF") ) then\r
-        saved_dest_mac(23 downto 16) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_DEST) and (remove_ctr = x"00") ) then\r
-        saved_dest_mac(31 downto 24) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_DEST) and (remove_ctr = x"01") ) then\r
-        saved_dest_mac(39 downto 32) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_DEST) and (remove_ctr = x"02") ) then\r
-        saved_dest_mac(47 downto 40) <= MAC_RXD_IN;\r
-      end if;\r
-    end if;\r
-  end process PROC_SAVED_DEST_MAC;\r
-\r
-  -- saves the source mac address of the incoming frame\r
-  PROC_SAVED_SRC_MAC: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_src_mac <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_DEST) and (remove_ctr = x"03") )then\r
-        saved_src_mac(7 downto 0) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"04") ) then\r
-        saved_src_mac(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"05") ) then\r
-        saved_src_mac(23 downto 16) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"06") ) then\r
-        saved_src_mac(31 downto 24) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"07") ) then\r
-        saved_src_mac(39 downto 32) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"08") ) then\r
-        saved_src_mac(47 downto 40) <= MAC_RXD_IN;\r
-      end if;\r
-    end if;\r
-  end process PROC_SAVED_SRC_MAC;\r
-\r
-  -- saves the frame type of the incoming frame for futher check\r
-  PROC_SAVED_FRAME_TYPE: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_frame_type <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_SRC) and (remove_ctr = x"09") ) then\r
-        saved_frame_type(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_TYPE) and (remove_ctr = x"0a") ) then\r
-        saved_frame_type(7 downto 0) <= MAC_RXD_IN;\r
+      if( (DECODE_CS = STORE_HEADER) or (DECODE_CS = STORE_FRAME) ) then\r
+        decode_ctr <= decode_ctr + 1;\r
+      else\r
+        decode_ctr <= (others => '0');\r
       end if;\r
     end if;\r
-  end process PROC_SAVED_FRAME_TYPE;\r
+  end process PROC_DECODE_CTR;\r
 \r
-  PROC_SAVED_SRC_IP: process( CLK )\r
+  -- storing the relevant parts of headers for decision and further usage\r
+  PROC_STORE_INFO: process( CLK, RESET )\r
   begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_src_ip <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0a") ) then\r
-        saved_src_ip(7 downto 0) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0b") ) then\r
-        saved_src_ip(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0c") ) then\r
-        saved_src_ip(23 downto 16) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0d") ) then\r
-        saved_src_ip(31 downto 24) <= MAC_RXD_IN;\r
+    if   ( RESET = '1' ) then\r
+      stored_src_mac <= (others => '0');\r
+      stored_dst_mac <= (others => '0');\r
+      stored_ethertype <= (others => '0');\r
+      stored_version <= (others => '0');\r
+      stored_protocol <= (others => '0');\r
+      stored_src_ip <= (others => '0');\r
+      stored_dst_ip <= (others => '0');\r
+      stored_src_port <= (others => '0');\r
+      stored_dst_port <= (others => '0');\r
+    elsif( rising_edge(CLK) ) then\r
+      if( (MAC_RX_EN_IN = '1') and (mac_rx_en_q = '0') ) then\r
+        -- early bird\r
+        stored_dst_mac(7 downto 0) <= MAC_RXD_IN;\r
       end if;\r
-    end if;\r
-  end process PROC_SAVED_SRC_IP;\r
-\r
-  PROC_SAVED_DEST_IP: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_dest_ip <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0e") ) then\r
-        saved_dest_ip(7 downto 0) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"0f") ) then\r
-        saved_dest_ip(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"10") ) then\r
-        saved_dest_ip(23 downto 16) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_IP) and (remove_ctr = x"11") ) then\r
-        saved_dest_ip(31 downto 24) <= MAC_RXD_IN;\r
+      if( (mac_rx_en_q = '1') and (DECODE_CS = STORE_HEADER) ) then\r
+        case decode_ctr is\r
+          when x"00" => stored_dst_mac(15 downto 8)   <= MAC_RXD_IN;\r
+          when x"01" => stored_dst_mac(23 downto 16)  <= MAC_RXD_IN;\r
+          when x"02" => stored_dst_mac(31 downto 24)  <= MAC_RXD_IN;\r
+          when x"03" => stored_dst_mac(39 downto 32)  <= MAC_RXD_IN;\r
+          when x"04" => stored_dst_mac(47 downto 40)  <= MAC_RXD_IN;\r
+          when x"05" => stored_src_mac(7 downto 0)    <= MAC_RXD_IN;\r
+          when x"06" => stored_src_mac(15 downto 8)   <= MAC_RXD_IN;\r
+          when x"07" => stored_src_mac(23 downto 16)  <= MAC_RXD_IN;\r
+          when x"08" => stored_src_mac(31 downto 24)  <= MAC_RXD_IN;\r
+          when x"09" => stored_src_mac(39 downto 32)  <= MAC_RXD_IN;\r
+          when x"0a" => stored_src_mac(47 downto 40)  <= MAC_RXD_IN;\r
+          when x"0b" => stored_ethertype(15 downto 8) <= MAC_RXD_IN;\r
+          when x"0c" => stored_ethertype(7 downto 0)  <= MAC_RXD_IN;\r
+          when x"0d" => stored_version                <= MAC_RXD_IN;\r
+          when x"16" => stored_protocol               <= MAC_RXD_IN;\r
+          when x"19" => stored_src_ip(7 downto 0)     <= MAC_RXD_IN;\r
+          when x"1a" => stored_src_ip(15 downto 8)    <= MAC_RXD_IN;\r
+          when x"1b" => stored_src_ip(23 downto 16)   <= MAC_RXD_IN;\r
+          when x"1c" => stored_src_ip(31 downto 24)   <= MAC_RXD_IN;\r
+          when x"1d" => stored_dst_ip(7 downto 0)     <= MAC_RXD_IN;\r
+          when x"1e" => stored_dst_ip(15 downto 8)    <= MAC_RXD_IN;\r
+          when x"1f" => stored_dst_ip(23 downto 16)   <= MAC_RXD_IN;\r
+          when x"20" => stored_dst_ip(31 downto 24)   <= MAC_RXD_IN;\r
+          when x"21" => stored_src_port(15 downto 8)  <= MAC_RXD_IN;\r
+          when x"22" => stored_src_port(7 downto 0)   <= MAC_RXD_IN;\r
+          when x"23" => stored_dst_port(15 downto 8)  <= MAC_RXD_IN;\r
+          when x"24" => stored_dst_port(7 downto 0)   <= MAC_RXD_IN;\r
+          when others => null;\r
+        end case;\r
       end if;\r
-    end if;\r
-  end process PROC_SAVED_DEST_IP;\r
-\r
-  PROC_SAVED_SRC_UDP: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_src_udp <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_UDP) and (remove_ctr = x"12") ) then\r
-        saved_src_udp(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_UDP) and (remove_ctr = x"13") ) then\r
-        saved_src_udp(7 downto 0) <= MAC_RXD_IN;\r
+--     if( (DECODE_CS = WRITE_HDR) ) then\r
+      if( (DECODE_CS = DELAY) ) then\r
+        stored_src_mac <= (others => '0');\r
+        stored_dst_mac <= (others => '0');\r
+        stored_ethertype <= (others => '0');\r
+        stored_version <= (others => '0');\r
+        stored_protocol <= (others => '0');\r
+        stored_src_ip <= (others => '0');\r
+        stored_dst_ip <= (others => '0');\r
+        stored_src_port <= (others => '0');\r
+        stored_dst_port <= (others => '0');\r
       end if;\r
     end if;\r
-  end process PROC_SAVED_SRC_UDP;\r
-\r
-  PROC_SAVED_DEST_UDP: process( CLK )\r
+  end process PROC_STORE_INFO;\r
+\r
+  -- checks to filter frames, and distribute them to the correct handlers\r
+  is_my_mac_x    <= '1' when (stored_dst_mac = MY_MAC_IN) else '0';\r
+  is_broadcast_x <= '1' when (stored_dst_mac = x"ffffffffffff") else '0';\r
+  is_arp_x       <= '1' when (stored_ethertype = x"0806") else '0';\r
+  is_ipv4_x      <= '1' when (stored_ethertype = x"0800") else '0';\r
+  is_version_x   <= '1' when (stored_version = x"45") else '0';\r
+  is_udp_x       <= '1' when (stored_protocol = x"11") else '0';\r
+  is_icmp_x      <= '1' when (stored_protocol = x"01") else '0';\r
+  is_dhcp_x      <= '1' when (stored_dst_port = x"0044") else '0';\r
+  is_sctrl_x     <= '1' when (stored_dst_port = x"6590") else '0';\r
+\r
+  -- syncing signals\r
+  PROC_SYNC_SIGNALS: process( CLK )\r
   begin\r
     if( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = CLEANUP ) then\r
-        saved_dest_udp <= (others => '0');\r
-      elsif( (FILTER_CS = REMOVE_UDP) and (remove_ctr = x"14") ) then\r
-        saved_dest_udp(15 downto 8) <= MAC_RXD_IN;\r
-      elsif( (FILTER_CS = REMOVE_UDP) and (remove_ctr = x"15") ) then\r
-        saved_dest_udp(7 downto 0) <= MAC_RXD_IN;\r
-      end if;\r
+      protocol_select(7) <= '0';\r
+      protocol_select(6) <= '0';\r
+      protocol_select(5) <= '0';\r
+      protocol_select(4) <= is_icmp_x;\r
+      protocol_select(3) <= '0';\r
+      protocol_select(2) <= is_sctrl_x;\r
+      protocol_select(1) <= is_dhcp_x;\r
+      protocol_select(0) <= is_arp_x;\r
+      fifo_hd_wr_q       <= fifo_hd_wr;\r
+      fifo_hd_wr_qq      <= fifo_hd_wr_q;\r
     end if;\r
-  end process PROC_SAVED_DEST_UDP;\r
+  end process PROC_SYNC_SIGNALS;\r
 \r
-  PROC_FRAME_TYPE_VALID: process( CLK, RESET )\r
+  PROC_RX_BYTES_CTR: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
-      frame_type_valid <= '0';\r
+      rx_bytes_ctr <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      if   ( FILTER_CS = SAVE_FRAME ) then\r
-        frame_type_valid <= '1';\r
-      elsif( FILTER_CS = CLEANUP ) then\r
-        frame_type_valid <= '0';\r
+      if( rst_bytes = '1' ) then\r
+        rx_bytes_ctr <= (others => '0');\r
+      elsif( fifo_pl_wr = '1' ) then\r
+        rx_bytes_ctr <= rx_bytes_ctr + 1;\r
       end if;\r
     end if;\r
-  end process PROC_FRAME_TYPE_VALID;\r
+  end process PROC_RX_BYTES_CTR;\r
 \r
+  -- BUG: should be replaced by ring buffer\r
+  -- FIFO for payload storage\r
   THE_RECEIVE_FIFO: entity work.fifo_4096x9\r
   port map(\r
-    Data      => rx_data,\r
+    Data(8)          => mac_rx_eof_q,\r
+    Data(7 downto 0) => mac_rxd_q,\r
     WrClock   => CLK,\r
     RdClock   => CLK,\r
-    WrEn      => fifo_wr_en,\r
+    WrEn      => fifo_pl_wr,\r
     RdEn      => FR_RD_EN_IN,\r
     Reset     => RESET,\r
     RPReset   => RESET,\r
     Q         => fr_q,\r
-    Empty     => rec_fifo_empty,\r
-    Full      => rec_fifo_full\r
+    Empty     => open, -- BUG\r
+    Full      => open -- BUG\r
   );\r
 \r
-  -- killer ping\r
-  PROC_KILLER_PING: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if( (FILTER_CS = SAVE_FRAME) and\r
-          (saved_proto = x"01") and\r
-          (saved_frame_type = x"0800") and\r
-          (rx_bytes_ctr = x"001A") and\r
-          (rx_data(7 downto 0) = MY_TRBNET_ADDRESS_IN(7 downto 0)) and\r
-          (MAC_RXD_IN = MY_TRBNET_ADDRESS_IN(15 downto 8)) ) then\r
-        ISSUE_REBOOT_OUT <= '1';\r
-      else\r
-        ISSUE_REBOOT_OUT <= '0';\r
-      end if;\r
-    end if;\r
-  end process PROC_KILLER_PING;\r
-\r
-  -- secret register\r
-  PROC_SECRET_FRAME: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if( (oob_select = '1') and\r
-          (saved_proto = x"11") and\r
-          (saved_frame_type = x"0800") and\r
-          (saved_dest_udp = x"d903") and\r
-          (saved_src_udp = x"2b67") ) then\r
-        oob_write <= '1';\r
-      else\r
-        oob_write <= '0';\r
-      end if;\r
-    end if;\r
-  end process PROC_SECRET_FRAME;\r
-\r
-  PROC_SECRET_REGISTERS: process( CLK )\r
-  begin\r
-    if( rising_edge(CLK) ) then\r
-      if( oob_write = '1' ) then\r
-        case saved_src_ip(1 downto 0) is\r
-          when b"00"  => oob_register_0_int <= saved_dest_ip;\r
-          when b"01"  => oob_register_1_int <= saved_dest_ip;\r
-          when b"10"  => oob_register_2_int <= saved_dest_ip;\r
-          when others => oob_register_3_int <= saved_dest_ip;\r
-        end case;\r
-      end if;\r
-    end if;\r
-  end process PROC_SECRET_REGISTERS;\r
-\r
-  OOB_REGISTER_0_OUT <= oob_register_0_int;\r
-  OOB_REGISTER_1_OUT <= oob_register_1_int;\r
-  OOB_REGISTER_2_OUT <= oob_register_2_int;\r
-  OOB_REGISTER_3_OUT <= oob_register_3_int;\r
-\r
-  PROC_RX_FIFO_SYNC: process( CLK )\r
-  begin\r
-    if rising_edge(CLK) then\r
-\r
-      rx_data(8)          <= MAC_RX_EOF_IN;\r
-      rx_data(7 downto 0) <= MAC_RXD_IN;\r
-\r
-      if( MAC_RX_EN_IN = '1' ) then\r
-        if   ( FILTER_CS = SAVE_FRAME ) then\r
-          fifo_wr_en <= '1';\r
-        elsif( (FILTER_CS = DELAY) ) then\r
-          fifo_wr_en <= '1';\r
-        else\r
-          fifo_wr_en <= '0';\r
-        end if;\r
-      else\r
-        fifo_wr_en <= '0';\r
-      end if;\r
-\r
-    end if;\r
-  end process PROC_RX_FIFO_SYNC;\r
-\r
-  THE_MACS_FIFO: entity work.fifo_512x72\r
+  -- CAVEAT: writing to FIFO and reading needs some clock cycles?\r
+  -- Three is fine, two fails - data arrives late.\r
+  -- Happens when main control tries to read a frame directly when it was written.\r
+  \r
+  -- FIFO for header information\r
+  THE_FIRST_FIFO: entity work.fifo_512x72\r
   port map(\r
-    Data(47 downto 0)   => saved_src_mac,\r
-    Data(63 downto 48)  => saved_src_udp,\r
-    Data(71 downto 64)  => rx_bytes_ctr(7 downto 0), --(others => '0'),\r
+    Data(47 downto 0)   => stored_src_mac,\r
+    Data(63 downto 48)  => stored_src_port,\r
+    Data(71 downto 64)  => std_logic_vector(rx_bytes_ctr(7 downto 0)),\r
     WrClock             => CLK,\r
     RdClock             => CLK,\r
-    WrEn                => frame_valid_q,\r
+    WrEn                => fifo_hd_wr_q,\r
     RdEn                => FR_GET_FRAME_IN,\r
     Reset               => RESET,\r
     RPReset             => RESET,\r
     Q(47 downto 0)      => fr_src_mac,\r
     Q(63 downto 48)     => fr_src_udp,\r
-    Q(71 downto 64)     => fr_frame_size(7 downto 0), --open,\r
-    Empty               => open,\r
-    Full                => open\r
+    Q(71 downto 64)     => fr_frame_size(7 downto 0),\r
+    Empty               => open, -- BUG\r
+    Full                => open -- BUG\r
   );\r
 \r
-  THE_MACD_FIFO: entity work.fifo_512x72\r
+  -- FIFO for header information\r
+  THE_SECOND_FIFO: entity work.fifo_512x72\r
   port map(\r
-    Data(47 downto 0)   => saved_dest_mac,\r
-    Data(63 downto 48)  => saved_dest_udp,\r
-    Data(69 downto 64)  => proto_select,\r
-    Data(71 downto 70)  => (others => '0'),\r
+    Data(47 downto 0)   => stored_dst_mac,\r
+    Data(63 downto 48)  => stored_dst_port,\r
+    Data(71 downto 64)  => protocol_select,\r
     WrClock             => CLK,\r
     RdClock             => CLK,\r
-    WrEn                => frame_valid_q,\r
+    WrEn                => fifo_hd_wr_q,\r
     RdEn                => FR_GET_FRAME_IN,\r
     Reset               => RESET,\r
     RPReset             => RESET,\r
     Q(47 downto 0)      => fr_dest_mac,\r
     Q(63 downto 48)     => fr_dest_udp,\r
-    Q(69 downto 64)     => fr_ps,\r
-    Q(71 downto 70)     => fucking_vhdl, --open,\r
-    Empty               => open,\r
-    Full                => open\r
+    Q(71 downto 64)     => fr_ps,\r
+    Empty               => open, -- BUG\r
+    Full                => open -- BUG\r
   );\r
 \r
-  THE_IP_FIFO: entity work.fifo_512x72\r
+  -- FIFO for header information\r
+  THE_THIRD_FIFO: entity work.fifo_512x72\r
   port map(\r
-    Data(31 downto 0)   => saved_src_ip,\r
-    Data(63 downto 32)  => saved_dest_ip,\r
-    Data(71 downto 64)  => rx_bytes_ctr(15 downto 8), --saved_proto,\r
+    Data(31 downto 0)   => stored_src_ip,\r
+    Data(63 downto 32)  => stored_dst_ip,\r
+    Data(71 downto 64)  => std_logic_vector(rx_bytes_ctr(15 downto 8)),\r
     WrClock             => CLK,\r
     RdClock             => CLK,\r
-    WrEn                => frame_valid_q,\r
+    WrEn                => fifo_hd_wr_q,\r
     RdEn                => FR_GET_FRAME_IN,\r
     Reset               => RESET,\r
     RPReset             => RESET,\r
     Q(31 downto 0)      => fr_src_ip,\r
     Q(63 downto 32)     => fr_dest_ip,\r
-    Q(71 downto 64)     => fr_frame_size(15 downto 8), --open,\r
-    Empty               => open,\r
-    Full                => open\r
+    Q(71 downto 64)     => fr_frame_size(15 downto 8),\r
+    Empty               => open, -- BUG\r
+    Full                => open -- BUG\r
   );\r
 \r
-  PROC_SYNC: process( CLK )\r
+  PROC_OUT_SYNC: process( CLK )\r
   begin\r
     if( rising_edge(CLK) ) then\r
       FR_SRC_IP_ADDRESS_OUT   <= fr_src_ip;\r
@@ -635,57 +494,89 @@ begin
       FR_SRC_UDP_PORT_OUT     <= fr_src_udp;\r
       FR_FRAME_SIZE_OUT       <= fr_frame_size;\r
       FR_Q_OUT                <= fr_q;\r
-      FR_PS_OUT               <= fr_ps;\r
-      --\r
-      delayed_frame_valid     <= MAC_RX_EOF_IN;\r
-      delayed_frame_valid_q   <= delayed_frame_valid;\r
+      FR_PS_OUT               <= fr_ps(c_MAX_PROTOCOLS - 1 downto 0);\r
     end if;\r
-  end process PROC_SYNC;\r
+  end process PROC_OUT_SYNC;\r
+\r
+    -- signal for next stage: count up the "waiting frame" counter\r
+  FR_FRAME_VALID_OUT <= fifo_hd_wr_qq;\r
+\r
+  -- Debug lines\r
+  DEBUG_OUT(31 downto 0)   <= (others => '0');\r
 \r
-  -- Signal used to store auxiliary FIFO data at the end of frame\r
-  PROC_FRAME_VALID: process( CLK )\r
+  -- secret register\r
+  PROC_SECRET_FRAME: process( CLK )\r
   begin\r
     if( rising_edge(CLK) ) then\r
-      if( (MAC_RX_EOF_IN = '1') and (ALLOW_RX_IN = '1') and (frame_type_valid = '1') ) then\r
-        frame_valid_q <= '1';\r
+      if( (drop_frame = '1') and\r
+          (stored_protocol = x"11") and\r
+          (stored_ethertype = x"0800") and\r
+          (stored_dst_port = x"d903") and\r
+          (stored_src_port = x"2b67") ) then\r
+        oob_write <= '1';\r
       else\r
-        frame_valid_q <= '0';\r
+        oob_write <= '0';\r
       end if;\r
     end if;\r
-  end process PROC_FRAME_VALID;\r
+  end process PROC_SECRET_FRAME;\r
 \r
-  PROC_RX_BYTES_CTR: process( CLK, RESET )\r
+  PROC_SECRET_REGISTERS: process( CLK )\r
   begin\r
-    if   ( RESET = '1' ) then\r
-      rx_bytes_ctr <= x"0001";\r
-    elsif( rising_edge(CLK) ) then\r
-      if( delayed_frame_valid_q = '1' ) then\r
-        rx_bytes_ctr <= x"0001";\r
-      elsif( fifo_wr_en = '1' ) then\r
-        rx_bytes_ctr <= rx_bytes_ctr + 1;\r
+    if( rising_edge(CLK) ) then\r
+      if( oob_write = '1' ) then\r
+        case stored_src_ip(1 downto 0) is\r
+          when b"00"  => oob_register_0_int <= stored_dst_ip;\r
+          when b"01"  => oob_register_1_int <= stored_dst_ip;\r
+          when b"10"  => oob_register_2_int <= stored_dst_ip;\r
+          when others => oob_register_3_int <= stored_dst_ip;\r
+        end case;\r
       end if;\r
     end if;\r
-  end process PROC_RX_BYTES_CTR;\r
+  end process PROC_SECRET_REGISTERS;\r
+\r
+  OOB_REGISTER_0_OUT <= oob_register_0_int;\r
+  OOB_REGISTER_1_OUT <= oob_register_1_int;\r
+  OOB_REGISTER_2_OUT <= oob_register_2_int;\r
+  OOB_REGISTER_3_OUT <= oob_register_3_int;\r
 \r
-  -- Bullshit counter. Count condition is missing.\r
-  PROC_ERROR_FRAMES_CTR: process( CLK, RESET )\r
+  -- killer ping\r
+--  PROC_KILLER_PING: process( CLK )\r
+--  begin\r
+--    if( rising_edge(CLK) ) then\r
+--      if( (FILTER_CS = STORE_FRAME) and\r
+--          (stored_protocol = x"01") and\r
+--          (stored_ethertype = x"0800") and\r
+--          (rx_bytes_ctr = x"001A") and\r
+--          (rx_data(7 downto 0) = MY_TRBNET_ADDRESS_IN(7 downto 0)) and\r
+--          (MAC_RXD_IN = MY_TRBNET_ADDRESS_IN(15 downto 8)) ) then\r
+--        ISSUE_REBOOT_OUT <= '1';\r
+--      else\r
+--        ISSUE_REBOOT_OUT <= '0';\r
+--      end if;\r
+--    end if;\r
+--  end process PROC_KILLER_PING;\r
+\r
+  -- Counts received bytes as payload.\r
+  PROC_MON_REC_BYTES: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
-      error_frames_ctr <= (others => '0');\r
+      mon_rec_bytes <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      error_frames_ctr <= error_frames_ctr + 1;\r
+      if( fifo_pl_wr = '1' ) then\r
+        mon_rec_bytes <= mon_rec_bytes + 1;\r
+      end if;\r
     end if;\r
-  end process PROC_ERROR_FRAMES_CTR;\r
-\r
-  FR_FRAME_VALID_OUT <= frame_valid_q when rising_edge(CLK);\r
+  end process PROC_MON_REC_BYTES;\r
 \r
-  -- Bullshit counter. Count condition is missing.\r
+  -- Counts accepted frames.\r
   PROC_RECEIVED_FRAMES_CTR: process( CLK, RESET )\r
   begin\r
     if   ( RESET = '1' ) then\r
       dbg_rec_frames <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      dbg_rec_frames <= dbg_rec_frames + 1;\r
+      if( (fifo_hd_wr = '1') ) then\r
+                dbg_rec_frames <= dbg_rec_frames + 1;\r
+      end if;\r
     end if;\r
   end process PROC_RECEIVED_FRAMES_CTR;\r
 \r
@@ -695,7 +586,7 @@ begin
     if   ( RESET = '1' ) then\r
       dbg_drp_frames <= (others => '0');\r
     elsif( rising_edge(CLK) ) then\r
-      if( (FILTER_CS = DELAY) and (frame_type_valid = '0') ) then\r
+      if( (drop_frame = '1') ) then\r
         dbg_drp_frames <= dbg_drp_frames + 1;\r
       end if;\r
     end if;\r
@@ -705,16 +596,4 @@ begin
   MONITOR_RX_FRAMES_OUT <= std_logic_vector(dbg_rec_frames);\r
   MONITOR_RX_BYTES_OUT  <= std_logic_vector(mon_rec_bytes);\r
 \r
-  -- Counts received bytes as payload.\r
-  PROC_MON_REC_BYTES: process( CLK, RESET )\r
-  begin\r
-    if   ( RESET = '1' ) then\r
-      mon_rec_bytes <= (others => '0');\r
-    elsif( rising_edge(CLK) ) then\r
-      if( fifo_wr_en = '1' ) then\r
-        mon_rec_bytes <= mon_rec_bytes + x"1";\r
-      end if;\r
-    end if;\r
-  end process PROC_MON_REC_BYTES;\r
-\r
 end gbe_frame_receiver_arch;\r
index 8d8e075e9757822a4829a5b25971d2ab76c8798e..deab0cfca026b30820816fb651fe66a0ca527911 100644 (file)
@@ -148,8 +148,6 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
   
   signal link_ok                : std_logic;
   signal dhcp_done              : std_logic;
-
-  signal debug_fr               : std_logic_vector(31 downto 0);
   
   signal make_reset             : std_logic;
   signal frame_pause            : std_logic_vector(31 downto 0);
@@ -157,35 +155,31 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
   signal fr_ps_int              : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
 
   signal debug_main             : std_logic_vector(63 downto 0);
+  signal debug_fr               : std_logic_vector(31 downto 0);
+  signal debug_rc               : std_logic_vector(31 downto 0);
 
   begin
 
 ---------------------------------------------------------------------------------------------------
 ---------------------------------------------------------------------------------------------------
-----  DEBUG_OUT(31 downto 0)  <= (others => '0');
---  -- TX
---  DEBUG_OUT(31 downto 28) <= dbg_main(7 downto 4);
---  DEBUG_OUT(27)           <= '0';
---  DEBUG_OUT(26)           <= mc_transmit_done;
---  DEBUG_OUT(25)           <= mc_transmit_ctrl;
---  DEBUG_OUT(24)           <= mc_wr_en;
---  DEBUG_OUT(23 downto 20) <= dbg_main(15 downto 12);
---  DEBUG_OUT(19 downto 16) <= dbg_main(11 downto 8);
-----  DEBUG_OUT(23 downto 16) <= mc_data(7 downto 0);
---  -- RX
---  DEBUG_OUT(15)           <= rc_loading_done;
---  DEBUG_OUT(14)           <= rc_frame_ready;
---  DEBUG_OUT(13)           <= rc_frame_proto(4); -- ICMP
---  DEBUG_OUT(12)           <= rc_frame_proto(1); -- DHCP
---  DEBUG_OUT(11)           <= rc_frame_proto(0); -- ARP
---  DEBUG_OUT(10)           <= fr_get_frame;
---  DEBUG_OUT(9)            <= fr_frame_valid;
---  DEBUG_OUT(8)            <= fr_rd_en;
---  DEBUG_OUT(7 downto 0)   <= rc_q(7 downto 0);
+--  DEBUG_OUT(31 downto 0)  <= (others => '0');
+  DEBUG_OUT(31 downto 28) <= debug_fr(31 downto 28); -- frame receiver state
+  DEBUG_OUT(27 downto 24) <= debug_rc(3 downto 0); -- receive control state
+  DEBUG_OUT(23 downto 20) <= debug_main(23 downto 20); -- redirect state
+  DEBUG_OUT(19 downto 16) <= fr_ps_int(3 downto 0); --debug_main(27 downto 24); -- link state
+  DEBUG_OUT(15)           <= rc_loading_done;
+  DEBUG_OUT(14)           <= rc_frame_ready;
+  DEBUG_OUT(13)           <= fr_ps_int(4); --rc_frame_proto(4); -- ICMP
+  DEBUG_OUT(12)           <= fr_ps_int(1); --rc_frame_proto(1); -- DHCP
+  DEBUG_OUT(11)           <= fr_ps_int(0); --rc_frame_proto(0); -- ARP
+  DEBUG_OUT(10)           <= fr_get_frame;
+  DEBUG_OUT(9)            <= fr_frame_valid;
+  DEBUG_OUT(8)            <= fr_rd_en;
+  DEBUG_OUT(7 downto 0)   <= rc_q(7 downto 0);
 ---------------------------------------------------------------------------------------------------
 ---------------------------------------------------------------------------------------------------
-  DEBUG_OUT(31 downto 28)  <= debug_fr(31 downto 28); 
-  DEBUG_OUT(27 downto 0)   <= debug_main(27 downto 0);
+--  DEBUG_OUT(31 downto 28)  <= debug_fr(31 downto 28); 
+--  DEBUG_OUT(27 downto 0)   <= debug_main(27 downto 0);
 ---------------------------------------------------------------------------------------------------
 ---------------------------------------------------------------------------------------------------
 
@@ -318,7 +312,7 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
     port map(
       RESET                   => RESET,
       CLK                     => CLK_125_IN,
-      LINK_OK_IN              => LINK_ACTIVE_IN, --'1', -- BUG
+      LINK_OK_IN              => LINK_ACTIVE_IN,
       WR_EN_IN                => fc_wr_en,
       DATA_IN                 => fc_data,
       START_OF_DATA_IN        => fc_sod,
@@ -334,11 +328,11 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       SRC_IP_ADDRESS_IN       => fc_src_ip,
       SRC_UDP_PORT_IN         => fc_src_udp,
       FRAME_TYPE_IN           => fc_type,
-      IHL_VERSION_IN          => x"45", --fc_ihl_version,
-      TOS_IN                  => x"10", --fc_tos,
+      IHL_VERSION_IN          => x"45",
+      TOS_IN                  => x"10",
       IDENTIFICATION_IN       => fc_ident,
       FLAGS_OFFSET_IN         => fc_flags_offset,
-      TTL_IN                  => x"ff", --fc_ttl,
+      TTL_IN                  => x"ff",
       PROTOCOL_IN             => fc_protocol,
       FRAME_DELAY_IN          => frame_pause,
       FT_TX_DATA_OUT          => FT_TX_DATA_OUT,
@@ -383,7 +377,7 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       -- statistics
       FRAMES_RECEIVED_OUT     => rc_frames_rec_ctr,
       BYTES_RECEIVED_OUT      => rc_bytes_rec,
-      DEBUG_OUT               => open
+      DEBUG_OUT               => debug_rc
     );
     
   THE_FRAME_RECEIVER: entity work.gbe_frame_receiver
@@ -425,7 +419,7 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       MONITOR_RX_FRAMES_OUT   => MONITOR_RX_FRAMES_OUT,
       MONITOR_DROPPED_OUT     => MONITOR_DROPPED_OUT,
       --
-      DEBUG_OUT               => debug_fr --open
+      DEBUG_OUT               => debug_fr
     );
 
 end architecture gbe_logic_wrapper_arch;
index f364d758fa37f0d1f23a52dc16f5c4775dc8383a..1282b743479b74708b976db475e3d07f5825653e 100644 (file)
@@ -41,7 +41,7 @@ entity gbe_receive_control is
     FRAMES_RECEIVED_OUT      : out std_logic_vector(31 downto 0);\r
     BYTES_RECEIVED_OUT       : out std_logic_vector(31 downto 0);\r
     --\r
-    DEBUG_OUT                : out std_logic_vector(63 downto 0)\r
+    DEBUG_OUT                : out std_logic_vector(31 downto 0)\r
   );\r
 end gbe_receive_control;\r
 \r
@@ -64,6 +64,9 @@ architecture gbe_receive_control_arch of gbe_receive_control is
 \r
 begin\r
 \r
+  DEBUG_OUT(31 downto 4)   <= (others => '0');\r
+  DEBUG_OUT(3 downto 0)    <= state;\r
+  \r
   FR_RD_EN_OUT            <= RC_RD_EN_IN;\r
   RC_Q_OUT                <= RC_DATA_IN;\r
   RC_FRAME_SIZE_OUT       <= FR_FRAME_SIZE_IN;\r
@@ -101,6 +104,7 @@ begin
         load_next_state <= WAIT_ONE;\r
 \r
       when WAIT_ONE =>\r
+        state <= x"4";\r
         load_next_state <= READY;\r
 \r
       when READY => -- wait for reading out the whole frame\r
index 1384dd3b93b7a3f120a50dfd54e6a12e662e3b44..5533b64ecd48293e002d19c4a03d5e2a27bf18c6 100644 (file)
@@ -5,11 +5,16 @@ library ieee;
 library work;
   use work.gbe_protocols.all;
 
+-- BUG: doesnt use FRAME_SIZE, but fixed length.
+
+-- BUG: check (length == 28) for correct request.
+
+-- BUG: check request type at all.
+  
 entity gbe_response_constructor_ARP is
   port (
     CLK                    : in  std_logic;  -- system clock
     RESET                  : in  std_logic;
--- INTERFACE
     MY_MAC_IN              : in  std_logic_vector(47 downto 0);
     MY_IP_IN               : in  std_logic_vector(31 downto 0);
     PS_DATA_IN             : in  std_logic_vector(8 downto 0);
@@ -24,7 +29,6 @@ entity gbe_response_constructor_ARP is
     PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
     PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
     PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
---
     TC_RD_EN_IN            : in  std_logic;
     TC_DATA_OUT            : out std_logic_vector(8 downto 0);
     TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
@@ -37,8 +41,6 @@ entity gbe_response_constructor_ARP is
     TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
     TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
     TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
--- debug
     DEBUG_OUT              : out std_logic_vector(63 downto 0)
   );
 end gbe_response_constructor_ARP;