update basic template design for Trb5sc

diff --git a/template/config.vhd b/template/config.vhd
index 08a45eb273d285dd87b20f5c65ed46d1a9801650..c942c1f63e4631638f706aefa2558ae016cd47d6 100644 (file)
--- a/template/config.vhd
+++ b/template/config.vhd
@@ -50,7 +50,7 @@ package config is
     constant INCLUDE_UART           : integer  := c_NO;
     constant INCLUDE_SPI            : integer  := c_YES;
     constant INCLUDE_ADC            : integer  := c_NO;
-    constant USE_I2C                : integer  := c_NO;
+    constant INCLUDE_I2C            : integer  := c_NO;
     constant INCLUDE_DEBUG_INTERFACE: integer  := c_NO;
 
     --input monitor and trigger generation logic
@@ -111,7 +111,6 @@ function generateIncludedFeatures return std_logic_vector is
     t(15)           := '1'; --TDC
     t(17 downto 16) := std_logic_vector(to_unsigned(NUM_TDC_MODULES-1,2));
     t(28 downto 28) := std_logic_vector(to_unsigned(1-SERDES_NUM,1));
-    t(40 downto 40) := std_logic_vector(to_unsigned(INCLUDE_LCD,1));
     t(42 downto 42) := std_logic_vector(to_unsigned(INCLUDE_SPI,1));
     t(43 downto 43) := std_logic_vector(to_unsigned(INCLUDE_UART,1));
     t(44 downto 44) := std_logic_vector(to_unsigned(INCLUDE_STATISTICS,1));

diff --git a/template/config_compile_frankfurt.pl b/template/config_compile_frankfurt.pl
index c682b4a2ba4a426b285e194f9f1c8e70fb13e400..6c1aa49b0c99408e14f0e402c6897c251763b806 100644 (file)
--- a/template/config_compile_frankfurt.pl
+++ b/template/config_compile_frankfurt.pl
@@ -13,6 +13,7 @@ synplify_path                => '/d/jspc29/lattice/synplify/S-2021.09-SP2/',
 nodelist_file                => '../nodelist_frankfurt.txt',
 pinout_file                  => 'trb5sc_tdc',
 par_options                  => '../par.p2t',
+mapper_options               => ' ',
 
 
 #Include only necessary lpf files

diff --git a/template/nodelist_frankfurt.txt b/template/nodelist_frankfurt.txt
index 2e858da436774f84e271207e31526b04eecdbbb4..a4dff17dfc205a27c01076be09a7cd028d8618b6 100644 (file)
--- a/template/nodelist_frankfurt.txt
+++ b/template/nodelist_frankfurt.txt
@@ -1,6 +1,6 @@
 // nodes file for parallel place&route
 
-[jspc37]
+[jspc85]
 SYSTEM = linux
 CORENUM = 7
 ENV = /d/jspc29/lattice/310_settings.sh

diff --git a/template/par.p2t b/template/par.p2t
index e168739780856e902fadab4bc558dd559c40d98b..96da5b1d638a685f2c2e75f62b60426a6ea22c66 100644 (file)
--- a/template/par.p2t
+++ b/template/par.p2t
@@ -4,7 +4,7 @@
 #-m nodelist.txt       # Controlled by the compile.pl script.
 #-n 1                          # Controlled by the compile.pl script.
 -s 10
--t 11
+-t 8
 -c 2
 -e 2
 -i 10
@@ -67,3 +67,5 @@
 #  parPlcInLimit              Cannot find in the online help
 #  parPlcInNeighborSize        Cannot find in the online help
 -exp parHold=ON:parHoldLimit=10000:parCDP=1:parCDR=1:parPathBased=OFF:paruseNBR=1
+
+#-exp parCDP=1:parCDR=1:parPlcInLimit=0:parPlcInNeighborSize=1:parPathBased=ON:parHold=ON:parHoldLimit=10000:paruseNBR=1

diff --git a/template/trb5sc_template.prj b/template/trb5sc_template.prj
index 5fa2ccd1853be2e2c7a33f15e53f54b52aacb97e..ad431384c908f24ab4eb479b64ba6563c0ba96fb 100644 (file)
--- a/template/trb5sc_template.prj
+++ b/template/trb5sc_template.prj
@@ -44,7 +44,7 @@ project -result_format "edif"
 project -result_file "workdir/trb5sc_template.edf"
 set_option log_file "workdir/trb5sc_project.srf" 
 #implementation attributes
-
+set_option -vhdl2008 1
 set_option -vlog_std v2001
 set_option -project_relative_includes 1
 impl -active "workdir"
@@ -147,10 +147,10 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd"
 
 #########################################
 #channel 0, backplane
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"      
+#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"      
 
 #channel 1, SFP
-#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd"
 ##########################################
 
 add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"

diff --git a/template/trb5sc_template.vhd b/template/trb5sc_template.vhd
index 62a70d7850b8e050d933d38d0535fdae782a258b..9256c3f75a97110151953bc94fb7587c548d8b1a 100644 (file)
--- a/template/trb5sc_template.vhd
+++ b/template/trb5sc_template.vhd
@@ -175,6 +175,7 @@ THE_CAL_PLL : entity work.pll_in125_out50
   THE_MEDIA_INTERFACE : entity work.med_ecp5_sfp_sync
     generic map(
       SERDES_NUM    => 0,
+      USE_NEW_ECP5_RESET => 0,
       IS_SYNC_SLAVE => c_YES
       )
     port map(
@@ -436,9 +437,9 @@ THE_CAL_PLL : entity work.pll_in125_out50
 -------------------------------------------------------------------------------
 -- No trigger/data endpoint included
 -------------------------------------------------------------------------------
--- readout_tx(0).data_finished <= '1';
--- readout_tx(0).data_write    <= '0';
--- readout_tx(0).busy_release  <= '1';    
+readout_tx(0).data_finished <= '1';
+readout_tx(0).data_write    <= '0';
+readout_tx(0).busy_release  <= '1';    
   
 end architecture;