<spirit:views/>
<spirit:ports>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Clock</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Clock</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.AlmostFull</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_18x1k_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Clock</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Clock</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.Clock</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Empty</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Empty</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Empty</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Empty</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.Empty</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Full</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Full</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Full</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Full</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.Full</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_RdEn</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_RdEn</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_RdEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.RdEn</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.RdEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Reset</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Reset</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Reset</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Reset</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.Reset</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_WrEn</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_WrEn</spirit:displayName>
+ <spirit:name>fifo_18x1k_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_WrEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.WrEn</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x1k_oreg.WrEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_AlmostFull</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_AlmostFull</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_AlmostFull</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.AlmostFull</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.AlmostFull</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_18x256_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.Clock</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Empty</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Empty</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Empty</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.Empty</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.Empty</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Full</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Full</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Full</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.Full</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.Full</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RPReset</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_RPReset</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_RdEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.RPReset</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.RdEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RdClock</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_RdClock</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Reset</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.RdClock</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.Reset</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RdEn</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_RdEn</spirit:displayName>
+ <spirit:name>fifo_18x256_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_WrEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.RdEn</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x256_oreg.WrEn</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_18x512_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.AlmostFull</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Reset</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Reset</spirit:displayName>
+ <spirit:name>fifo_18x512_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Clock</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.Reset</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.Clock</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_18x512_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.Empty</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_18x512_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.Full</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_WrClock</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_WrClock</spirit:displayName>
+ <spirit:name>fifo_18x512_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_RdEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.WrClock</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.RdEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_WrEn</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_WrEn</spirit:displayName>
+ <spirit:name>fifo_18x512_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Reset</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.WrEn</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.Reset</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Data</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Data</spirit:displayName>
+ <spirit:name>fifo_18x512_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_WrEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Data</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_18x512_oreg.WrEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_36x128_OutReg_Q</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q</spirit:displayName>
+ <spirit:name>fifo_19x16_obuf_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_AlmostFull</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_36x128_OutReg.Q</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.AlmostFull</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_AmFullThresh</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_AmFullThresh</spirit:displayName>
+ <spirit:name>fifo_19x16_obuf_Clock</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Clock</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>6</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.AmFullThresh</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.Clock</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_19x16_obuf_Empty</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.Empty</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_19x16_obuf_Full</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.Full</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Data</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Data</spirit:displayName>
+ <spirit:name>fifo_19x16_obuf_RdEn</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.RdEn</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_19x16_obuf_Reset</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ <spirit:vendorExtensions>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.Reset</lattice:attribute>
+ </lattice:attributes>
+ </spirit:vendorExtensions>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_19x16_obuf_WrEn</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_WrEn</spirit:displayName>
<spirit:wire>
<spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.Data</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_19x16_obuf.WrEn</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
<spirit:port>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Q</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Q</spirit:displayName>
+ <spirit:name>fifo_36x16k_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_AlmostFull</spirit:displayName>
<spirit:wire>
<spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
</spirit:wire>
<spirit:vendorExtensions>
<lattice:attributes>
- <lattice:attribute lattice:name="exportFrom">FIFO_DC_36x128_DynThr_OutReg.Q</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_36x16k_oreg.AlmostFull</lattice:attribute>
</lattice:attributes>
</spirit:vendorExtensions>
</spirit:port>
- </spirit:ports>
- </spirit:model>
- <spirit:vendorExtensions>
- <lattice:device>LFE5UM-85F-8MG285C</lattice:device>
- <lattice:synthesis>synplify</lattice:synthesis>
- <lattice:date>2015-03-17.15:26:04</lattice:date>
- <lattice:modified>2015-03-17.15:29:04</lattice:modified>
- <lattice:diamond>3.4.0.80</lattice:diamond>
- <lattice:language>VHDL</lattice:language>
- <lattice:attributes>
- <lattice:attribute lattice:name="AddComponent">true</lattice:attribute>
- <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConnect">true</lattice:attribute>
- <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
- <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
- <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
- </lattice:attributes>
- <lattice:elements/>
- <lattice:lpc/>
- <lattice:groups/>
- </spirit:vendorExtensions>
- </spirit:component>
- <spirit:design>
- <spirit:vendor>LATTICE</spirit:vendor>
- <spirit:library>LOCAL</spirit:library>
- <spirit:name>FIFO</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>FIFO_36x128_OutReg</spirit:instanceName>
- <spirit:componentRef>
- <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
- <spirit:library>LEGACY</spirit:library>
- <spirit:name>FIFO</spirit:name>
- <spirit:version>5.0</spirit:version>
- <spirit:fileSets>
- <spirit:fileset>
- <spirit:name>Diamond_Simulation</spirit:name>
- <spirit:group>simulation</spirit:group>
- <spirit:file>
- <spirit:name>./FIFO_36x128_OutReg/FIFO_36x128_OutReg.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileset>
- <spirit:fileset>
- <spirit:name>Diamond_Synthesis</spirit:name>
- <spirit:group>synthesis</spirit:group>
- <spirit:file>
- <spirit:name>./FIFO_36x128_OutReg/FIFO_36x128_OutReg.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileset>
- </spirit:fileSets>
- <spirit:componentGenerators>
- <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
- <spirit:name>Configuration</spirit:name>
- <spirit:apiType>none</spirit:apiType>
- <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
- <spirit:group>CONFIG</spirit:group>
- </spirit:componentGenerator>
- <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
- <spirit:name>CreateNGD</spirit:name>
- <spirit:apiType>none</spirit:apiType>
- <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
- <spirit:group>CONFIG</spirit:group>
- </spirit:componentGenerator>
- </spirit:componentGenerators>
- <spirit:model>
- <spirit:views/>
- <spirit:ports>
- <spirit:port>
- <spirit:name>Clock</spirit:name>
- <spirit:displayName>Clock</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Empty</spirit:name>
- <spirit:displayName>Empty</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Full</spirit:name>
- <spirit:displayName>Full</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>RdEn</spirit:name>
- <spirit:displayName>RdEn</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Reset</spirit:name>
- <spirit:displayName>Reset</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>WrEn</spirit:name>
- <spirit:displayName>WrEn</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Data</spirit:name>
- <spirit:displayName>Data</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Q</spirit:name>
- <spirit:displayName>Q</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
+ <spirit:port>
+ <spirit:name>fifo_36x16k_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
<spirit:vendorExtensions>
- <lattice:synthesis>synplify</lattice:synthesis>
- <lattice:modified>2015-03-17.15:29:04</lattice:modified>
<lattice:attributes>
- <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
- <lattice:attribute lattice:name="BBox">false</lattice:attribute>
- <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
- <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
- <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
- <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
- <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
- <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_36x16k_oreg.Clock</lattice:attribute>
</lattice:attributes>
- <lattice:elements/>
- <lattice:lpc>
- <lattice:lpcsection lattice:name="Device"/>
- <lattice:lpcentry>
- <lattice:lpckey>Family</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>OperatingCondition</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Package</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PartName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PartType</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>SpeedGrade</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Status</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcsection lattice:name="IP"/>
- <lattice:lpcentry>
- <lattice:lpckey>CoreName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreRevision</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreStatus</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreType</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Date</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">03/17/2015</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>ModuleName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">FIFO_36x128_OutReg</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>SourceFormat</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">vhdl</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Time</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">15:27:43</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>VendorName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcsection lattice:name="Parameters"/>
- <lattice:lpcentry>
- <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Depth</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">128</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Destination</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>EDIF</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>EmpFlg</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>EnECC</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>EnFWFT</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Expression</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>FIFOImp</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>FullFlg</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>IO</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Order</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PeAssert</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PeDeassert</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PeMode</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PfAssert</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PfDeassert</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PfMode</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>RDataCount</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Reset</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Reset1</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>VHDL</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Verilog</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Width</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>regout</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcsection lattice:name="Command"/>
- <lattice:lpcentry>
- <lattice:lpckey>cmd_line</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">-w -n FIFO_36x128_OutReg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 128 -width 36 -regout -no_enable -pe -1 -pf -1 -sync_reset</lattice:lpcvalue>
- </lattice:lpcentry>
- </lattice:lpc>
- <lattice:groups/>
</spirit:vendorExtensions>
- </spirit:componentRef>
- </spirit:componentInstance>
- <spirit:componentInstance>
- <spirit:instanceName>FIFO_DC_36x128_DynThr_OutReg</spirit:instanceName>
- <spirit:componentRef>
- <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
- <spirit:library>LEGACY</spirit:library>
- <spirit:name>FIFO_DC</spirit:name>
- <spirit:version>5.7</spirit:version>
- <spirit:fileSets>
- <spirit:fileset>
- <spirit:name>Diamond_Simulation</spirit:name>
- <spirit:group>simulation</spirit:group>
- <spirit:file>
- <spirit:name>./FIFO_DC_36x128_DynThr_OutReg/FIFO_DC_36x128_DynThr_OutReg.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileset>
- <spirit:fileset>
- <spirit:name>Diamond_Synthesis</spirit:name>
- <spirit:group>synthesis</spirit:group>
- <spirit:file>
- <spirit:name>./FIFO_DC_36x128_DynThr_OutReg/FIFO_DC_36x128_DynThr_OutReg.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileset>
- </spirit:fileSets>
- <spirit:componentGenerators>
- <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
- <spirit:name>Configuration</spirit:name>
- <spirit:apiType>none</spirit:apiType>
- <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
- <spirit:group>CONFIG</spirit:group>
- </spirit:componentGenerator>
- <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
- <spirit:name>CreateNGD</spirit:name>
- <spirit:apiType>none</spirit:apiType>
- <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
- <spirit:group>CONFIG</spirit:group>
- </spirit:componentGenerator>
- </spirit:componentGenerators>
- <spirit:model>
- <spirit:views/>
- <spirit:ports>
- <spirit:port>
- <spirit:name>AlmostFull</spirit:name>
- <spirit:displayName>AlmostFull</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Empty</spirit:name>
- <spirit:displayName>Empty</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Full</spirit:name>
- <spirit:displayName>Full</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>RPReset</spirit:name>
- <spirit:displayName>RPReset</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>RdClock</spirit:name>
- <spirit:displayName>RdClock</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>RdEn</spirit:name>
- <spirit:displayName>RdEn</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Reset</spirit:name>
- <spirit:displayName>Reset</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>WrClock</spirit:name>
- <spirit:displayName>WrClock</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>WrEn</spirit:name>
- <spirit:displayName>WrEn</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>AmFullThresh</spirit:name>
- <spirit:displayName>AmFullThresh</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>6</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Data</spirit:name>
- <spirit:displayName>Data</spirit:displayName>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Q</spirit:name>
- <spirit:displayName>Q</spirit:displayName>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>35</spirit:left>
- <spirit:right>0</spirit:right>
- </spirit:vector>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>fifo_36x16k_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
<spirit:vendorExtensions>
- <lattice:synthesis>synplify</lattice:synthesis>
- <lattice:modified>2015-03-17.15:29:04</lattice:modified>
<lattice:attributes>
- <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
- <lattice:attribute lattice:name="BBox">false</lattice:attribute>
- <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
- <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
- <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
- <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
- <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
- <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
- <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="exportFrom">fifo_36x16k_oreg.Empty</lattice:attribute>
</lattice:attributes>
- <lattice:elements/>
- <lattice:lpc>
- <lattice:lpcsection lattice:name="Device"/>
- <lattice:lpcentry>
- <lattice:lpckey>Family</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>OperatingCondition</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Package</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PartName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>PartType</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>SpeedGrade</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Status</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcsection lattice:name="IP"/>
- <lattice:lpcentry>
- <lattice:lpckey>CoreName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">FIFO_DC</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreRevision</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">5.7</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreStatus</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CoreType</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Date</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">03/17/2015</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>ModuleName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">FIFO_DC_36x128_DynThr_OutReg</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>SourceFormat</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">vhdl</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Time</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">15:27:13</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>VendorName</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcsection lattice:name="Parameters"/>
- <lattice:lpcentry>
- <lattice:lpckey>ClockEn</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Depth</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">128</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>Destination</lattice:lpckey>
- <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
- </lattice:lpcentry>
- <lattice:lpcentry>
- <lattice:lpckey>EDIF</lattice:lpckey>
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+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:37:48</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1024</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">18</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_18x1k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 1024 -width 18 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_18x256_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_18x256_oreg/fifo_18x256_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_18x256_oreg/fifo_18x256_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>7</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>8</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_18x256_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:38:15</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">256</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">18</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_18x256_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 256 -width 18 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_18x512_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_18x512_oreg/fifo_18x512_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_18x512_oreg/fifo_18x512_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>8</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>9</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_18x512_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:38:36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">512</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">18</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_18x512_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 512 -width 18 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_19x16_obuf</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_19x16_obuf/fifo_19x16_obuf.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_19x16_obuf/fifo_19x16_obuf.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>3</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>18</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>18</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>4</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_19x16_obuf</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10:49:00</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">16</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">13</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">19</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_19x16_obuf -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 16 -width 19 -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x16k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x16k_oreg/fifo_36x16k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x16k_oreg/fifo_36x16k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>13</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>14</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x16k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:40:01</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">16384</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x16k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 16384 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x1k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x1k_oreg/fifo_36x1k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x1k_oreg/fifo_36x1k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>9</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>10</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x1k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:39:06</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1024</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x1k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 1024 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x2k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x2k_oreg/fifo_36x2k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x2k_oreg/fifo_36x2k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>10</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>11</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x2k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:39:22</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">2048</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x2k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 2048 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x32k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x32k_oreg/fifo_36x32k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x32k_oreg/fifo_36x32k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>14</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>15</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x32k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:40:22</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">32768</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x32k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 32768 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x4k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x4k_oreg/fifo_36x4k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x4k_oreg/fifo_36x4k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>11</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>12</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x4k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:39:33</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">4096</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x4k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 4096 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x512_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x512_oreg/fifo_36x512_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x512_oreg/fifo_36x512_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>8</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>9</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x512_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:40:56</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">512</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x512_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 512 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>fifo_36x8k_oreg</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x8k_oreg/fifo_36x8k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./fifo_36x8k_oreg/fifo_36x8k_oreg.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>AmFullThresh</spirit:name>
+ <spirit:displayName>AmFullThresh</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>12</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>35</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WCNT</spirit:name>
+ <spirit:displayName>WCNT</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>13</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">fifo_36x8k_oreg</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">11:39:45</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8192</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Dual Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">508</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Dynamic - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">36</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n fifo_36x8k_oreg -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 8192 -width 36 -regout -no_enable -pe -1 -pf 0 -reset_rel SYNC -fill</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ <spirit:componentInstance>
+ <spirit:instanceName>lattice_ecp5_fifo_18x1k</spirit:instanceName>
+ <spirit:componentRef>
+ <spirit:vendor>Lattice Semiconductor Corporation</spirit:vendor>
+ <spirit:library>LEGACY</spirit:library>
+ <spirit:name>FIFO</spirit:name>
+ <spirit:version>5.0</spirit:version>
+ <spirit:fileSets>
+ <spirit:fileset>
+ <spirit:name>Diamond_Simulation</spirit:name>
+ <spirit:group>simulation</spirit:group>
+ <spirit:file>
+ <spirit:name>./lattice_ecp5_fifo_18x1k/lattice_ecp5_fifo_18x1k.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ <spirit:fileset>
+ <spirit:name>Diamond_Synthesis</spirit:name>
+ <spirit:group>synthesis</spirit:group>
+ <spirit:file>
+ <spirit:name>./lattice_ecp5_fifo_18x1k/lattice_ecp5_fifo_18x1k.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ </spirit:fileset>
+ </spirit:fileSets>
+ <spirit:componentGenerators>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>Configuration</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_core.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ <spirit:componentGenerator spirit:hidden="true" spirit:scope="instance">
+ <spirit:name>CreateNGD</spirit:name>
+ <spirit:apiType>none</spirit:apiType>
+ <spirit:generatorExe>${sbp_path}/${instance}/generate_ngd.tcl</spirit:generatorExe>
+ <spirit:group>CONFIG</spirit:group>
+ </spirit:componentGenerator>
+ </spirit:componentGenerators>
+ <spirit:model>
+ <spirit:views/>
+ <spirit:ports>
+ <spirit:port>
+ <spirit:name>AlmostFull</spirit:name>
+ <spirit:displayName>AlmostFull</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Clock</spirit:name>
+ <spirit:displayName>Clock</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Empty</spirit:name>
+ <spirit:displayName>Empty</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Full</spirit:name>
+ <spirit:displayName>Full</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>RdEn</spirit:name>
+ <spirit:displayName>RdEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Reset</spirit:name>
+ <spirit:displayName>Reset</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>WrEn</spirit:name>
+ <spirit:displayName>WrEn</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Data</spirit:name>
+ <spirit:displayName>Data</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>in</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ <spirit:port>
+ <spirit:name>Q</spirit:name>
+ <spirit:displayName>Q</spirit:displayName>
+ <spirit:wire>
+ <spirit:direction>out</spirit:direction>
+ <spirit:vector>
+ <spirit:left>17</spirit:left>
+ <spirit:right>0</spirit:right>
+ </spirit:vector>
+ </spirit:wire>
+ </spirit:port>
+ </spirit:ports>
+ </spirit:model>
+ <spirit:vendorExtensions>
+ <lattice:synthesis>synplify</lattice:synthesis>
+ <lattice:modified>2015-03-20.11:42:43</lattice:modified>
+ <lattice:attributes>
+ <lattice:attribute lattice:name="AddComponent">false</lattice:attribute>
+ <lattice:attribute lattice:name="BBox">false</lattice:attribute>
+ <lattice:attribute lattice:name="Change4to5">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConfig">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeConnect">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeDevice">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeLocate">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePack">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangePart">false</lattice:attribute>
+ <lattice:attribute lattice:name="ChangeSynthesis">false</lattice:attribute>
+ <lattice:attribute lattice:name="CoreType">LPM</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_RXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="DCU_TXREFCLK">PRIMARY</lattice:attribute>
+ <lattice:attribute lattice:name="Migrate">false</lattice:attribute>
+ <lattice:attribute lattice:name="RemovedComponent">false</lattice:attribute>
+ </lattice:attributes>
+ <lattice:elements/>
+ <lattice:lpc>
+ <lattice:lpcsection lattice:name="Device"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>Family</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">ecp5um</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>OperatingCondition</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">COM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Package</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">CSFBGA285</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F-8MG285C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PartType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LFE5UM-85F</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SpeedGrade</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">8</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Status</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">C</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="IP"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">FIFO</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreRevision</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">5.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreStatus</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Demo</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>CoreType</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">LPM</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Date</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">03/20/2015</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ModuleName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">lattice_ecp5_fifo_18x1k</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>ParameterFileVersion</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1.0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>SourceFormat</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">VHDL</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Time</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10:58:50</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VendorName</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Lattice Semiconductor Corporation</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Parameters"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>CtrlByRdEn</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Depth</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1024</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Destination</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Synplicity</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EDIF</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EmpFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnECC</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>EnFWFT</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Expression</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">BusA(0 to 7)</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FIFOImp</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">EBR Based</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>FullFlg</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>IO</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Order</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Big Endian [MSB:LSB]</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">10</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">12</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PeMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfAssert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1020</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfDeassert</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">506</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>PfMode</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Static - Single Threshold</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>RDataCount</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Async</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Reset1</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">Sync</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>VHDL</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">1</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Verilog</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>Width</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">18</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcentry>
+ <lattice:lpckey>regout</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">0</lattice:lpcvalue>
+ </lattice:lpcentry>
+ <lattice:lpcsection lattice:name="Command"/>
+ <lattice:lpcentry>
+ <lattice:lpckey>cmd_line</lattice:lpckey>
+ <lattice:lpcvalue lattice:resolve="constant">-w -n lattice_ecp5_fifo_18x1k -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ebfifo -sync_mode -depth 1024 -width 18 -no_enable -pe -1 -pf 1020 -reset_rel SYNC</lattice:lpcvalue>
+ </lattice:lpcentry>
+ </lattice:lpc>
+ <lattice:groups/>
+ </spirit:vendorExtensions>
+ </spirit:componentRef>
+ </spirit:componentInstance>
+ </spirit:componentInstances>
+ <spirit:adHocConnections>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Empty</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_Empty"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Full</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_Full"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_RdEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_RdEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_Reset</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_Reset"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x1k_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x1k_oreg_WrEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="fifo_18x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x1k_oreg_WrEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Empty</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_Empty"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Full</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_Full"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_RdEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_RdEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_Reset</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_Reset"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x256_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x256_oreg_WrEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="fifo_18x256_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x256_oreg_WrEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Empty</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_Empty"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Full</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_Full"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_RdEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_RdEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_Reset</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_Reset"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_18x512_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_18x512_oreg_WrEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="fifo_18x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_18x512_oreg_WrEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_Clock</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_Empty</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Empty</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_Empty"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_Full</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Full</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_Full"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_RdEn</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_RdEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_RdEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_Reset</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_Reset</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_Reset"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_19x16_obuf_WrEn</spirit:name>
+ <spirit:displayName>fifo_19x16_obuf_WrEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="fifo_19x16_obuf"/>
+ <spirit:externalPortReference spirit:portRef="fifo_19x16_obuf_WrEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Empty</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_Empty"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_Full</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Full</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_Full"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_RdEn</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_RdEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_RdEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_Reset</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_Reset</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_Reset"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x16k_oreg_WrEn</spirit:name>
+ <spirit:displayName>fifo_36x16k_oreg_WrEn</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="fifo_36x16k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x16k_oreg_WrEn"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x1k_oreg_AlmostFull</spirit:name>
+ <spirit:displayName>fifo_36x1k_oreg_AlmostFull</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="AlmostFull" spirit:componentRef="fifo_36x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x1k_oreg_AlmostFull"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x1k_oreg_Clock</spirit:name>
+ <spirit:displayName>fifo_36x1k_oreg_Clock</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="fifo_36x1k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x1k_oreg_Clock"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x1k_oreg_Empty</spirit:name>
+ <spirit:displayName>fifo_36x1k_oreg_Empty</spirit:displayName>
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+ <spirit:displayName>fifo_36x512_oreg_Q[18]</spirit:displayName>
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+ </spirit:adHocConnection>
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+ </spirit:adHocConnection>
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+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[20]"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
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+ <spirit:internalPortReference spirit:portRef="Q[21]" spirit:componentRef="fifo_36x512_oreg"/>
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+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
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+ <spirit:internalPortReference spirit:portRef="Q[22]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[22]"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x512_oreg_Q[23]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[23]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[23]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[23]"/>
+ </spirit:adHocConnection>
+ <spirit:adHocConnection>
+ <spirit:name>fifo_36x512_oreg_Q[24]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[24]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[24]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[24]"/>
+ </spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Clock</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Clock</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Clock" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Clock"/>
+ <spirit:name>fifo_36x512_oreg_Q[25]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[25]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[25]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[25]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Empty</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Empty" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Empty"/>
+ <spirit:name>fifo_36x512_oreg_Q[26]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[26]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[26]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[26]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Full</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Full" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Full"/>
+ <spirit:name>fifo_36x512_oreg_Q[27]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[27]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[27]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[27]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_RdEn</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_RdEn</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="RdEn" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_RdEn"/>
+ <spirit:name>fifo_36x512_oreg_Q[28]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[28]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[28]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[28]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Reset</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Reset</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Reset" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Reset"/>
+ <spirit:name>fifo_36x512_oreg_Q[29]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[29]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[29]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[29]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_WrEn</spirit:name>
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- <spirit:internalPortReference spirit:portRef="WrEn" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_WrEn"/>
+ <spirit:name>fifo_36x512_oreg_Q[2]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[2]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[2]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[2]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_AlmostFull</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_AlmostFull"/>
+ <spirit:name>fifo_36x512_oreg_Q[30]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[30]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[30]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[30]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Empty</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_Empty"/>
+ <spirit:name>fifo_36x512_oreg_Q[31]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[31]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[31]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Full</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_Full"/>
+ <spirit:name>fifo_36x512_oreg_Q[32]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[32]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[32]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RPReset</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_RPReset</spirit:displayName>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_RPReset"/>
+ <spirit:name>fifo_36x512_oreg_Q[33]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[33]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[33]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[33]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RdClock</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_RdClock"/>
+ <spirit:name>fifo_36x512_oreg_Q[34]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[34]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[34]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_RdEn</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_RdEn"/>
+ <spirit:name>fifo_36x512_oreg_Q[35]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[35]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[35]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[35]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Reset</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_Reset"/>
+ <spirit:name>fifo_36x512_oreg_Q[3]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[3]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[3]" spirit:componentRef="fifo_36x512_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x512_oreg_Q[3]"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_WrClock</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_WrClock"/>
+ <spirit:name>fifo_36x512_oreg_Q[4]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[4]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[4]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_WrEn</spirit:name>
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- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_WrEn"/>
+ <spirit:name>fifo_36x512_oreg_Q[5]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[5]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[5]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:right="0" spirit:portRef="FIFO_36x128_OutReg_Data" spirit:left="35"/>
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+ <spirit:displayName>fifo_36x512_oreg_Q[6]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[6]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[0]"/>
- <spirit:internalPortReference spirit:portRef="Data[0]" spirit:componentRef="FIFO_36x128_OutReg"/>
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+ <spirit:displayName>fifo_36x512_oreg_Q[7]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[7]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[10]"/>
- <spirit:internalPortReference spirit:portRef="Data[10]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x512_oreg_Q[8]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[8]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[8]" spirit:componentRef="fifo_36x512_oreg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[11]"/>
- <spirit:internalPortReference spirit:portRef="Data[11]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x512_oreg_Q[9]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_Q[9]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[12]"/>
- <spirit:internalPortReference spirit:portRef="Data[12]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x512_oreg_WCNT</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_WCNT</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[13]"/>
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+ <spirit:name>fifo_36x512_oreg_WCNT[0]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_WCNT[0]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[14]"/>
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+ <spirit:name>fifo_36x512_oreg_WCNT[1]</spirit:name>
+ <spirit:displayName>fifo_36x512_oreg_WCNT[1]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[15]"/>
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+ <spirit:name>fifo_36x512_oreg_WCNT[2]</spirit:name>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[16]"/>
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+ <spirit:internalPortReference spirit:portRef="WCNT[3]" spirit:componentRef="fifo_36x512_oreg"/>
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+ <spirit:displayName>fifo_36x512_oreg_WCNT[4]</spirit:displayName>
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</spirit:adHocConnection>
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</spirit:adHocConnection>
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</spirit:adHocConnection>
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</spirit:adHocConnection>
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- <spirit:internalPortReference spirit:portRef="Data[24]" spirit:componentRef="FIFO_36x128_OutReg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[25]"/>
- <spirit:internalPortReference spirit:portRef="Data[25]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[11]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[11]</spirit:displayName>
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</spirit:adHocConnection>
<spirit:adHocConnection>
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- <spirit:internalPortReference spirit:portRef="Data[26]" spirit:componentRef="FIFO_36x128_OutReg"/>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[27]"/>
- <spirit:internalPortReference spirit:portRef="Data[27]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[1]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[1]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[28]"/>
- <spirit:internalPortReference spirit:portRef="Data[28]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[2]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[2]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[29]"/>
- <spirit:internalPortReference spirit:portRef="Data[29]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[3]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[3]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[2]"/>
- <spirit:internalPortReference spirit:portRef="Data[2]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[4]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[4]</spirit:displayName>
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</spirit:adHocConnection>
<spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[30]"/>
- <spirit:internalPortReference spirit:portRef="Data[30]" spirit:componentRef="FIFO_36x128_OutReg"/>
+ <spirit:name>fifo_36x8k_oreg_AmFullThresh[5]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[5]</spirit:displayName>
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</spirit:adHocConnection>
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- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Data[31]"/>
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+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[6]</spirit:displayName>
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+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[7]</spirit:displayName>
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- <spirit:internalPortReference spirit:portRef="Data[34]" spirit:componentRef="FIFO_36x128_OutReg"/>
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+ <spirit:displayName>fifo_36x8k_oreg_AmFullThresh[9]</spirit:displayName>
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- <spirit:internalPortReference spirit:portRef="Data[35]" spirit:componentRef="FIFO_36x128_OutReg"/>
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+ <spirit:displayName>fifo_36x8k_oreg_Data</spirit:displayName>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[0]</spirit:displayName>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[10]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[10]"/>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[11]</spirit:displayName>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[12]</spirit:displayName>
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- <spirit:internalPortReference spirit:portRef="Q[0]" spirit:componentRef="FIFO_36x128_OutReg"/>
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- <spirit:internalPortReference spirit:portRef="Q[10]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[10]"/>
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- <spirit:internalPortReference spirit:portRef="Q[11]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[11]"/>
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- <spirit:internalPortReference spirit:portRef="Q[12]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[12]"/>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[1]</spirit:displayName>
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- <spirit:displayName>FIFO_36x128_OutReg_Q[13]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[13]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[13]"/>
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+ <spirit:displayName>fifo_36x8k_oreg_Data[20]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[20]"/>
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</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[14]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[14]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[14]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[21]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[21]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[21]"/>
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</spirit:adHocConnection>
<spirit:adHocConnection>
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- <spirit:displayName>FIFO_36x128_OutReg_Q[15]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[15]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[15]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[22]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[22]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[22]"/>
+ <spirit:internalPortReference spirit:portRef="Data[22]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[16]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[16]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[16]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[23]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[23]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[23]"/>
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</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[17]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[17]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[17]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[24]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[24]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[24]"/>
+ <spirit:internalPortReference spirit:portRef="Data[24]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[18]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[18]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[18]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[25]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[25]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[25]"/>
+ <spirit:internalPortReference spirit:portRef="Data[25]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[19]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[19]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[19]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[19]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[26]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[26]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[26]"/>
+ <spirit:internalPortReference spirit:portRef="Data[26]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
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- <spirit:displayName>FIFO_36x128_OutReg_Q[1]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[1]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[1]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[27]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[27]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[27]"/>
+ <spirit:internalPortReference spirit:portRef="Data[27]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[20]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[20]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[20]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[28]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[28]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[28]"/>
+ <spirit:internalPortReference spirit:portRef="Data[28]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[21]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[21]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[21]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[29]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[29]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[29]"/>
+ <spirit:internalPortReference spirit:portRef="Data[29]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[22]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[22]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[22]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[2]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[2]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[2]"/>
+ <spirit:internalPortReference spirit:portRef="Data[2]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[23]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[23]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[23]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[30]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[30]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[30]"/>
+ <spirit:internalPortReference spirit:portRef="Data[30]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[24]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[24]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[24]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[24]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[31]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[31]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[31]"/>
+ <spirit:internalPortReference spirit:portRef="Data[31]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[25]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[25]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[25]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[25]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[32]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[32]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[32]"/>
+ <spirit:internalPortReference spirit:portRef="Data[32]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[26]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[26]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[26]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[33]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[33]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[33]"/>
+ <spirit:internalPortReference spirit:portRef="Data[33]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[27]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[27]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[27]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[34]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[34]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[34]"/>
+ <spirit:internalPortReference spirit:portRef="Data[34]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[28]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[28]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[28]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[28]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[35]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[35]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[35]"/>
+ <spirit:internalPortReference spirit:portRef="Data[35]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[29]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[29]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[29]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[29]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[3]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[3]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[3]"/>
+ <spirit:internalPortReference spirit:portRef="Data[3]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[2]</spirit:name>
- <spirit:displayName>FIFO_36x128_OutReg_Q[2]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[2]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[2]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[4]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[4]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[4]"/>
+ <spirit:internalPortReference spirit:portRef="Data[4]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[30]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[30]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[30]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[5]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[5]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[5]"/>
+ <spirit:internalPortReference spirit:portRef="Data[5]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[31]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[31]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[31]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[6]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[6]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[6]"/>
+ <spirit:internalPortReference spirit:portRef="Data[6]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[32]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[32]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[32]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[7]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[7]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[7]"/>
+ <spirit:internalPortReference spirit:portRef="Data[7]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_36x128_OutReg_Q[33]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[33]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[33]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[8]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[8]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[8]"/>
+ <spirit:internalPortReference spirit:portRef="Data[8]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[34]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[34]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[34]"/>
+ <spirit:name>fifo_36x8k_oreg_Data[9]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Data[9]</spirit:displayName>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Data[9]"/>
+ <spirit:internalPortReference spirit:portRef="Data[9]" spirit:componentRef="fifo_36x8k_oreg"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[35]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[35]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[35]"/>
+ <spirit:name>fifo_36x8k_oreg_Q</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q</spirit:displayName>
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+ <spirit:externalPortReference spirit:right="0" spirit:portRef="fifo_36x8k_oreg_Q" spirit:left="35"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[3]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[3]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[3]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[0]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[0]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[0]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[0]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[4]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[4]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[4]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[10]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[10]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[10]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[10]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[5]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[5]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[5]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[11]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[11]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[11]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[11]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[6]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[6]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[6]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[12]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[12]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[12]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[12]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[7]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[7]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[7]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[13]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[13]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[13]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[13]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[8]</spirit:name>
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- <spirit:internalPortReference spirit:portRef="Q[8]" spirit:componentRef="FIFO_36x128_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_36x128_OutReg_Q[8]"/>
+ <spirit:name>fifo_36x8k_oreg_Q[14]</spirit:name>
+ <spirit:displayName>fifo_36x8k_oreg_Q[14]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[14]" spirit:componentRef="fifo_36x8k_oreg"/>
+ <spirit:externalPortReference spirit:portRef="fifo_36x8k_oreg_Q[14]"/>
</spirit:adHocConnection>
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- <spirit:name>FIFO_36x128_OutReg_Q[9]</spirit:name>
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</spirit:adHocConnection>
<spirit:adHocConnection>
- <spirit:name>FIFO_DC_36x128_DynThr_OutReg_Q[9]</spirit:name>
- <spirit:displayName>FIFO_DC_36x128_DynThr_OutReg_Q[9]</spirit:displayName>
- <spirit:internalPortReference spirit:portRef="Q[9]" spirit:componentRef="FIFO_DC_36x128_DynThr_OutReg"/>
- <spirit:externalPortReference spirit:portRef="FIFO_DC_36x128_DynThr_OutReg_Q[9]"/>
+ <spirit:name>lattice_ecp5_fifo_18x1k_Q[9]</spirit:name>
+ <spirit:displayName>lattice_ecp5_fifo_18x1k_Q[9]</spirit:displayName>
+ <spirit:internalPortReference spirit:portRef="Q[9]" spirit:componentRef="lattice_ecp5_fifo_18x1k"/>
+ <spirit:externalPortReference spirit:portRef="lattice_ecp5_fifo_18x1k_Q[9]"/>
</spirit:adHocConnection>
</spirit:adHocConnections>
</spirit:design>
jspc29 / trbnet.git / commitdiff