update software version and media interface files

diff --git a/dirich/config_compile_frankfurt.pl b/dirich/config_compile_frankfurt.pl
index 7a12e89b57388b9bdbb2dbc20a871e564c497bdf..0c1f5aff068871aa88852eff72dd87dc6689b2f0 100644 (file)
--- a/dirich/config_compile_frankfurt.pl
+++ b/dirich/config_compile_frankfurt.pl
@@ -7,8 +7,8 @@ Speedgrade  => '8',
 TOPNAME                      => "dirich",
 lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de";
 lm_license_file_for_par      => "1702\@jspc29",
-lattice_path                 => '/d/jspc29/lattice/diamond/3.9_x64',
-synplify_path                => '/d/jspc29/lattice/synplify/K-2015.09/',
+lattice_path                 => '/d/jspc29/lattice/diamond/3.10_x64',
+synplify_path                => '/d/jspc29/lattice/synplify/O-2018.09-SP1',
 
 nodelist_file                => '../nodelist_frankfurt.txt',
 pinout_file                  => 'dirich2',

diff --git a/dirich/dirich.prj b/dirich/dirich.prj
index b7b584158eefa342cbe87310cb00788be9cde8eb..395db10b352721d1c2dd6142f6d21cdf2616f890 100644 (file)
--- a/dirich/dirich.prj
+++ b/dirich/dirich.prj
@@ -136,8 +136,8 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd"
 #add_file -verilog -lib work "diamond/pcs/serdes_sync_0/serdes_sync_0_softlogic.v"
 #add_file -vhdl -lib work "diamond/pcs/serdes_sync_0/serdes_sync_0.vhd"
 #add_file -vhdl -lib work "diamond/pcs/pcs.vhd"
-add_file -verilog -lib work "../cores/serdes_sync_0_softlogic.v"
-add_file -vhdl -lib work "../cores/serdes_sync_0.vhd"
+add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0/serdes_sync_0_softlogic.v"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.vhd"
 add_file -vhdl -lib work "../cores/pcs.vhd"
 
 #TrbNet Endpoint