-const char trbnet_version[] = "$Revision: 2.52 $";
+const char trbnet_version[] = "$Revision: 2.53 $";
#include <stdio.h>
#include <stdlib.h>
#include <signal.h>
+#include <unistd.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
+#include <sys/mman.h>
#include <sys/ipc.h>
#include <sys/sem.h>
#include <errno.h>
-#include <port.h>
#include <trberror.h>
#include "trbnet.h"
Status_Ch3_NoData = 5 /* nomoredata */
} Status_CH3;
-/* ------ Internal Functions FPGA Access -------------------------------- */
+/* ------ Internal Functions for FPGA access ------------------------------ */
#define FIFO_TOGGLE_BIT 0x10000
static uint32_t fifoToggleBit = 0;
+static volatile uint32_t* GPIOB_IN_OFFSET = NULL;
+static volatile uint32_t* GPIOC_IN_OFFSET = NULL;
+static volatile uint32_t* GPIOC_OUT_OFFSET = NULL;
+
+static inline uint32_t readPC()
+{
+ return *GPIOC_IN_OFFSET;
+}
+
+static inline void writePC(uint32_t data)
+{
+ *GPIOC_OUT_OFFSET = data;
+}
+
+static inline uint32_t readPB()
+{
+ return *GPIOB_IN_OFFSET;
+}
+
+static inline void setbitsPC(uint32_t bitmask)
+{
+ *GPIOC_OUT_OFFSET |= bitmask;
+}
+
+static inline void clrbitsPC(uint32_t bitmask)
+{
+ *GPIOC_OUT_OFFSET &= ~bitmask;
+}
static inline void write32_to_FPGA(uint16_t address, uint32_t value)
{
writePC((value & 0xffff) | fifoToggleBit);
}
-
static inline void read32_from_FPGA(uint16_t address, uint32_t* value)
{
/* reads a 32bit word from a given address on a given device */
/* Intit FPGA Interface */
int init_ports()
{
+ static const uint32_t GPIO_OFFSET = 0x1a000 / sizeof(uint32_t);
+ static const uint32_t GPIOB_OE_PINS = 0x0;
+ static const uint32_t GPIOC_OE_PINS = 0x3ffff;
+
+ volatile uint32_t* GPIOC_OE_OFFSET = NULL;
+ volatile uint32_t* GPIOB_OE_OFFSET = NULL;
+ uint32_t* GPIO_PTR = NULL;
+
+ int memfd;
+ uint32_t *mem = NULL;
+
/* Set signal mask for blocking */
sigemptyset(&blockSet);
sigaddset(&blockSet, SIGINT);
sigaddset(&blockSet, SIGTERM);
sigemptyset(&blockSetOld);
-
- if (port_init_ports() != 0) {
- /* Set trberrno ?? */
- return -1;
- }
-
+
/* Get / Create semaphore */
if ((semid = semget(sem_key, 1,
IPC_CREAT | IPC_EXCL |
}
}
- /* Reset Ports */
- com_reset();
+ /* Open shared memory and initialize FIFO pointers */
+ memfd = open("/dev/mem", O_RDWR);
+ if (memfd < 0) {
+ trb_errno = TRB_FIFO_SHARED_MEM;
+ return -1;
+ }
+
+ mem = mmap((void*)0,
+ 2 * 4 * 4 * 8192,
+ PROT_READ | PROT_WRITE,
+ MAP_SHARED,
+ memfd,
+ 0xb0000000);
+ if ((void*)mem == MAP_FAILED) {
+ trb_errno = TRB_FIFO_SHARED_MEM;
+ return -1;
+ }
+
+ /* GPIO */
+ GPIO_PTR = mem + GPIO_OFFSET;
+
+ GPIOB_IN_OFFSET = (0x24 / sizeof(uint32_t)) + GPIO_PTR;
+ GPIOC_OUT_OFFSET = (0x30 / sizeof(uint32_t)) + GPIO_PTR;
+ GPIOB_OE_OFFSET = (0x28 / sizeof(uint32_t)) + GPIO_PTR;
+
+ GPIOC_IN_OFFSET = (0x34 / sizeof(uint32_t)) + GPIO_PTR;
+ GPIOC_OE_OFFSET = (0x38 / sizeof(uint32_t)) + GPIO_PTR;
+
+ close(memfd);
+
+ if (lockPorts() == -1) return -1;
+
+ /* Set output enabled if not done yet */
+ if ((*GPIOB_OE_OFFSET != GPIOB_OE_PINS) ||
+ (*GPIOC_OE_OFFSET != GPIOC_OE_PINS)) {
+ /* read: all bits on portB */
+ *GPIOB_OE_OFFSET = GPIOB_OE_PINS;
+
+ /* write: portC[17-0] */
+ *GPIOC_OE_OFFSET = GPIOC_OE_PINS;
+
+ /* Reset Ports */
+ setbitsPC(0x30000);
+ clrbitsPC(0x30000);
+ }
+
+ if (unlockPorts() == -1) return -1;
+
return 0;
}
void close_ports()
{
- port_close_ports();
+ GPIOB_IN_OFFSET = NULL;
+ GPIOC_IN_OFFSET = NULL;
+ GPIOC_OUT_OFFSET = NULL;
}
int trb_fifo_flush(uint8_t channel)