\pdfoutput=1 % only if pdf/png/jpg images are used
\documentclass{JINST}
+\usepackage{caption}
\usepackage{subcaption}
+\usepackage{lineno}
-\title{A novel approach for pulse width measurements with a high resolution
-(8.7~ps) TDC in an FPGA}
+\title{A novel approach for pulse width measurements with a high
+precision (8~ps RMS) TDC in an FPGA}
\author{C. Ugur$^a$\thanks{Corresponding author.}~,
S. Linev$^b$,
\abstract{High precision time measurements are a crucial element in particle
identification experiments, which likewise require pulse width information for
-charge and Time-over-Threshold (ToT) measurements. In almost all of the
-FPGA-based TDC applications, pulse width measurements are implemented using two
-of the TDC channels for leading and trailing edge time measurements
-individually. This method however, requires double the number of resources and
-therefore this paper presents a novel way of measuring pulse width using a
-single TDC channel, while still achieving high precision (as low as 12~ps RMS).}
+Time-over-Threshold (ToT) measurements and charge measurements (correlated with
+pulse width). In almost all of the FPGA-based TDC applications, pulse width
+measurements are implemented using two of the TDC channels for leading and
+trailing edge time measurements individually. This method however, requires
+twice the number of resources. In this paper we present the latest precision
+improvements in the high precision TDC (8~ps RMS ) developed before
+\cite{tdc_ieee}, as well as the novel way of measuring ToT using a single TDC
+channel, while still achieving high precision (as low as 11.7~ps RMS).}
\keywords{Front-end electronics for detector readout; Digital electronic
circuits}
\begin{document}
+\setpagewiselinenumbers
+\linenumbers
\section{Introduction}
High precision Time-to-Digital converters (TDCs) are mainly used in high energy
multi-pixel photon counter) are used to measure the energy deposited in the
material by reconstructing a given property of the output pulse - the total
charge collected, the pulse amplitude, etc \cite{tot}. Because of the recent
-developments of high precision TDCs and the superiority of the ToT measurements
+developments of high precision TDCs and the advantages of the ToT measurements
over the amplitude and charge measurements in terms of cost and wider dynamic
range, this method is becoming more attractive for the recent studies.
environment variation effects.
This study is based on the previous TDC design \cite{tdc_ieee} for single edge
-measurements applying tapped delay line method, as its superiority in range,
-dead time and especially in precision. The work is further developed to react
-to both edges of a signal for a ToT measurement with a novel approach.
+measurements applying tapped delay line method, due its advantages in range,
+dead time and especially in precision. The work is further developed to react to
+both edges of a signal for a ToT measurement with a novel approach.
\section{Architecture}
whereas the propagation of the signal is stopped with the next rising edge of
the 200~MHz clock signal. The output of the delay line, as thermometer code, is
then sent to the decoder for the conversion to binary code. This data, as well
-as the time stamp from the epoch and coarse counters with 5~ns granularity, are
-saved in a ring-buffer. The readout and slow control of the TDC is based on the
-TRBNet protocol \cite{trbnet}.
+as the time stamp from the coarse and epoch (extension of the coarse counter)
+counters with 5~ns granularity, are saved in a ring-buffer. The readout and slow
+control of the TDC is based on the TRBNet protocol \cite{trbnet} developed for
+TDC Readout Boards (TRB \cite{trb3}).
\begin{figure}[tbp]
\begin{subfigure}{.45\textwidth}
\centering
- \includegraphics[width=.9\linewidth]{../figures/tdc/tdc_arch.pdf}
+ \includegraphics[width=.9\linewidth]{figures/tdc_arch.pdf}
\caption{TDC architecture}
\end{subfigure}%
\begin{subfigure}{.55\textwidth}
\centering
- \includegraphics[width=.9\linewidth]{../figures/tdc/tappedDelayLine.eps}
+ \includegraphics[width=.9\linewidth]{figures/tappedDelayLine.pdf}
\caption{Tapped delay line}
\end{subfigure}%
\caption{The architecture of the TDC and the tapped delay line method.}
\begin{figure}[tbp]
\centering
\includegraphics[width=.5\textwidth]
- {../figures/tdc/stretcher_semiAsync.eps}
+ {figures/stretcher_semiAsync.pdf}
\caption{Semi-asynchronous stretcher logic is implemented before the delay
line in order to keep the timing of the leading edge of the input signal ($hit$)
and stretch the trailing edge beyond the clock period. The $hit_{in}$ signal to
In conventional TDCs the input pulse is internally split and the leading and
trailing edges are measured in two separate TDC channels. Although this method
is straightforward and easy to implement, it is not resource efficient. For both
-edges double the amount of resources in the FPGA must be used.
+edges twice the amount of resources in the FPGA must be used.
\subsection{Semi-asynchronous stretcher for ToT measurements}
As the TDC channels are once again active as soon as the dead time after a
successful measurement is over (in our case this value is 20~ns), for pulses
-longer than this dead time the channel resources are active again. With this
-way, a channel first measures the leading edge of the input pulse and then, when
-the channel is active again, it measures the trailing edge.
+longer than this dead time the channel resources are active again. In this way,
+a channel first measures the leading edge of the input pulse and then, when the
+channel is active again, it measures the trailing edge.
As our TDC architecture is sensitive to the rising edges of positive input
pulses, we generate two short positive pulses (still longer than a clock period)
then the dead time. At the end, the data are written in the ring-buffer with one
extra bit as an edge type marker.
-Reusing the resources in this manner enables a compacter design with double the
+Reusing the resources in this manner enables a compacter design with twice the
number of channels in an FPGA. However, this is only possible, if the width of
the input pulse is larger than the dead time of a channel.
\centering
\begin{subfigure}[b]{.7\textwidth}
\includegraphics[width=1\linewidth]
- {../figures/tdc/stretcher_timing_semiAsync.eps}
+ {figures/stretcher_timing_semiAsync.pdf}
\caption{Timing diagram of the ToT method without the delay circuit}
\label{fig:stretcherTimingSemi}
\end{subfigure}%
\begin{subfigure}[b]{.7\textwidth}
\includegraphics[width=1\linewidth]
- {../figures/tdc/stretcher_timing_fullAsync.eps}
+ {figures/stretcher_timing_fullAsync.pdf}
\caption{Timing diagram of the ToT method with the delay circuit}
\label{fig:stretcherTimingFull}
\end{subfigure}%
The full-asynchronous stretcher consists of two semi-asynchronous stretchers
(sensitive to two different edges as explained above) and a delay circuit for
the trailing edge. The timing diagram for this method is shown in
-figure~\ref{fig:stretcherTimingFull}. The pulse $hit_l$ is measured as normal in
-the TDC channel, while the $hit_t$ pulse is delayed in the FPGA ($hit_d$) and
-injected back in to the channel. The delay circuit is a chain of several
+figure~\ref{fig:stretcherTimingFull}. The pulse $hit_l$ is measured as normal
+in the TDC channel, while the $hit_t$ pulse is delayed in the FPGA ($hit_d$)
+and injected back in to the channel. The delay circuit is a chain of several
inverters connected one after another. The inverters are placed far away from
each other in the FPGA in order to take advantage of the long propagation time
of the normal routing through the switching circuitry, buffers and metal
interconnects. In the FPGA that we use - Lattice ECP3 FPGA with 150K logic
elements - the routing from one corner to the diagonally opposite corner takes
-approximately 10~ns. By increasing the number of laps between the corners delays
-longer than the intrinsic TDC dead time are achievable.
+approximately 10~ns. By increasing the number of laps between the corners
+delays longer than the intrinsic TDC dead time are achievable.
Using this circuitry allows us to measure both edges of pulses shorter than the
-dead time of the TDC on a single channel. The disadvantage of this method is the
-extra dead time after the measurement of the trailing edge, which limits the
-measurement of double pulse with offsets less than the total dead time (pulse
-length + stretcher delay + conversion dead time). Also, the non-deterministic
-stretching time between the channels and the design compilations has to be
-tackled to get the real time information.
+dead time of the TDC on a single channel. The disadvantage of this method is
+the extra dead time after the measurement of the trailing edge, which limits
+the measurement of double pulse which are separated in time less than the total
+dead time (pulse length + stretcher delay + conversion dead time). Also, the
+non-deterministic stretching time between the channels and the design
+compilations has to be tackled to get the real time information.
% \subsection{Stretcher offset calculation and calibration}
% With the method mentioned above the time measured is the sum of the pulse width
\section{Tests}
The test setup consists of two FPGA boards; one as the pulse generator and the
-other as the TDC board (TRB3 \cite{trb3}). The pulse generator board uses an
-ecp2m-100 FPGA, where as the TDC is implemented in an ecp3-150 FPGA both from
+other as the TDC board (TRB3). The pulse generator board uses an
+ECP2M-100 FPGA, where as the TDC is implemented in an ECP3-150 FPGA both from
Lattice. The pulse generator design generates groups of 4 bit data with 150~MHz
and this data is serialised with a DDR2 module from the FPGA vendor at 600~MHz
clock frequency. This way, pulses or patterns with 1.67~ns resolution are
\begin{figure}[tbp]
\centering
- \includegraphics[width=.5\textwidth]
- {../figures/tdc/9ps_res.eps}
- \caption{The precision of a sample channel for leading edge measurement.}
+ \includegraphics[width=.48\textwidth]
+ {figures/tdiff_8ps.pdf}
+ %{figures/9ps_res.pdf}
+ \caption{The precision of a sample channel for a leading edge measurement.
+(The mean and precision values are in nanoseconds.)}
\label{fig:precisionLeading}
\end{figure}
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=.8\linewidth]
- {../figures/tdc/t_diff_tot_alternating.eps}
+ {figures/tot_alternating_10psRMS.pdf}
\caption{Conventional method.}
\label{fig:precisionToTalt}
\end{subfigure}%
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=.8\linewidth]
- {../figures/tdc/t_diff_tot_stretcher_high_precision.eps}
+ {figures/tot_stretcher_12psRMS.pdf}
\caption{Novel method.}
\label{fig:precisionToTstretch}
\end{subfigure}%
\caption{The width of a pulse is measured both with the conventional and novel
methods. A negligible change in the precision is inspected between the two
-methods.}
+methods. (The mean and precision values are in nanoseconds.)}
\label{fig:precisionToT}
\end{figure}
tested by selecting one of the 64 channels as the reference channel and
calculating the time difference between each channel and the reference channel.
The precision is calculated as the RMS of the time distribution of the
-measurement and among 64 channels precision values fluctuate between 8.7~ps and
+measurement and among 64 channels precision values fluctuate between 8~ps and
10.9~ps. In figure~\ref{fig:precisionLeading} an exemplary measurement shows a
-precision of 8.7~ps. As this value combines the precision of two channels, the
-single channel precision can be determined as 6.15~ps.
+precision of 8~ps. As this value combines the precision of two channels, the
+single channel precision can be determined as 5.66~ps.
The same test is applied for the ToT measurement by generating a short pulse
-(1.67~ns) at the pulse generator and splitting to each channel. First the
-conventional method - two channels for the measurement - is used and the best
-precision is calculated as 12.2~ps (figure~\ref{fig:precisionToTalt}). The same
-test is done the with the novel method for comparison and the best precision is
-calculated as 12.1~ps (figure~\ref{fig:precisionToTstretch}). The precision
-among the channels varied between 12.1~ps and 17.9~ps.
+(3.32~ns) at the pulse generator and splitting to each channel. First the
+conventional method - two channels for the measurement - is used and the
+precision is measured between 10.3~ps and 13~ps among the channels. The same
+test is done the with the novel method for comparison and the precision is
+calculated between 11.7~ps and 15.3~ps. The sample channel precisions are shown
+in figure~\ref{fig:precisionToT} for both measurements.
The mean values of the histograms with the conventional and novel method do not
-match with the measured pulse width - (1.67~ns) - because of the offset between
+match with the measured pulse width - (3.32~ns) - because of the offset between
the channels and the offset induced by the stretcher respectively, which have
not yet been accounted for. In order to test the pulse width measurement we
applied a pulse width sweep and measured the shift in the mean value with both
\begin{figure}[tbp]
\centering
- \includegraphics[width=.6\textwidth]{../figures/tdc/tot_sweep.pdf}
+ \includegraphics[width=.6\textwidth]{figures/tot_sweep.pdf}
\caption{ToT sweep with 1.6~ns granularity.}
\label{fig:totSweep}
\end{figure}
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=.8\linewidth]
- {../figures/tdc/rms_trb3_with_dcdc.eps}
+ {figures/rms_trb3_with_dcdc.pdf}
\caption{With DC-DC converters.}
\label{fig:rmsWITHdcdc}
\end{subfigure}%
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=.8\linewidth]
- {../figures/tdc/rms_trb3_without_dcdc.eps}
+ {figures/rms_trb3_without_dcdc.pdf}
\caption{With a linear power supply.}
\label{fig:rmsNOdcdc}
\end{subfigure}%
\subsection{Effect of temperature over ToT}
The effect of the temperature on the ToT measurements are observed by building a
-setup consisting of a ventilator and a TRB3 board. The temperature of the FPGA
-is varied by adjusting the ventilator speed. The temperature of the FPGA is
+setup consisting of a ventilator and a TRB3. The temperature of the FPGA is
+varied by adjusting the ventilator speed. The temperature of the FPGA is
measured by a temperature sensor on the board close to the FPGA. 14 different
measurements are done in the temperature range of 36.8$^{\circ}$C and
42.8$^{\circ}$C. The mean of the ToT measurements are plotted as a function of
temperature. The other is the secondary effect of the temperature change on
different ToT offsets, as the effect of temperature is higher on the longer
stretcher offsets due to larger intrinsic delays of the electronic components
-on the delay lines.
+on the delay lines. The average relative effect of the temperature on delay
+line is calculated as $\sim$1.3$\%/^{\circ}$C.
-The temperature correction is done by fitting a linear line to the temperature
-curve of a channel (e.g. channel 12) - which lies in the middle of the spread -
-and using the slope for correction. By selecting a channel in the middle the
-absolute deviations of the ToT of the channels from the initial values are
-minimised.
+The temperature correction coefficient is calculated iteratively until the
+smallest ToT deviation among every channel at the measured temperatures is
+reached.
-The secondary effect of the temperature change is corrected by applying another
-linear fit on the curve of the shift in ToT as a function of the stretcher
-offset (figure~\ref{fig:totVSoffset}). The slope of the linear fit is used as a
+The secondary effect of the temperature change is corrected by applying a
+linear fit on the curve of the shifts in ToT as a function of the stretcher
+offsets at the maximum temperature (42.8$^{\circ}$C)
+(figure~\ref{fig:totVSoffset}). The slope of the linear fit is used as a
correction coefficient.
Both corrections can be written in a single equation as:
Applying only the temperature correction of the above equation, the maximum ToT
shift can be corrected by a factor of $\sim$4
(figure~\ref{fig:totVStemp_tempCorr}). This correction factor increases to
-$\sim$10 limiting the ToT shift with $\sim$50~ps over 6$^{\circ}$C temperature
+$\sim$10 limiting the ToT shift with $\sim$65~ps over 6$^{\circ}$C temperature
change, when both - temperature and offset - corrections are applied.
\begin{figure}[tbp]
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=1\linewidth]
- {../figures/tdc/temp_vs_tot.pdf}
+ {figures/temp_vs_tot.pdf}
\caption{The shift of the ToT with temperature.}
\label{fig:totVStemp}
\end{subfigure}%
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=1\linewidth]
- {../figures/tdc/temp_TOToffset_vs_TOTshift_@43C.pdf}
+ {figures/temp_TOToffset_vs_TOTshift_@43C.pdf}
\caption{ToT shift @42.8$^{\circ}$C as a function of stretcher offset.}
\label{fig:totVSoffset}
\end{subfigure}%
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=1\linewidth]
- {../figures/tdc/temp_vs_tot_with_tempCorrection.pdf}
+ {figures/temp_vs_tot_with_tempCorrection.pdf}
\caption{Correction only with temperature coefficient.}
\label{fig:totVStemp_tempCorr}
\end{subfigure}%
\begin{subfigure}{.5\textwidth}
\centering
\includegraphics[width=1\linewidth]
- {../figures/tdc/temp_vs_tot_with_bothCorrection.pdf}
+ {figures/temp_vs_tot_with_bothCorrection.pdf}
\caption{Correction with temperature \& offset coefficients.}
\label{fig:totVStempCorrected2}
\end{subfigure}%
\section{Conclusion}
In this paper we presented our novel way of measuring ToT on an FPGA TDC using a
single channel. Based on the conducted tests precision of the leading edge
-measurement is recorded as low as 8.7~ps, suggesting 6.15~ps error on a single
+measurement is recorded as low as 8~ps, resulting in 5.66~ps error on a single
channel. The precisions for ToT measurements with the conventional and novel
-methods are recorded as 12.2~ps and 12.1~ps respectively. The novel method is
+methods are recorded as 10.3~ps and 11.7~ps respectively. The novel method is
investigated further to find out, that the ToT value differs maximum 38~ps from
the oscilloscope measurements once the stretcher offset is eliminated. It is
also discovered that the deterioration in the long time interval measurement
precision can be limited to 3~ps, if the FPGA is powered with a linear power
-supply. The effect of the temperature change on the ToT measurement is also
-assessed and the degeneration is improved by a factor of $\sim$10 and limited to
-$\sim$50~ps with a correction model.
+supply.
+
+The effect of the temperature change on the ToT measurement is also assessed and
+the average relative effect of the temperature on delay line is calculated as
+$\sim$1.3$\%/^{\circ}$C. This result shows that the with the increasing length
+of the delay line and temperature difference the shift in the mean value
+increases. This degeneration is corrected by a factor of $\sim$10 and limited to
+$\sim$65~ps with a correction model.
+With correct environmental conditions and controlling, the temperature change
+can be minimised to less then 1$^{\circ}$C. Although in many high energy
+physics applications high precision ToT measurements are not required, if
+necessary, the conventional method should be used, as the temperature effect
+plays a minimal role.
\begin{thebibliography}{9}
+\bibitem{tdc_ieee}
+C. Ugur et al.,
+\emph{264 Channel TDC Platform applying 65 channel high precision (7.2~ps~RMS)
+FPGA based TDCs}
+\href{http://ieeexplore.ieee.org/xpl/abstractKeywords.jsp?arnumber=6658234}
+{\emph{2013 IEEE Nordic Mediterranean Workshop on Time-to-Digital Converters
+(NoMe TDC)}, 1-5, (Oct., 2013).}
+
\bibitem{tot}
F. Gonnella et al.,
\emph{Time over threshold in the presence of noise},
the GANDALF module},
\emph{Topical workshop on electronics for particle physics 2011}, (Sep., 2011).
-\bibitem{tdc_ieee}
-C. Ugur et al.,
-\emph{264 Channel TDC Platform applying 65 channel high precision (7.2~ps~RMS)
-FPGA based TDCs}
-\href{http://ieeexplore.ieee.org/xpl/abstractKeywords.jsp?arnumber=6658234}
-{\emph{2013 IEEE Nordic Mediterranean Workshop on Time-to-Digital Converters
-(NoMe TDC)}, 1-5, (Oct., 2013).}
-
\bibitem{kalisz}
J. Kalisz,
\emph{Review of methods for time interval measurements with picosecond
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