if (clk_enable = '1') then
shiftregister_out(data_length - 1 downto 1) <= shiftregister_out(data_length - 2 downto 0);
shiftregister_out(0) <= '0';
+ shiftregister_in <= shiftregister_in(data_length - 2 downto 0) & spi_data_from_chip;
state <= sendbit2;
end if;
when sendbit2 => --pull clock high
spi_clk <= '1';
if (clk_enable = '1') then
- shiftregister_in <= shiftregister_in(data_length - 2 downto 0) & spi_data_from_chip;
if (wordcounter = data_length - 1) then -- we are done...
state <= loading1;
else