use work.trb_net_std.all;
use work.trb_net_components.all;
use work.trb3_components.all;
---use work.trb_net16_hub_func.all;
use work.version.all;
use work.trb_net_gbe_components.all;
use work.med_sync_define_RS.all;
+-- BUG: backplane handling!!!
+
entity trb3sc_gbe_hub is
port(
CLK_SUPPL_PCLK : in std_logic; --125 MHz for GbE
CLK_EXT_PLL_LEFT : in std_logic; --External Clock
--Additional IO
HDR_IO : inout std_logic_vector(10 downto 1);
- BACK_LVDS : inout std_logic_vector( 1 downto 0);
- BACK_GPIO : inout std_logic_vector( 3 downto 0);
--LED
LED_GREEN : out std_logic;
LED_YELLOW : out std_logic;
LED_ORANGE : out std_logic;
LED_RED : out std_logic;
- LED_RJ_GREEN : out std_logic_vector( 1 downto 0);
- LED_RJ_RED : out std_logic_vector( 1 downto 0);
- LED_WHITE : out std_logic_vector( 1 downto 0);
- LED_SFP_GREEN : out std_logic_vector( 1 downto 0);
- LED_SFP_RED : out std_logic_vector( 1 downto 0);
+ LED_RJ_GREEN : out std_logic_vector(1 downto 0);
+ LED_RJ_RED : out std_logic_vector(1 downto 0);
+ LED_WHITE : out std_logic_vector(1 downto 0);
+ LED_SFP_GREEN : out std_logic_vector(1 downto 0);
+ LED_SFP_RED : out std_logic_vector(1 downto 0);
--SFP
- SFP_LOS : in std_logic_vector( 1 downto 0);
- SFP_MOD0 : in std_logic_vector( 1 downto 0);
- SFP_MOD1 : inout std_logic_vector( 1 downto 0) := (others => 'Z');
- SFP_MOD2 : inout std_logic_vector( 1 downto 0) := (others => 'Z');
- SFP_TX_DIS : out std_logic_vector( 1 downto 0) := (others => '0');
+ SFP_LOS : in std_logic_vector(1 downto 0);
+ SFP_MOD0 : in std_logic_vector(1 downto 0);
+ SFP_MOD1 : inout std_logic_vector(1 downto 0) := (others => 'Z');
+ SFP_MOD2 : inout std_logic_vector(1 downto 0) := (others => 'Z');
+ SFP_TX_DIS : out std_logic_vector(1 downto 0) := (others => '0');
LED_HUB_LINKOK : out std_logic_vector(8 downto 1);
LED_HUB_RX : out std_logic_vector(8 downto 1);
LED_HUB_TX : out std_logic_vector(8 downto 1);
HUB_MOD2 : inout std_logic_vector(8 downto 1);
HUB_TXDIS : out std_logic_vector(8 downto 1);
HUB_LOS : in std_logic_vector(8 downto 1);
+ BACK_SLAVE_READY : inout std_logic_vector(3 downto 0);
+ BACK_MASTER_READY : inout std_logic_vector(3 downto 0);
--Serdes switch
PCSSW_ENSMB : out std_logic;
PCSSW_EQ : out std_logic_vector( 3 downto 0);
---------------------------------------------------------------------------
THE_GBE_MED_PCSA: entity gbe_med_fifo
generic map(
- LINKS_ACTIVE => "0001",
+ LINK_MODE => (c_IS_UNUSED, c_IS_UNUSED, c_IS_UNUSED, c_IS_MASTER),
INCLUDE_DLM => (0,0,0,1)
)
port map(
-- SerDes 2 -- UNUSED
-- SerDes 3 -- UNUSED
-- SFP Connection
- SD_PRSNT_N_IN(0) => HUB_MOD0(5),
+ SD_PRSNT_N_IN(0) => BACK_SLAVE_READY(0),
SD_PRSNT_N_IN(1) => '1',
SD_PRSNT_N_IN(2) => '1',
SD_PRSNT_N_IN(3) => '1',
- SD_LOS_IN(0) => HUB_LOS(5),
+ SD_LOS_IN(0) => BACK_SLAVE_READY(0),
SD_LOS_IN(1) => '1',
SD_LOS_IN(2) => '1',
SD_LOS_IN(3) => '1',
- SD_TXDIS_OUT(0) => HUB_TXDIS(5),
+ SD_TXDIS_OUT(0) => BACK_MASTER_READY(0),
SD_TXDIS_OUT(1) => open,
SD_TXDIS_OUT(2) => open,
SD_TXDIS_OUT(3) => open,
---------------------------------------------------------------------------
THE_GBE_MED_PCSB: entity gbe_med_fifo
generic map(
- LINKS_ACTIVE => "1111",
+ LINK_MODE => (c_IS_MASTER, c_IS_MASTER, c_IS_MASTER, c_IS_MASTER),
INCLUDE_DLM => (1,1,1,1)
)
port map(
---------------------------------------------------------------------------
THE_GBE_MED_PCSC: entity gbe_med_fifo
generic map(
- LINKS_ACTIVE => "1111",
+ LINK_MODE => (c_IS_MASTER, c_IS_MASTER, c_IS_MASTER, c_IS_MASTER),
INCLUDE_DLM => (1,1,1,1)
)
port map(
---------------------------------------------------------------------------
THE_GBE_MED_PCSD: entity gbe_med_fifo
generic map(
- LINKS_ACTIVE => "0011",
- INCLUDE_DLM => (0,0,1,1),
- SNIFFER_PORT => 0
+ LINK_MODE => (c_IS_UNUSED, c_IS_UNUSED, c_IS_MASTER, c_IS_SLAVE),
+ INCLUDE_DLM => (0,0,1,1)
)
port map(
RESET => reset_i,
# LOCATE COMP "DAC_OUT_CS_6" SITE "L28";\r
# DEFINE PORT GROUP "OUT_group" "DAC_OUT*" ;\r
# IOBUF GROUP "OUT_group" IO_TYPE=LVDS25 DIFFRESISTOR=OFF;\r
-LOCATE COMP "KEL_1" SITE "AP5";\r
-LOCATE COMP "KEL_2" SITE "AP2";\r
-LOCATE COMP "KEL_3" SITE "AN1";\r
-LOCATE COMP "KEL_4" SITE "AN3";\r
-LOCATE COMP "KEL_5" SITE "AL5";\r
-LOCATE COMP "KEL_6" SITE "AM6";\r
-LOCATE COMP "KEL_7" SITE "AL4";\r
-LOCATE COMP "KEL_8" SITE "AJ5";\r
-LOCATE COMP "KEL_9" SITE "AJ2";\r
-LOCATE COMP "KEL_10" SITE "AL3";\r
-LOCATE COMP "KEL_11" SITE "AD9";\r
-LOCATE COMP "KEL_12" SITE "AJ4";\r
-LOCATE COMP "KEL_13" SITE "V4";\r
-LOCATE COMP "KEL_14" SITE "V5";\r
-LOCATE COMP "KEL_15" SITE "T9";\r
-LOCATE COMP "KEL_16" SITE "T2";\r
-LOCATE COMP "KEL_17" SITE "P7";\r
-LOCATE COMP "KEL_18" SITE "R8";\r
-LOCATE COMP "KEL_19" SITE "R2";\r
-LOCATE COMP "KEL_20" SITE "P9";\r
-LOCATE COMP "KEL_21" SITE "AP29";\r
-LOCATE COMP "KEL_22" SITE "AP33";\r
-LOCATE COMP "KEL_23" SITE "AN34";\r
-LOCATE COMP "KEL_24" SITE "AP31";\r
-LOCATE COMP "KEL_25" SITE "AN32";\r
-LOCATE COMP "KEL_26" SITE "AM29";\r
-LOCATE COMP "KEL_27" SITE "AL31";\r
-LOCATE COMP "KEL_28" SITE "AL30";\r
-LOCATE COMP "KEL_29" SITE "AL34";\r
-LOCATE COMP "KEL_30" SITE "AJ31";\r
-LOCATE COMP "KEL_31" SITE "AH33";\r
-LOCATE COMP "KEL_32" SITE "AL32";\r
-LOCATE COMP "KEL_33" SITE "AF32";\r
-LOCATE COMP "KEL_34" SITE "AE32";\r
-LOCATE COMP "KEL_35" SITE "AE30";\r
-LOCATE COMP "KEL_36" SITE "AD26";\r
-LOCATE COMP "KEL_37" SITE "M29";\r
-LOCATE COMP "KEL_38" SITE "AC28";\r
-LOCATE COMP "KEL_39" SITE "M34";\r
-LOCATE COMP "KEL_40" SITE "L28";\r
-DEFINE PORT GROUP "KEL_group" "KEL*" ;\r
-IOBUF GROUP "KEL_group" IO_TYPE=LVDS25 DIFFRESISTOR=100;\r
+#LOCATE COMP "KEL_1" SITE "AP5";\r
+#LOCATE COMP "KEL_2" SITE "AP2";\r
+#LOCATE COMP "KEL_3" SITE "AN1";\r
+#LOCATE COMP "KEL_4" SITE "AN3";\r
+#LOCATE COMP "KEL_5" SITE "AL5";\r
+#LOCATE COMP "KEL_6" SITE "AM6";\r
+#LOCATE COMP "KEL_7" SITE "AL4";\r
+#LOCATE COMP "KEL_8" SITE "AJ5";\r
+#LOCATE COMP "KEL_9" SITE "AJ2";\r
+#LOCATE COMP "KEL_10" SITE "AL3";\r
+#LOCATE COMP "KEL_11" SITE "AD9";\r
+#LOCATE COMP "KEL_12" SITE "AJ4";\r
+#LOCATE COMP "KEL_13" SITE "V4";\r
+#LOCATE COMP "KEL_14" SITE "V5";\r
+#LOCATE COMP "KEL_15" SITE "T9";\r
+#LOCATE COMP "KEL_16" SITE "T2";\r
+#LOCATE COMP "KEL_17" SITE "P7";\r
+#LOCATE COMP "KEL_18" SITE "R8";\r
+#LOCATE COMP "KEL_19" SITE "R2";\r
+#LOCATE COMP "KEL_20" SITE "P9";\r
+#LOCATE COMP "KEL_21" SITE "AP29";\r
+#LOCATE COMP "KEL_22" SITE "AP33";\r
+#LOCATE COMP "KEL_23" SITE "AN34";\r
+#LOCATE COMP "KEL_24" SITE "AP31";\r
+#LOCATE COMP "KEL_25" SITE "AN32";\r
+#LOCATE COMP "KEL_26" SITE "AM29";\r
+#LOCATE COMP "KEL_27" SITE "AL31";\r
+#LOCATE COMP "KEL_28" SITE "AL30";\r
+#LOCATE COMP "KEL_29" SITE "AL34";\r
+#LOCATE COMP "KEL_30" SITE "AJ31";\r
+#LOCATE COMP "KEL_31" SITE "AH33";\r
+#LOCATE COMP "KEL_32" SITE "AL32";\r
+#LOCATE COMP "KEL_33" SITE "AF32";\r
+#LOCATE COMP "KEL_34" SITE "AE32";\r
+#LOCATE COMP "KEL_35" SITE "AE30";\r
+#LOCATE COMP "KEL_36" SITE "AD26";\r
+#LOCATE COMP "KEL_37" SITE "M29";\r
+#LOCATE COMP "KEL_38" SITE "AC28";\r
+#LOCATE COMP "KEL_39" SITE "M34";\r
+#LOCATE COMP "KEL_40" SITE "L28";\r
+#DEFINE PORT GROUP "KEL_group" "KEL*" ;\r
+#IOBUF GROUP "KEL_group" IO_TYPE=LVDS25 DIFFRESISTOR=100;\r
\r
\r
#################################################################\r
DEFINE PORT GROUP "SFP_group" "SFP*" ;\r
IOBUF GROUP "SFP_group" IO_TYPE=LVTTL33 ;\r
\r
-\r
-\r
#################################################################\r
# Serdes Output Switch\r
#################################################################\r
IOBUF PORT "RJ_IO_2" IO_TYPE=LVDS25E ;\r
IOBUF PORT "RJ_IO_3" IO_TYPE=LVDS25E ;\r
\r
-\r
LOCATE COMP "SPARE_IN_0" SITE "K31";\r
LOCATE COMP "SPARE_IN_1" SITE "R4";\r
#LOCATE COMP "SPARE_IN0_N" SITE "K32";\r
IOBUF PORT "SPARE_IN_1" IO_TYPE=LVDS25 DIFFRESISTOR=100 ;\r
\r
#################################################################\r
-# Backplane I/O\r
+# "SFP" status signals on backplane\r
#################################################################\r
-LOCATE COMP "BACK_GPIO_0" SITE "C26";\r
-LOCATE COMP "BACK_GPIO_1" SITE "D26";\r
-LOCATE COMP "BACK_GPIO_2" SITE "B27";\r
-LOCATE COMP "BACK_GPIO_3" SITE "C27";\r
-LOCATE COMP "BACK_GPIO_4" SITE "D27";\r
-LOCATE COMP "BACK_GPIO_5" SITE "E27";\r
-LOCATE COMP "BACK_GPIO_6" SITE "B28";\r
-LOCATE COMP "BACK_GPIO_7" SITE "A28";\r
-LOCATE COMP "BACK_GPIO_8" SITE "A26";\r
-LOCATE COMP "BACK_GPIO_9" SITE "A27";\r
-LOCATE COMP "BACK_GPIO_10" SITE "A29";\r
-LOCATE COMP "BACK_GPIO_11" SITE "A30";\r
-LOCATE COMP "BACK_GPIO_12" SITE "H26";\r
-LOCATE COMP "BACK_GPIO_13" SITE "H25";\r
-LOCATE COMP "BACK_GPIO_14" SITE "A31";\r
-LOCATE COMP "BACK_GPIO_15" SITE "B31";\r
-DEFINE PORT GROUP "BACK_GPIO_group" "BACK_GPIO*" ;\r
-IOBUF GROUP "BACK_GPIO_group" IO_TYPE=LVCMOS25 PULLMODE=UP;\r
-\r
-LOCATE COMP "BACK_LVDS_0" SITE "V2";\r
-LOCATE COMP "BACK_LVDS_1" SITE "T4";\r
-# LOCATE COMP "BACK_LVDS_0_N" SITE "V1";\r
-# LOCATE COMP "BACK_LVDS_1_N" SITE "T3";\r
-DEFINE PORT GROUP "BACK_LVDS_group" "BACK_LVDS*" ;\r
-IOBUF GROUP "BACK_LVDS_group" IO_TYPE=LVDS25;\r
+LOCATE COMP "BACK_SLAVE_READY_0" SITE "C26";\r
+LOCATE COMP "BACK_SLAVE_READY_1" SITE "D27";\r
+LOCATE COMP "BACK_SLAVE_READY_2" SITE "A26";\r
+LOCATE COMP "BACK_SLAVE_READY_3" SITE "H26";\r
+\r
+LOCATE COMP "BACK_MASTER_READY_0" SITE "D26";\r
+LOCATE COMP "BACK_MASTER_READY_1" SITE "E27";\r
+LOCATE COMP "BACK_MASTER_READY_2" SITE "A27";\r
+LOCATE COMP "BACK_MASTER_READY_3" SITE "H25";\r
+\r
+DEFINE PORT GROUP "BACK_SLAVE_group" "BACK_SLAVE*" ;\r
+DEFINE PORT GROUP "BACK_MASTER_group" "BACK_MASTER*" ;\r
\r
+IOBUF GROUP "BACK_SLAVE_group" IO_TYPE=LVCMOS25 PULLMODE=UP;\r
+IOBUF GROUP "BACK_MASTER_group" IO_TYPE=LVCMOS25 DRIVE=4;\r
\r
#################################################################\r
# Flash ROM and Reboot\r