update pinout for Trb5sc v2

diff --git a/pinout/trb5sc_basic.lpf b/pinout/trb5sc_basic.lpf
index c675ea58f13d9b141f0dd61fd7adcaf02c68a153..6dd4c12cb93e07bc29ff88b53f96e70b7fd6d51f 100644 (file)
--- a/pinout/trb5sc_basic.lpf
+++ b/pinout/trb5sc_basic.lpf
@@ -260,43 +260,80 @@ IOBUF PORT "LED_RJ_RED[0]" IO_TYPE=LVTTL33 ;
 IOBUF PORT "LED_EXT_CLOCK" IO_TYPE=LVTTL33 ;
 IOBUF PORT "LED_RJ_GREEN[1]" IO_TYPE=LVTTL33 ;
 IOBUF PORT "LED_RJ_RED[1]" IO_TYPE=LVTTL33 ;
+
 #################################################################
-# Test & Other IO
+# Test & Other IO (v2)
 #################################################################
-LOCATE COMP "TEST[1]" SITE "A7" ;
-LOCATE COMP "TEST[2]" SITE "A5" ;
-LOCATE COMP "TEST[3]" SITE "A4" ;
-LOCATE COMP "TEST[4]" SITE "A3" ;
-LOCATE COMP "TEST[5]" SITE "A2" ;
-LOCATE COMP "TEST[6]" SITE "B3" ;
-LOCATE COMP "TEST[7]" SITE "B4" ;
-LOCATE COMP "TEST[8]" SITE "B7" ;
-LOCATE COMP "TEST[9]" SITE "C7" ;
-LOCATE COMP "TEST[10]" SITE "C8" ;
-LOCATE COMP "TEST[11]" SITE "D7" ;
-LOCATE COMP "TEST[12]" SITE "D8" ;
-LOCATE COMP "TEST[13]" SITE "E8" ;
-LOCATE COMP "TEST[14]" SITE "F8" ;
-DEFINE PORT GROUP "TEST_group" "TEST*" ;
-IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8 ;
-LOCATE COMP "HDR_IO[0]" SITE "A23" ;
-LOCATE COMP "HDR_IO[1]" SITE "A22" ;
-LOCATE COMP "HDR_IO[2]" SITE "B22" ;
-LOCATE COMP "HDR_IO[3]" SITE "A24" ;
-LOCATE COMP "HDR_IO[4]" SITE "C23" ;
-LOCATE COMP "HDR_IO[5]" SITE "B23" ;
-LOCATE COMP "HDR_IO[6]" SITE "C22" ;
-LOCATE COMP "HDR_IO[7]" SITE "C24" ;
-LOCATE COMP "HDR_IO[8]" SITE "D23" ;
-LOCATE COMP "HDR_IO[9]" SITE "D24" ;
-LOCATE COMP "HDR_IO[10]" SITE "E23" ;
-LOCATE COMP "HDR_IO[11]" SITE "D22" ;
-LOCATE COMP "HDR_IO[12]" SITE "F23" ;
-LOCATE COMP "HDR_IO[13]" SITE "E22" ;
-LOCATE COMP "HDR_IO[14]" SITE "F20" ;
-LOCATE COMP "HDR_IO[15]" SITE "F22" ;
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
 DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP "HDR_group" IO_TYPE=LVCMOS25 ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
+#################################################################
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
+#################################################################
+LOCATE COMP  "TEST_1"       SITE "A7";
+LOCATE COMP  "TEST_2"       SITE "A5";
+LOCATE COMP  "TEST_3"       SITE "A4";
+LOCATE COMP  "TEST_4"       SITE "A3";
+LOCATE COMP  "TEST_5"       SITE "A2";
+LOCATE COMP  "TEST_6"       SITE "B3";
+LOCATE COMP  "TEST_7"       SITE "B4";
+LOCATE COMP  "TEST_8"       SITE "B7";
+LOCATE COMP  "TEST_9"       SITE "C7";
+LOCATE COMP  "TEST_10"      SITE "C8";
+LOCATE COMP  "TEST_11"      SITE "D7";
+LOCATE COMP  "TEST_12"      SITE "D8";
+LOCATE COMP  "TEST_13"      SITE "E8";
+LOCATE COMP  "TEST_14"      SITE "F8";
+DEFINE PORT GROUP "TEST_group" "TEST*" ;
+IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
+
+
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
 LOCATE COMP "BACK_GPIO[0]" SITE "P28" ;
 LOCATE COMP "BACK_GPIO[1]" SITE "P29" ;
 LOCATE COMP "BACK_GPIO[2]" SITE "R27" ;

diff --git a/pinout/trb5sc_gbe.lpf b/pinout/trb5sc_gbe.lpf
index 3e18ed0dcefdb4146714a71548cb16d967421236..b17a8d243db1a6dd0643d6ff330af3f8fcac6156 100644 (file)
--- a/pinout/trb5sc_gbe.lpf
+++ b/pinout/trb5sc_gbe.lpf
@@ -245,8 +245,42 @@ IOBUF  PORT  "LED_EXT_CLOCK"     IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_GREEN_1"    IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_RED_1"      IO_TYPE=LVTTL33 ;
 
+
+#################################################################
+# Test & Other IO (v2)
+#################################################################
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
+DEFINE PORT GROUP "HDR_group" "HDR*" ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
 #################################################################
-# Test & Other IO
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
 #################################################################
 LOCATE COMP  "TEST_1"       SITE "A7";
 LOCATE COMP  "TEST_2"       SITE "A5";
@@ -266,24 +300,24 @@ DEFINE PORT GROUP "TEST_group" "TEST*" ;
 IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
 
 
-LOCATE COMP  "HDR_IO_0"     SITE "A23";
-LOCATE COMP  "HDR_IO_1"     SITE "A22";
-LOCATE COMP  "HDR_IO_2"     SITE "B22";
-LOCATE COMP  "HDR_IO_3"     SITE "A24";
-LOCATE COMP  "HDR_IO_4"     SITE "C23";
-LOCATE COMP  "HDR_IO_5"     SITE "B23";
-LOCATE COMP  "HDR_IO_6"     SITE "C22";
-LOCATE COMP  "HDR_IO_7"     SITE "C24";
-LOCATE COMP  "HDR_IO_8"     SITE "D23";
-LOCATE COMP  "HDR_IO_9"     SITE "D24";
-LOCATE COMP  "HDR_IO_10"    SITE "E23";
-LOCATE COMP  "HDR_IO_11"    SITE "D22";
-LOCATE COMP  "HDR_IO_12"    SITE "F23";
-LOCATE COMP  "HDR_IO_13"    SITE "E22";
-LOCATE COMP  "HDR_IO_14"    SITE "F20";
-LOCATE COMP  "HDR_IO_15"    SITE "F22";
-DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
 
 
 LOCATE COMP  "BACK_GPIO_0"  SITE "P28";

diff --git a/pinout/trb5sc_hdmi.lpf b/pinout/trb5sc_hdmi.lpf
index 3a8bb93d31928bb42c4731e83824949f0d39ba9c..ac569f2c2319f7da0e9953e7946a81358a88b799 100644 (file)
--- a/pinout/trb5sc_hdmi.lpf
+++ b/pinout/trb5sc_hdmi.lpf
@@ -245,8 +245,42 @@ IOBUF  PORT  "LED_RJ_RED_1"      IO_TYPE=LVTTL33 ;
 
 
 
+
 #################################################################
-# Test & Other IO
+# Test & Other IO (v2)
+#################################################################
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
+DEFINE PORT GROUP "HDR_group" "HDR*" ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
+#################################################################
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
 #################################################################
 LOCATE COMP  "TEST_1"       SITE "A7";
 LOCATE COMP  "TEST_2"       SITE "A5";
@@ -266,24 +300,25 @@ DEFINE PORT GROUP "TEST_group" "TEST*" ;
 IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
 
 
-LOCATE COMP  "HDR_IO_0"     SITE "A23";
-LOCATE COMP  "HDR_IO_1"     SITE "A22";
-LOCATE COMP  "HDR_IO_2"     SITE "B22";
-LOCATE COMP  "HDR_IO_3"     SITE "A24";
-LOCATE COMP  "HDR_IO_4"     SITE "C23";
-LOCATE COMP  "HDR_IO_5"     SITE "B23";
-LOCATE COMP  "HDR_IO_6"     SITE "C22";
-LOCATE COMP  "HDR_IO_7"     SITE "C24";
-LOCATE COMP  "HDR_IO_8"     SITE "D23";
-LOCATE COMP  "HDR_IO_9"     SITE "D24";
-LOCATE COMP  "HDR_IO_10"    SITE "E23";
-LOCATE COMP  "HDR_IO_11"    SITE "D22";
-LOCATE COMP  "HDR_IO_12"    SITE "F23";
-LOCATE COMP  "HDR_IO_13"    SITE "E22";
-LOCATE COMP  "HDR_IO_14"    SITE "F20";
-LOCATE COMP  "HDR_IO_15"    SITE "F22";
-DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
 
 
 LOCATE COMP  "BACK_GPIO_0"  SITE "P28";

diff --git a/pinout/trb5sc_pqdc.lpf b/pinout/trb5sc_pqdc.lpf
index 4f81cb0100bbdec02e81c8ff758bd5eed965fc33..4915ae0d58f0f65e427bfc4235208e5344808872 100644 (file)
--- a/pinout/trb5sc_pqdc.lpf
+++ b/pinout/trb5sc_pqdc.lpf
@@ -248,8 +248,42 @@ IOBUF  PORT  "LED_EXT_CLOCK"     IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_GREEN_1"    IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_RED_1"      IO_TYPE=LVTTL33 ;
 
+
+#################################################################
+# Test & Other IO (v2)
+#################################################################
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
+DEFINE PORT GROUP "HDR_group" "HDR*" ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
 #################################################################
-# Test & Other IO
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
 #################################################################
 LOCATE COMP  "TEST_1"       SITE "A7";
 LOCATE COMP  "TEST_2"       SITE "A5";
@@ -269,24 +303,24 @@ DEFINE PORT GROUP "TEST_group" "TEST*" ;
 IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
 
 
-LOCATE COMP  "HDR_IO_0"     SITE "A23";
-LOCATE COMP  "HDR_IO_1"     SITE "A22";
-LOCATE COMP  "HDR_IO_2"     SITE "B22";
-LOCATE COMP  "HDR_IO_3"     SITE "A24";
-LOCATE COMP  "HDR_IO_4"     SITE "C23";
-LOCATE COMP  "HDR_IO_5"     SITE "B23";
-LOCATE COMP  "HDR_IO_6"     SITE "C22";
-LOCATE COMP  "HDR_IO_7"     SITE "C24";
-LOCATE COMP  "HDR_IO_8"     SITE "D23";
-LOCATE COMP  "HDR_IO_9"     SITE "D24";
-LOCATE COMP  "HDR_IO_10"    SITE "E23";
-LOCATE COMP  "HDR_IO_11"    SITE "D22";
-LOCATE COMP  "HDR_IO_12"    SITE "F23";
-LOCATE COMP  "HDR_IO_13"    SITE "E22";
-LOCATE COMP  "HDR_IO_14"    SITE "F20";
-LOCATE COMP  "HDR_IO_15"    SITE "F22";
-DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
 
 
 LOCATE COMP  "BACK_GPIO_0"  SITE "P28";

diff --git a/pinout/trb5sc_rj45.lpf b/pinout/trb5sc_rj45.lpf
index f61605b033e92c495b081e7ab698a1ee1e5d018d..fe11101faf6290be7f4165b302c548e365e726eb 100644 (file)
--- a/pinout/trb5sc_rj45.lpf
+++ b/pinout/trb5sc_rj45.lpf
@@ -265,8 +265,42 @@ IOBUF  PORT  "LED_EXT_CLOCK"     IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_GREEN_1"    IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_RED_1"      IO_TYPE=LVTTL33 ;
 
+
 #################################################################
-# Test & Other IO
+# Test & Other IO (v2)
+#################################################################
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
+DEFINE PORT GROUP "HDR_group" "HDR*" ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
+#################################################################
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
 #################################################################
 LOCATE COMP  "TEST_1"       SITE "A7";
 LOCATE COMP  "TEST_2"       SITE "A5";
@@ -286,24 +320,25 @@ DEFINE PORT GROUP "TEST_group" "TEST*" ;
 IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
 
 
-LOCATE COMP  "HDR_IO_0"     SITE "A23";
-LOCATE COMP  "HDR_IO_1"     SITE "A22";
-LOCATE COMP  "HDR_IO_2"     SITE "B22";
-LOCATE COMP  "HDR_IO_3"     SITE "A24";
-LOCATE COMP  "HDR_IO_4"     SITE "C23";
-LOCATE COMP  "HDR_IO_5"     SITE "B23";
-LOCATE COMP  "HDR_IO_6"     SITE "C22";
-LOCATE COMP  "HDR_IO_7"     SITE "C24";
-LOCATE COMP  "HDR_IO_8"     SITE "D23";
-LOCATE COMP  "HDR_IO_9"     SITE "D24";
-LOCATE COMP  "HDR_IO_10"    SITE "E23";
-LOCATE COMP  "HDR_IO_11"    SITE "D22";
-LOCATE COMP  "HDR_IO_12"    SITE "F23";
-LOCATE COMP  "HDR_IO_13"    SITE "E22";
-LOCATE COMP  "HDR_IO_14"    SITE "F20";
-LOCATE COMP  "HDR_IO_15"    SITE "F22";
-DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
 
 
 LOCATE COMP  "BACK_GPIO_0"  SITE "P28";

diff --git a/pinout/trb5sc_tdc.lpf b/pinout/trb5sc_tdc.lpf
index 0f4fb0055e8ddf0f3d6cbbd8626f3f88fbfb9bdc..9b204c387a7b711569236c487185e9578899718b 100644 (file)
--- a/pinout/trb5sc_tdc.lpf
+++ b/pinout/trb5sc_tdc.lpf
@@ -18,6 +18,7 @@ BANK 8 VCCIO 3.3 V;
 LOCATE COMP  "CLK_125"          SITE "AD1";  #was "OSC_CORE_125"
 LOCATE COMP  "CLK_200"          SITE "AD32"; #was "OSC_CORE_200"
 LOCATE COMP  "CLK_EXT"          SITE "C28";  #was "EXT_CLOCK"
+LOCATE COMP  "CLK_GPIO"         SITE "N27";  #on HDR IO
 DEFINE PORT GROUP "CLK_group" "CLK*" ;
 IOBUF GROUP  "CLK_group" IO_TYPE=LVDS  DIFFRESISTOR=100;
 
@@ -253,7 +254,40 @@ IOBUF  PORT  "LED_RJ_GREEN_1"    IO_TYPE=LVTTL33 ;
 IOBUF  PORT  "LED_RJ_RED_1"      IO_TYPE=LVTTL33 ;
 
 #################################################################
-# Test & Other IO
+# Test & Other IO (v2)
+#################################################################
+                                         #connector pin on v1
+LOCATE COMP  "HDR_IO_0"     SITE "A23";  #on HDR_0
+LOCATE COMP  "HDR_IO_1"     SITE "A22";  #on HDR_1
+LOCATE COMP  "HDR_IO_2"     SITE "C22";  #on HDR_6
+LOCATE COMP  "HDR_IO_3"     SITE "A24";  #on HDR_3
+LOCATE COMP  "HDR_IO_4"     SITE "B23";  #on HDR_5
+LOCATE COMP  "HDR_IO_5"     SITE "A25";  #n/a
+LOCATE COMP  "HDR_IO_6"     SITE "B22";  #on HDR_2
+LOCATE COMP  "HDR_IO_7"     SITE "D24";  #on HDR_9
+LOCATE COMP  "HDR_IO_8"     SITE "C23";  #on HDR_4
+LOCATE COMP  "HDR_IO_9"     SITE "C24";  #on HDR_7
+LOCATE COMP  "HDR_IO_10"    SITE "D25";  #n/a
+LOCATE COMP  "HDR_IO_11"    SITE "D26";  #n/a
+LOCATE COMP  "HDR_IO_12"    SITE "B25";  #n/a
+LOCATE COMP  "HDR_IO_13"    SITE "C25";  #n/a
+LOCATE COMP  "HDR_IO_14"    SITE "E25";  #n/a
+LOCATE COMP  "HDR_IO_15"    SITE "F24";  #n/a
+LOCATE COMP  "HDR_IO_16"    SITE "F23";  #on HDR_12
+LOCATE COMP  "HDR_IO_17"    SITE "D23";  #on HDR_8
+LOCATE COMP  "HDR_IO_18"    SITE "E23";  #on HDR_10
+LOCATE COMP  "HDR_IO_19"    SITE "E22";  #on HDR_13
+LOCATE COMP  "HDR_IO_20"    SITE "D22";  #on HDR_11
+LOCATE COMP  "HDR_IO_21"    SITE "F25";  #n/a
+LOCATE COMP  "HDR_IO_22"    SITE "F22";  #on HDR_15
+LOCATE COMP  "HDR_IO_23"    SITE "F20";  #on HDR_14
+
+DEFINE PORT GROUP "HDR_group" "HDR*" ;
+IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
+#################################################################
+# Test & Other IO - from version 1 boards (TEST pins have not been reassigned)
 #################################################################
 LOCATE COMP  "TEST_1"       SITE "A7";
 LOCATE COMP  "TEST_2"       SITE "A5";
@@ -273,24 +307,26 @@ DEFINE PORT GROUP "TEST_group" "TEST*" ;
 IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8;
 
 
-LOCATE COMP  "HDR_IO_0"     SITE "A23";
-LOCATE COMP  "HDR_IO_1"     SITE "A22";
-LOCATE COMP  "HDR_IO_2"     SITE "B22";
-LOCATE COMP  "HDR_IO_3"     SITE "A24";
-LOCATE COMP  "HDR_IO_4"     SITE "C23";
-LOCATE COMP  "HDR_IO_5"     SITE "B23";
-LOCATE COMP  "HDR_IO_6"     SITE "C22";
-LOCATE COMP  "HDR_IO_7"     SITE "C24";
-LOCATE COMP  "HDR_IO_8"     SITE "D23";
-LOCATE COMP  "HDR_IO_9"     SITE "D24";
-LOCATE COMP  "HDR_IO_10"    SITE "E23";
-LOCATE COMP  "HDR_IO_11"    SITE "D22";
-LOCATE COMP  "HDR_IO_12"    SITE "F23";
-LOCATE COMP  "HDR_IO_13"    SITE "E22";
-LOCATE COMP  "HDR_IO_14"    SITE "F20";
-LOCATE COMP  "HDR_IO_15"    SITE "F22";
-DEFINE PORT GROUP "HDR_group" "HDR*" ;
-IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+#LOCATE COMP  "HDR_IO_0"     SITE "A23";
+#LOCATE COMP  "HDR_IO_1"     SITE "A22";
+#LOCATE COMP  "HDR_IO_2"     SITE "B22";
+#LOCATE COMP  "HDR_IO_3"     SITE "A24";
+#LOCATE COMP  "HDR_IO_4"     SITE "C23";
+#LOCATE COMP  "HDR_IO_5"     SITE "B23";
+#LOCATE COMP  "HDR_IO_6"     SITE "C22";
+#LOCATE COMP  "HDR_IO_7"     SITE "C24";
+#LOCATE COMP  "HDR_IO_8"     SITE "D23";
+#LOCATE COMP  "HDR_IO_9"     SITE "D24";
+#LOCATE COMP  "HDR_IO_10"    SITE "E23";
+#LOCATE COMP  "HDR_IO_11"    SITE "D22";
+#LOCATE COMP  "HDR_IO_12"    SITE "F23";
+#LOCATE COMP  "HDR_IO_13"    SITE "E22";
+#LOCATE COMP  "HDR_IO_14"    SITE "F20";
+#LOCATE COMP  "HDR_IO_15"    SITE "F22";
+#DEFINE PORT GROUP "HDR_group" "HDR*" ;
+#IOBUF GROUP  "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ;
+
+
 
 
 LOCATE COMP  "BACK_GPIO_0"  SITE "P28";