signal soda_cmd_pending_S : std_logic := '0';
signal start_of_superburst_S : std_logic := '0';
signal super_burst_nr_S : std_logic_vector(30 downto 0) := (others => '0'); -- from super-burst-nr-generator
+ signal soda_reset_S : std_logic;
+ signal soda_enable_S : std_logic;
-- signal soda_40mhz_cycle_S : std_logic := '0';
-- Signals
signal start_calibration_S : t_HUB_BIT_ARRAY := (others => '0');
signal calib_data_valid_S : t_HUB_BIT_ARRAY := (others => '0');
signal calibration_time_S : t_HUB_WORD_ARRAY := (others => (others => '0'));
- signal calib_register_s : t_HUB_LWORD_ARRAY := (others => (others => '0'));
+-- signal calib_register_s : t_HUB_LWORD_ARRAY := (others => (others => '0'));
signal reply_timeout_error_S : t_HUB_BIT_ARRAY := (others => '0');
signal channel_timeout_status_S : t_HUB_BIT_ARRAY := (others => '0');
signal downstream_error_S : t_HUB_BIT_ARRAY := (others => '0');
+ signal report_error_S : t_HUB_BIT_ARRAY;
+
+ --signal common_reply_timeout_error_S : std_logic;
+ signal common_timeout_status_S : std_logic;
+ signal common_downstream_error_S : std_logic;
+ signal common_report_error_S : std_logic;
signal dead_channel_S : t_HUB_BIT_ARRAY := (others => '0');
- signal CTRL_STATUS_register_S : t_HUB_LWORD_ARRAY := (others => (others => '0'));\r
- \r
+ signal COMMON_CTRL_STATUS_register_S: std_logic_vector(31 downto 0);
+ signal CTRL_STATUS_register_S : t_HUB_LWORD_ARRAY; -- := (others => (others => '0'));
+
signal TXstart_of_superburst_S : t_HUB_BIT_ARRAY := (others => '0');
signal TXsuper_burst_nr_S : t_HUB_LWORD_ARRAY; -- from super-burst-nr-generator
signal TXsoda_cmd_valid_S : t_HUB_BIT_ARRAY;
generic map(BURST_COUNT => 16)
port map(
SODACLK => SODACLK,
- RESET => RESET,
- --Internal Connection
+ RESET => soda_reset_S,
+ ENABLE => soda_enable_S,
SODA_BURST_PULSE_IN => SODA_BURST_PULSE_IN,
START_OF_SUPERBURST_OUT => start_of_superburst_S,
SUPER_BURST_NR_OUT => super_burst_nr_S,
SODA_CMD_WINDOW_OUT => soda_cmd_window_S
- );\r
-\r
+ );
+
channel :for i in c_HUB_CHILDREN-1 downto 0 generate
TXsoda_cmd_valid_S(i) <= trb_cmd_strobe_S; --trb_cmd_valid_S;
TXsoda_cmd_window_S(i) <= soda_cmd_window_S;
TXstart_of_superburst_S(i) <= start_of_superburst_S;
TXsoda_cmd_word_S(i) <= '0' & trb_cmd_word_S;
- TXsuper_burst_nr_S(i) <= '0' & super_burst_nr_S;\r
+ TXsuper_burst_nr_S(i) <= '0' & super_burst_nr_S;
start_calibration_S(i) <= send_start_calibration_S(i);
SODACLK => SODACLK,
RESET => RESET,
--Internal Connection
- LINK_PHASE_IN => LINK_PHASE_IN(i), --link_phase_S, PL!\r
+ LINK_PHASE_IN => LINK_PHASE_IN(i), --link_phase_S, PL!
SODA_CYCLE_IN => SODA_CYCLE_IN,
-
- SODA_CMD_STROBE_IN => TXsoda_cmd_valid_S(i),
SODA_CMD_WINDOW_IN => TXsoda_cmd_window_S(i),
+ SODA_CMD_STROBE_IN => TXsoda_cmd_valid_S(i),
START_OF_SUPERBURST => TXstart_of_superburst_S(i),
SUPER_BURST_NR_IN => TXsuper_burst_nr_S(i)(30 downto 0),
SODA_CMD_WORD_IN => TXsoda_cmd_word_S(i)(30 downto 0),
EXPECTED_REPLY_OUT => expected_reply_S(i),
- TIME_CAL_OUT => send_start_calibration_S(i),
+ SEND_TIME_CAL_OUT => send_start_calibration_S(i),
TX_DLM_PREVIEW_OUT => TX_DLM_PREVIEW_OUT(i),
TX_DLM_OUT => TX_DLM_OUT(i),
TX_DLM_WORD_OUT => TX_DLM_WORD_OUT(i)
);
- hub_reply_handler : soda_reply_handler
- port map(
- SODACLK => SODACLK,
- RESET => RESET,
- CLEAR => '0',
- CLK_EN => '1',
- --Internal Connection
--- LAST_PACKET => last_packet_sent_S,
- EXPECTED_REPLY_IN => expected_reply_S(i),
- RX_DLM_IN => RX_DLM_IN(i),
- RX_DLM_WORD_IN => RX_DLM_WORD_IN(i),
- REPLY_VALID_OUT => reply_data_valid_S(i),
- REPLY_OK_OUT => reply_OK_S(i)
- );
+ hub_reply_handler : soda_reply_handler
+ port map(
+ SODACLK => SODACLK,
+ RESET => RESET,
+ CLEAR => '0',
+ CLK_EN => '1',
+ EXPECTED_REPLY_IN => expected_reply_S(i),
+ RX_DLM_IN => RX_DLM_IN(i),
+ RX_DLM_WORD_IN => RX_DLM_WORD_IN(i),
+ REPLY_VALID_OUT => reply_data_valid_S(i),
+ REPLY_OK_OUT => reply_OK_S(i)
+ );
- hub_calibration_timer : soda_calibration_timer
- port map(
- SODACLK => SODACLK,
- RESET => RESET,
- CLEAR => '0',
- CLK_EN => '1',
- --Internal Connection
- START_CALIBRATION => start_calibration_S(i),
- END_CALIBRATION => reply_data_valid_S(i),
- VALID_OUT => calib_data_valid_S(i),
- CALIB_TIME_OUT => calibration_time_S(i),
- TIMEOUT_ERROR => reply_timeout_error_S(i)
- );
-
- sodahub_calib_timeout_proc : process(SYSCLK) -- converting to sysclk domain
- begin
- if rising_edge(SYSCLK) then
- if( RESET = '1' ) then
- calib_register_S(i) <= (others => '0');
- channel_timeout_status_S(i) <= '0';
- downstream_error_S(i) <= '0';
- CTRL_STATUS_register_S(i)(16) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(17) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= '0'; -- reset REPORT_ERROR status-bit
- elsif (start_calibration_S(i) = '1') then -- reset registers at start of new calibration
- calib_register_S(i) <= (others => '0');
- channel_timeout_status_S(i) <= '0';
- downstream_error_S(i) <= '0';
- CTRL_STATUS_register_S(i)(16) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(17) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= '0'; -- reset REPORT_ERROR status-bit
- elsif (calib_data_valid_S(i) = '1') then -- calibration finished in time
- calib_register_S(i) <= x"0000" & calibration_time_S(i);
- channel_timeout_status_S(i) <= '0';
- elsif (reply_data_valid_S(i) = '1') then -- the reply was correct
- channel_timeout_status_S(i) <= '0';
- if (reply_OK_S(i) = '1') then
- downstream_error_S(i) <= '0';
- elsif (dead_channel_S(i) = '0') then
- downstream_error_S(i) <= '1';
- CTRL_STATUS_register_S(i)(16) <= '1'; -- set DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= '1'; -- set REPORT_ERROR status-bit
+ hub_calibration_timer : soda_calibration_timer
+ port map(
+ SODACLK => SODACLK,
+ RESET => soda_reset_S, --RESET,
+ CLEAR => '0',
+ CLK_EN => '1',
+ --Internal Connection
+ START_CALIBRATION => start_calibration_S(i),
+ END_CALIBRATION => reply_data_valid_S(i),
+ VALID_OUT => calib_data_valid_S(i),
+ CALIB_TIME_OUT => calibration_time_S(i),
+ TIMEOUT_ERROR => reply_timeout_error_S(i)
+ );
+
+ sodahub_calib_timeout_proc : process(SODACLK)
+ begin
+ if rising_edge(SODACLK) then
+ if( RESET = '1' ) then
+ downstream_error_S(i) <= '0';
+ channel_timeout_status_S(i) <= '0';
+ report_error_S(i) <= '0';
+ elsif (soda_reset_S = '1') then -- check if slowcontrol wants to reset errors
+ channel_timeout_status_S(i) <= '0';
+ downstream_error_S(i) <= '0'; -- set CALIBRATION_TIMEOUT_ERROR status-bit
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ elsif (reply_data_valid_S(i) = '1') then -- the reply was correct
+ channel_timeout_status_S(i) <= '0';
+ if (reply_OK_S(i) = '1') then
+ downstream_error_S(i) <= '0';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ elsif (dead_channel_S(i) = '0') then
+ downstream_error_S(i) <= '1';
+ report_error_S(i) <= '1'; -- set REPORT_ERROR status-bit
+ else
+ downstream_error_S(i) <= '1';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ end if;
+ elsif (reply_timeout_error_S(i) = '1') then --and (reply_OK_S(i) = '1')) then
+ if (dead_channel_S(i) = '0') then
+ channel_timeout_status_S(i) <= '1';
+ report_error_S(i) <= '1'; -- set REPORT_ERROR status-bit
+ else
+ channel_timeout_status_S(i) <= '1';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ end if;
end if;
- elsif ((reply_timeout_error_S(i) = '1') and (reply_OK_S(i) = '1')) then
- channel_timeout_status_S(i) <= '1';
- CTRL_STATUS_register_S(i)(17) <= '1'; -- set CALIBRATION_TIMEOUT_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= '1'; -- set REPORT_ERROR status-bit
- elsif (CTRL_STATUS_register_S(i)(15) = '1') then -- check if slowcontrol wants to reset errors
- CTRL_STATUS_register_S(i)(16) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(17) <= '0'; -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= '0'; -- reset REPORT_ERROR status-bit
end if;
- end if;
- end process;
+ end process;
--- hub_store_calib_proc : process(SYSCLK)
--- begin
--- if rising_edge(SYSCLK) then
--- if( RESET = '1' ) then
--- calib_register_S(i) <= (others => '0');
--- else
--- calib_register_S(i)(15 downto 0) <= calibration_time_S(i);
--- end if;
--- end if;
--- end process;
-
- -----------------------------------------------------------
- -- Reply status report --
- -----------------------------------------------------------
--- reply_report_proc : process(SYSCLK)
--- begin
--- if rising_edge(SYSCLK) then
--- if( RESET = '1' ) then
--- channel_status_S(i) <= '0';
--- elsif (reply_data_valid_S(i)='1') then
--- channel_status_S(i) <= reply_OK_S(i) or dead_channels_S(i);
--- else
--- channel_status_S(i) <= '0';
--- end if;
--- end if;
---
--- end process;
+ ---------------------------------------------------------
+ -- Control bits --
+ ---------------------------------------------------------
+ dead_channel_S(i) <= CTRL_STATUS_register_S(i)(29); -- slow-control can declare a channel dead
+ ---------------------------------------------------------
+ -- Status bits --
+ ---------------------------------------------------------
+ CTRL_STATUS_SYNC: signal_sync
+ generic map(
+ DEPTH => 1,
+ WIDTH => 3
+ )
+ port map(
+ RESET => RESET,
+ D_IN(0) => report_error_S(i),
+ D_IN(1) => downstream_error_S(i),
+ D_IN(2) => channel_timeout_status_S(i),
+ CLK0 => SYSCLK,
+ CLK1 => SODACLK,
+ D_OUT(0) => CTRL_STATUS_register_S(i)(15),
+ D_OUT(1) => CTRL_STATUS_register_S(i)(1),
+ D_OUT(2) => CTRL_STATUS_register_S(i)(0)
+ );\r
+ \r
+ --CTRL_STATUS_register_S(i)(15) <= report_error_S(i);
+ CTRL_STATUS_register_S(i)(14 downto 2) <= (others => '0');
+ --CTRL_STATUS_register_S(i)(1) <= downstream_error_S(i);
+ --CTRL_STATUS_register_S(i)(0) <= channel_timeout_status_S(i);
end generate;
------------------------------------------------------------
--- Reset the unused bits of channel_status_S --
------------------------------------------------------------
--- other_bits :for j in 31 downto c_HUB_CHILDREN generate
--- init_unused_bits_proc : process(SYSCLK)
--- begin
--- if rising_edge(SYSCLK) then
--- if( RESET = '1' ) then
--- channel_status_S(j) <= '0'; -- reset status bits
--- end if;
--- end if;
--- end process;
--- end generate;
-
------------------------------------------------------------
--- Transmission history for reply-checking --
------------------------------------------------------------
--- packet_history_proc : process(SYSCLK)
--- begin
--- if rising_edge(SYSCLK) then
--- if( RESET = '1' ) then
--- last_packet_sent_S <= c_NO_PACKET;
--- elsif (start_of_superburst_S='1') then
--- last_packet_sent_S <= c_BST_PACKET;
--- elsif (trb_cmd_strobe_S='1') then
--- last_packet_sent_S <= c_CMD_PACKET;
--- end if;
--- end if;
--- end process;
-
+ soda_reset_S <= (RESET or COMMON_CTRL_STATUS_register_S(31));
+ soda_enable_S <= COMMON_CTRL_STATUS_register_S(30);
+ common_downstream_error_S <= '1' when ((downstream_error_S(0)='1') or (downstream_error_S(1)='1') or (downstream_error_S(2)='1') or (downstream_error_S(3)='1'))
+ else '0';
+ common_report_error_S <= '1' when ((report_error_S(0)='1') or (report_error_S(1)='1') or (report_error_S(2)='1') or (report_error_S(3)='1'))
+ else '0';\r
+ common_timeout_status_S <= '1' when ((channel_timeout_status_S(0)='1') or (channel_timeout_status_S(1)='1') or (channel_timeout_status_S(2)='1')) or ((channel_timeout_status_S(3)='1'))
+ else '0';
+ COMMON_CTRL_STATUS_register_S(15) <= common_report_error_S;
+ COMMON_CTRL_STATUS_register_S(14 downto 2) <= (others => '0');
+ COMMON_CTRL_STATUS_register_S(1) <= common_downstream_error_S;
+ COMMON_CTRL_STATUS_register_S(0) <= common_timeout_status_S;
+\r
---------------------------------------------------------
-- RegIO Statemachine
---------------------------------------------------------
NEXT_STATE <= SLEEP;
end case;
end process TRANSFORM;
-\r
+
soda_cmd_strobe_posedge_to_pulse: posedge_to_pulse
port map(
SIGNAL_IN => trb_cmd_strobe_S,
PULSE_OUT => trb_cmd_strobe_sodaclk_S
);
-\r
-SODA_CMD_FLOWCTRL : process(SODACLK)
- begin
- if( rising_edge(SODACLK) ) then
- if( RESET = '1' ) then
- trb_cmd_pending_S <= '0';
- trb_send_cmd_S <= '0';
- elsif trb_cmd_strobe_sodaclk_S = '1' then
- trb_cmd_pending_S <= '1';
- elsif soda_cmd_window_S = '1' and trb_cmd_pending_S = '1' then
- trb_send_cmd_S <= '1';
- trb_cmd_pending_S <= '0';
- else
- trb_cmd_pending_S <= '0';
- trb_send_cmd_S <= '0';
- end if;
- end if;
- end process SODA_CMD_FLOWCTRL;\r
-
+
---------------------------------------------------------
-- data handling --
---------------------------------------------------------
begin
if( rising_edge(SYSCLK) ) then
if ( RESET = '1' ) then
- trb_cmd_strobe_S <= '0';
- trb_cmd_word_S <= (others => '0');
- CTRL_STATUS_register_S(0)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(1)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(2)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(3)(15 downto 0) <= (others => '0');
+ trb_cmd_strobe_S <= '0';
+ trb_cmd_word_S <= (others => '0');
+ COMMON_CTRL_STATUS_register_S(31 downto 16) <= (30 => '1', others => '0'); -- enable soda by default
+ CTRL_STATUS_register_S(0)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(1)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(2)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(3)(31 downto 16) <= (others => '0');
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0000") ) then
trb_cmd_strobe_S <= '1';
trb_cmd_word_S <= SODA_DATA_IN(30 downto 0);
- elsif( (store_wr = '1') and (SODA_ADDR_IN = "0001") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(0)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
- elsif( (store_wr = '1') and (SODA_ADDR_IN = "0010") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(1)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0011") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(2)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
+ trb_cmd_strobe_S <= '0';
+ COMMON_CTRL_STATUS_register_S(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0100") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(3)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(0)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0101") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(1)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0110") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(2)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0111") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(3)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
else
- trb_cmd_strobe_S <= '0';
+ trb_cmd_strobe_S <= '0';
end if;
end if;
end process THE_WRITE_REG_PROC;
- dead_channel_S(0) <= CTRL_STATUS_register_S(0)(8); -- slow-control can declare a channel dead
- dead_channel_S(1) <= CTRL_STATUS_register_S(1)(8); -- slow-control can declare a channel dead
- dead_channel_S(2) <= CTRL_STATUS_register_S(2)(8); -- slow-control can declare a channel dead
- dead_channel_S(3) <= CTRL_STATUS_register_S(3)(8); -- slow-control can declare a channel dead
-- register read
THE_READ_REG_PROC: process( SYSCLK )
buf_bus_data_out <= '0' & trb_cmd_word_S;
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0001") ) then
buf_bus_data_out <= '0' & super_burst_nr_S;
+ elsif( (store_rd = '1') and (SODA_ADDR_IN = "0011") ) then
+ buf_bus_data_out <= COMMON_CTRL_STATUS_register_S;
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0100") ) then
- buf_bus_data_out <= calib_register_S(0);
+ buf_bus_data_out <= CTRL_STATUS_register_S(0);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0101") ) then
- buf_bus_data_out <= calib_register_S(1);
+ buf_bus_data_out <= CTRL_STATUS_register_S(1);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0110") ) then
- buf_bus_data_out <= calib_register_S(2);
+ buf_bus_data_out <= CTRL_STATUS_register_S(2);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0111") ) then
- buf_bus_data_out <= calib_register_S(3);
+ buf_bus_data_out <= CTRL_STATUS_register_S(3);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1000") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(0);
+ buf_bus_data_out <= x"0000" & calibration_time_S(0);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1001") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(1);
+ buf_bus_data_out <= x"0000" & calibration_time_S(1);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1010") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(2);
+ buf_bus_data_out <= x"0000" & calibration_time_S(2);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1011") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(3);
+ buf_bus_data_out <= x"0000" & calibration_time_S(3);
end if;
end if;
end process THE_READ_REG_PROC;
--- buf_bus_data_out <= debug_status_S;
--- elsif( (store_rd = '1') and (SODA_ADDR_IN = "0100") ) then
--- buf_bus_data_out <= debug_rx_cnt_S;
--- elsif( (store_rd = '1') and (SODA_ADDR_IN = "0101") ) then
--- buf_bus_data_out <= debug_tx_cnt_S;
--- elsif( (store_rd = '1') and (SODA_ADDR_IN = "0110") ) then
--- buf_bus_data_out <= debug_sos_cnt_S;
--- elsif( (store_rd = '1') and (SODA_ADDR_IN = "0111") ) then
--- buf_bus_data_out <= debug_cmd_cnt_S;
--- end if;
--- end if;
--- end process THE_READ_REG_PROC;
-
--- debug signals
- --DEBUG_HUB : process(SODACLK)
- --begin
- --if( rising_edge(SODACLK) ) then
- --debug_status_S(0) <= RESET;
- --debug_status_S(1) <= CLEAR;
- --debug_status_S(2) <= CLK_EN;
- --if ( RESET = '1' ) then
- --debug_rx_cnt_S <= (others => '0');
- --debug_tx_cnt_S <= (others => '0');
- --else
- --if (txup_dlm_out_S = '1') then
- --debug_tx_cnt_S <= debug_tx_cnt_S + 1;
- --end if;
- --if (RXUP_DLM_IN = '1') then
- --debug_rx_cnt_S <= debug_rx_cnt_S + 1;
- --end if;
- --if (start_of_superburst_S = '1') then
- --debug_sos_cnt_S <= debug_sos_cnt_S + 1;
- --end if;
- --if (soda_cmd_valid_S = '1') then
- --debug_cmd_cnt_S <= debug_cmd_cnt_S + 1;
- --end if;
- --end if;
- --end if;
- --end process;
- --debug_status_S(31 downto 3) <= LINK_DEBUG_IN(31 downto 3);
--- TXUP_DLM_OUT <= txup_dlm_out_S;
--- output signals
LEDS_OUT <= (others => '0'); --LEDregister_i(3 downto 0);
SODA_DATA_OUT <= buf_bus_data_out;
SODA_ACK_OUT <= bus_ack;
-end architecture;
+end architecture;
\ No newline at end of file
\r
CALIBRATION_RUNNING <= calibration_running_S;
- packet_fsm_proc : process(SODACLK)--, RESET, packet_state_S, crc_valid_S, START_OF_SUPERBURST, soda_cmd_strobe_S)
+ calibration_fsm_proc : process(SODACLK)
begin
if rising_edge(SODACLK) then
if (RESET='1') then
SCI_READ : in std_logic := '0';
SCI_WRITE : in std_logic := '0';
SCI_ACK : out std_logic := '0';
- SCI_NACK : out std_logic := '0';
+ SCI_NACK : out std_logic := '0'--;
-- Status and control port
-- STAT_OP : out t_HUB_WORD; --std_logic_vector (15 downto 0);
-- CTRL_OP : in t_HUB_WORD; --std_logic_vector (15 downto 0) := (others => '0');
- STAT_DEBUG : out std_logic_vector (63 downto 0);
- CTRL_DEBUG : in std_logic_vector (63 downto 0) := (others => '0')
+-- STAT_DEBUG : out std_logic_vector (63 downto 0);
+-- CTRL_DEBUG : in std_logic_vector (63 downto 0) := (others => '0')
);
end component;
\r
architecture Behavioral of soda_hub is
--SODA
+ signal soda_reset_S : std_logic;
+ signal soda_enable_S : std_logic;\r
+
signal soda_cmd_word_S : std_logic_vector(30 downto 0) := (others => '0');
signal soda_cmd_valid_S : std_logic := '0';
signal soda_cmd_strobe_S : std_logic := '0'; -- for commands sent in a SODA package
signal soda_cmd_strobe_sodaclk_S : std_logic := '0'; -- for commands sent in a SODA package
signal trb_cmd_word_S : std_logic_vector(30 downto 0) := (others => '0');
- signal trb_cmd_valid_S : std_logic := '0';
signal trb_cmd_strobe_S : std_logic := '0'; -- for commands sent over trbnet
signal trb_cmd_strobe_sodaclk_S : std_logic := '0'; -- for commands sent over trbnet
-- signal soda_cmd_pending_S : std_logic := '0';
type STATES is (SLEEP,RD_RDY,WR_RDY,RD_ACK,WR_ACK,DONE);
signal CURRENT_STATE, NEXT_STATE: STATES;
- signal last_packet_sent_S : t_PACKET_TYPE_SENT;
signal expected_reply_S : t_HUB_BYTE_ARRAY := (others => (others => '0'));
signal reply_data_valid_S : t_HUB_BIT_ARRAY := (others => '0');
signal reply_OK_S : t_HUB_BIT_ARRAY := (others => '0');
signal stop_calibration_S : t_HUB_BIT_ARRAY := (others => '0');
signal calib_data_valid_S : t_HUB_BIT_ARRAY := (others => '0');
signal calibration_time_S : t_HUB_WORD_ARRAY := (others => (others => '0'));
- signal calib_register_s : t_HUB_LWORD_ARRAY := (others => (others => '0'));
- signal calib_timeout_error_S : t_HUB_BIT_ARRAY;
signal calibration_running_S : t_HUB_BIT_ARRAY;
- signal channel_timeout_status_S : t_HUB_BIT_ARRAY;
+-- signal calib_register_s : t_HUB_LWORD_ARRAY := (others => (others => '0'));
+ signal reply_timeout_error_S : t_HUB_BIT_ARRAY := (others => '0');
+ signal channel_timeout_status_S : t_HUB_BIT_ARRAY := (others => '0');
+ signal downstream_error_S : t_HUB_BIT_ARRAY := (others => '0');
signal report_error_S : t_HUB_BIT_ARRAY;
- signal downstream_error_S : t_HUB_BIT_ARRAY;
+ --signal common_reply_timeout_error_S : std_logic;
+ signal common_timeout_status_S : std_logic;
+ signal common_downstream_error_S : std_logic;
+ signal common_report_error_S : std_logic;
+\r
signal dead_channel_S : t_HUB_BIT_ARRAY := (others => '0');
+ signal COMMON_CTRL_STATUS_register_S: std_logic_vector(31 downto 0);
signal CTRL_STATUS_register_S : t_HUB_LWORD_ARRAY := (others => (others => '0'));
signal TXstart_of_superburst_S : t_HUB_BIT_ARRAY;
channel :for i in c_HUB_CHILDREN-1 downto 0 generate
- --X_clk_domain : process(TX_SODACLK(i))
- --begin
- --if rising_edge(TX_SODACLK(i)) then
- --if RESET='1' then
- --TXsoda_cmd_valid_S(i) <= '0';
- --TXstart_of_superburst_S(i) <= '0';
- --TXsoda_cmd_word_S(i) <= (others => '0');
- --TXsuper_burst_nr_S(i) <= (others => '0');
- --else
- -- TXsoda_cmd_valid_S(i) <= soda_cmd_valid_S;
- -- TXstart_of_superburst_S(i) <= start_of_superburst_S;
- -- TXsoda_cmd_word_S(i) <= '0' & soda_cmd_word_S;
- -- TXsuper_burst_nr_S(i) <= '0' & super_burst_nr_S;
- --end if;
- --end if;
- --end process;
-
-
-
- start_calibration_S(i) <= send_start_calibration_S(i);
+ start_calibration_S(i) <= send_start_calibration_S(i);
- packet_builder : soda_packet_builder
- port map(
- SODACLK => SODACLK,
- RESET => RESET,
- --Internal Connection
- LINK_PHASE_IN => UPLINK_PHASE_IN, --link_phase_S, PL! 17092014 vergeten ??? of niet nodig ?
- SODA_CYCLE_IN => '1', -- 40MHz cycle is only required to sync superbursts at the source PL! 24022015
- SODA_CMD_STROBE_IN => trb_cmd_strobe_S, --soda_cmd_valid_S, --TXsoda_cmd_valid_S(i),
- START_OF_SUPERBURST => start_of_superburst_S, --TXstart_of_superburst_S(i),
- SUPER_BURST_NR_IN => super_burst_nr_S, --TXsuper_burst_nr_S(i)(30 downto 0),
- SODA_CMD_WORD_IN => trb_cmd_word_S, --soda_cmd_word_S, --TXsoda_cmd_word_S(i)(30 downto 0),
- EXPECTED_REPLY_OUT => expected_reply_S(i),
- SEND_TIME_CAL_OUT => send_start_calibration_S(i),
- TX_DLM_PREVIEW_OUT => TXDN_DLM_PREVIEW_OUT(i),
- TX_DLM_OUT => TXDN_DLM_OUT(i),
- TX_DLM_WORD_OUT => TXDN_DLM_WORD_OUT(i)
- );
+ packet_builder : soda_packet_builder
+ port map(
+ SODACLK => SODACLK,
+ RESET => RESET,
+ --Internal Connection
+ LINK_PHASE_IN => UPLINK_PHASE_IN, --link_phase_S, PL! 17092014 vergeten ??? of niet nodig ?
+ SODA_CYCLE_IN => '1', -- 40MHz cycle is only required to sync superbursts at the source PL! 24022015
+ SODA_CMD_WINDOW_IN => '1', -- soda-source determines the sending of a command; hub always copies
+ SODA_CMD_STROBE_IN => trb_cmd_strobe_S, --soda_cmd_valid_S, --TXsoda_cmd_valid_S(i),
+ START_OF_SUPERBURST => start_of_superburst_S, --TXstart_of_superburst_S(i),
+ SUPER_BURST_NR_IN => super_burst_nr_S, --TXsuper_burst_nr_S(i)(30 downto 0),
+ SODA_CMD_WORD_IN => trb_cmd_word_S, --soda_cmd_word_S, --TXsoda_cmd_word_S(i)(30 downto 0),
+ EXPECTED_REPLY_OUT => expected_reply_S(i),
+ SEND_TIME_CAL_OUT => send_start_calibration_S(i),
+ TX_DLM_PREVIEW_OUT => TXDN_DLM_PREVIEW_OUT(i),
+ TX_DLM_OUT => TXDN_DLM_OUT(i),
+ TX_DLM_WORD_OUT => TXDN_DLM_WORD_OUT(i)
+ );
hub_reply_handler : soda_reply_handler
port map(
RESET => RESET,
CLEAR => '0',
CLK_EN => '1',
- --Internal Connection
- -- LAST_PACKET => last_packet_sent_S,
EXPECTED_REPLY_IN => expected_reply_S(i),
RX_DLM_IN => RXDN_DLM_IN(i),
RX_DLM_WORD_IN => RXDN_DLM_WORD_IN(i),
CALIBRATION_RUNNING => calibration_running_S(i),
VALID_OUT => calib_data_valid_S(i),
CALIB_TIME_OUT => calibration_time_S(i),
- TIMEOUT_ERROR => calib_timeout_error_S(i)
+ TIMEOUT_ERROR => reply_timeout_error_S(i)
);
- stop_calibration_S(i) <= '1' when ((calibration_running_S(i)='1') and ((reply_data_valid_S(i) = '1') or (calib_timeout_error_S(i)='1'))) else '0';
- channel_timeout_status_S(i) <= '1' when ((calibration_running_S(i)='0') and (calib_timeout_error_S(i)='1')) else '0';
- downstream_error_S(i) <= '1' when ((reply_data_valid_S(i) = '1') and (reply_OK_S(i) = '0')) else '0';
- report_error_S(i) <= '1' when ((dead_channel_S(i) = '0') and ((downstream_error_S(i)='1') or (channel_timeout_status_S(i)='1'))) else '0';
+ stop_calibration_S(i) <= '1' when ((calibration_running_S(i)='1') and ((reply_data_valid_S(i) = '1') or (reply_timeout_error_S(i)='1'))) else '0';
+-- channel_timeout_status_S(i) <= '1' when ((calibration_running_S(i)='0') and (reply_timeout_error_S(i)='1')) else '0';
+-- downstream_error_S(i) <= '1' when ((reply_data_valid_S(i) = '1') and (reply_OK_S(i) = '0')) else '0';
+-- report_error_S(i) <= '1' when ((dead_channel_S(i) = '0') and ((downstream_error_S(i)='1') or (channel_timeout_status_S(i)='1'))) else '0';
- sodahub_calib_timeout_proc : process(SYSCLK) -- converting to sysclk domain
+ sodahub_calib_timeout_proc : process(SODACLK)
begin
- if rising_edge(SYSCLK) then
+ if rising_edge(SODACLK) then
if( RESET = '1' ) then
- CTRL_STATUS_register_S(i)(31 downto 16) <= (others => '0'); -- reset REPORT_ERROR status-bit
- calib_register_S(i) <= (others => '0'); -- reset REPORT_ERROR status-bit
- else
- CTRL_STATUS_register_S(i)(16) <= downstream_error_S(i); -- reset DOWNSTREAM_ERROR status-bit
- CTRL_STATUS_register_S(i)(17) <= channel_timeout_status_S(i); -- reset CALIBRATION_TIMEOUT_ERROR status-bit
- CTRL_STATUS_register_S(i)(31) <= report_error_S(i); -- reset REPORT_ERROR status-bit
- if (reply_data_valid_S(i) = '1') then -- calibration time has ended and there is a reply
- calib_register_S(i) <= x"0000" & calibration_time_S(i); -- store the elapsed time
+ downstream_error_S(i) <= '0';
+ channel_timeout_status_S(i) <= '0';
+ report_error_S(i) <= '0';
+ elsif (soda_reset_S = '1') then -- check if slowcontrol wants to reset errors
+ channel_timeout_status_S(i) <= '0';
+ downstream_error_S(i) <= '0'; -- set CALIBRATION_TIMEOUT_ERROR status-bit
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ elsif (reply_data_valid_S(i) = '1') then -- the reply was correct
+ channel_timeout_status_S(i) <= '0';
+ if (reply_OK_S(i) = '1') then
+ downstream_error_S(i) <= '0';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ elsif (dead_channel_S(i) = '0') then
+ downstream_error_S(i) <= '1';
+ report_error_S(i) <= '1'; -- set REPORT_ERROR status-bit
+ else
+ downstream_error_S(i) <= '1';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
+ end if;
+ elsif (reply_timeout_error_S(i) = '1') then --and (reply_OK_S(i) = '1')) then
+ if (dead_channel_S(i) = '0') then
+ channel_timeout_status_S(i) <= '1';
+ report_error_S(i) <= '1'; -- set REPORT_ERROR status-bit
+ else
+ channel_timeout_status_S(i) <= '1';
+ report_error_S(i) <= '0'; -- reset REPORT_ERROR status-bit
end if;
end if;
end if;
end process;
- end generate;
------------------------------------------------------------
--- Reset the unused bits of channel_status_S --
------------------------------------------------------------
--- other_bits :for j in 31 downto c_HUB_CHILDREN generate
--- init_unused_bits_proc : process(SYSCLK)
--- begin
--- if rising_edge(SYSCLK) then
--- if( RESET = '1' ) then
--- channel_status_S(j) <= '0'; -- reset status bits
--- end if;
--- end if;
--- end process;
--- end generate;
+ ---------------------------------------------------------
+ -- Control bits --
+ ---------------------------------------------------------
+ dead_channel_S(i) <= CTRL_STATUS_register_S(i)(29); -- slow-control can declare a channel dead
+ ---------------------------------------------------------
+ -- Status bits --
+ ---------------------------------------------------------
+ CTRL_STATUS_SYNC: signal_sync
+ generic map(
+ DEPTH => 1,
+ WIDTH => 3
+ )
+ port map(
+ RESET => RESET,
+ D_IN(0) => report_error_S(i),
+ D_IN(1) => downstream_error_S(i),
+ D_IN(2) => channel_timeout_status_S(i),
+ CLK0 => SYSCLK,
+ CLK1 => SODACLK,
+ D_OUT(0) => CTRL_STATUS_register_S(i)(15),
+ D_OUT(1) => CTRL_STATUS_register_S(i)(1),
+ D_OUT(2) => CTRL_STATUS_register_S(i)(0)
+ );
+
+ --CTRL_STATUS_register_S(i)(15) <= report_error_S(i);
+ CTRL_STATUS_register_S(i)(14 downto 2) <= (others => '0');
+ --CTRL_STATUS_register_S(i)(1) <= downstream_error_S(i);
+ --CTRL_STATUS_register_S(i)(0) <= channel_timeout_status_S(i);
------------------------------------------------------------
--- Transmission history for reply-checking --
------------------------------------------------------------
- packet_history_proc : process(SYSCLK)
- begin
- if rising_edge(SYSCLK) then
- if( RESET = '1' ) then
- last_packet_sent_S <= c_NO_PACKET;
- elsif (start_of_superburst_S='1') then
- last_packet_sent_S <= c_BST_PACKET;
- elsif (soda_cmd_valid_S='1') then
- last_packet_sent_S <= c_CMD_PACKET;
- end if;
- end if;
- end process;
+ end generate;
+\r
+ soda_reset_S <= (RESET or COMMON_CTRL_STATUS_register_S(31));
+ soda_enable_S <= COMMON_CTRL_STATUS_register_S(30);
+ common_downstream_error_S <= '1' when ((downstream_error_S(0)='1') or (downstream_error_S(1)='1') or (downstream_error_S(2)='1') or (downstream_error_S(3)='1'))
+ else '0';
+ common_report_error_S <= '1' when ((report_error_S(0)='1') or (report_error_S(1)='1') or (report_error_S(2)='1') or (report_error_S(3)='1'))
+ else '0';
+ common_timeout_status_S <= '1' when ((channel_timeout_status_S(0)='1') or (channel_timeout_status_S(1)='1') or (channel_timeout_status_S(2)='1')) or ((channel_timeout_status_S(3)='1'))
+ else '0';
+ COMMON_CTRL_STATUS_register_S(15) <= common_report_error_S;
+ COMMON_CTRL_STATUS_register_S(14 downto 2) <= (others => '0');
+ COMMON_CTRL_STATUS_register_S(1) <= common_downstream_error_S;
+ COMMON_CTRL_STATUS_register_S(0) <= common_timeout_status_S;
---------------------------------------------------------
-- RegIO Statemachine
end case;
end process TRANSFORM;
+soda_cmd_strobe_posedge_to_pulse: posedge_to_pulse
+ port map(
+ IN_CLK => SYSCLK,
+ OUT_CLK => SODACLK,
+ CLK_EN => '1',
+ SIGNAL_IN => trb_cmd_strobe_S,
+ PULSE_OUT => trb_cmd_strobe_sodaclk_S
+ );
---------------------------------------------------------
-- data handling --
begin
if( rising_edge(SYSCLK) ) then
if ( RESET = '1' ) then
- trb_cmd_strobe_S <= '0';
- trb_cmd_word_S <= (others => '0');
- CTRL_STATUS_register_S(0)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(1)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(2)(15 downto 0) <= (others => '0');
- CTRL_STATUS_register_S(3)(15 downto 0) <= (others => '0');
+ trb_cmd_strobe_S <= '0';
+ trb_cmd_word_S <= (others => '0');
+ COMMON_CTRL_STATUS_register_S(31 downto 16) <= (30 => '1', others => '0'); -- enable soda by default
+ CTRL_STATUS_register_S(0)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(1)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(2)(31 downto 16) <= (others => '0');
+ CTRL_STATUS_register_S(3)(31 downto 16) <= (others => '0');
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0000") ) then
trb_cmd_strobe_S <= '1';
trb_cmd_word_S <= SODA_DATA_IN(30 downto 0);
- elsif( (store_wr = '1') and (SODA_ADDR_IN = "0001") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(0)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
- elsif( (store_wr = '1') and (SODA_ADDR_IN = "0010") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(1)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0011") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(2)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
+ trb_cmd_strobe_S <= '0';
+ COMMON_CTRL_STATUS_register_S(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
elsif( (store_wr = '1') and (SODA_ADDR_IN = "0100") ) then
- trb_cmd_strobe_S <= '0';
- CTRL_STATUS_register_S(3)(15 downto 0) <= SODA_DATA_IN(15 downto 0); -- use only the 16 lower bits for control
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(0)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0101") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(1)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0110") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(2)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
+ elsif( (store_wr = '1') and (SODA_ADDR_IN = "0111") ) then
+ trb_cmd_strobe_S <= '0';
+ CTRL_STATUS_register_S(3)(31 downto 16) <= SODA_DATA_IN(31 downto 16); -- use only the 16 lower bits for control
else
- trb_cmd_strobe_S <= '0';
+ trb_cmd_strobe_S <= '0';
end if;
end if;
end process THE_WRITE_REG_PROC;
- dead_channel_S(0) <= CTRL_STATUS_register_S(0)(8); -- slow-control can declare a channel dead
- dead_channel_S(1) <= CTRL_STATUS_register_S(1)(8); -- slow-control can declare a channel dead
- dead_channel_S(2) <= CTRL_STATUS_register_S(2)(8); -- slow-control can declare a channel dead
- dead_channel_S(3) <= CTRL_STATUS_register_S(3)(8); -- slow-control can declare a channel dead
-- register read
THE_READ_REG_PROC: process( SYSCLK )
if ( RESET = '1' ) then
buf_bus_data_out <= (others => '0');
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0000") ) then
- buf_bus_data_out <= '0' & soda_cmd_word_S;
+ buf_bus_data_out <= '0' & trb_cmd_word_S;
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0001") ) then
buf_bus_data_out <= '0' & super_burst_nr_S;
+ elsif( (store_rd = '1') and (SODA_ADDR_IN = "0011") ) then
+ buf_bus_data_out <= COMMON_CTRL_STATUS_register_S;
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0100") ) then
- buf_bus_data_out <= calib_register_S(0);
+ buf_bus_data_out <= CTRL_STATUS_register_S(0);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0101") ) then
- buf_bus_data_out <= calib_register_S(1);
+ buf_bus_data_out <= CTRL_STATUS_register_S(1);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0110") ) then
- buf_bus_data_out <= calib_register_S(2);
+ buf_bus_data_out <= CTRL_STATUS_register_S(2);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "0111") ) then
- buf_bus_data_out <= calib_register_S(3);
+ buf_bus_data_out <= CTRL_STATUS_register_S(3);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1000") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(0);
+ buf_bus_data_out <= x"0000" & calibration_time_S(0);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1001") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(1);
+ buf_bus_data_out <= x"0000" & calibration_time_S(1);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1010") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(2);
+ buf_bus_data_out <= x"0000" & calibration_time_S(2);
elsif( (store_rd = '1') and (SODA_ADDR_IN = "1011") ) then
- buf_bus_data_out <= CTRL_STATUS_register_S(3);
+ buf_bus_data_out <= x"0000" & calibration_time_S(3);
end if;
end if;
end process THE_READ_REG_PROC;
SCI_READ => sci2_read,
SCI_WRITE => sci2_write,
SCI_ACK => sci2_ack,
- SCI_NACK => sci2_nack,
+ SCI_NACK => sci2_nack--,
--Status and control port
-- STAT_OP(0) => med_stat_op(15 downto 0), --med_stat_op(1*16+15 downto 1*16),
-- CTRL_OP(0) => med_ctrl_op(15 downto 0), --med_ctrl_op(0*16+15 downto 0*16),
-
- STAT_DEBUG => open,
- CTRL_DEBUG => (others => '0')
-);
-
+-- STAT_DEBUG => open,
+-- CTRL_DEBUG => (others => '0')
+ );
+
SFP_TXDIS <= sfp_txdis_S;
end if;
end process;
\r
- blink_H : process (clk_200_osc)
+ blink_H : process (clk_200_osc, time_counter_S)
begin
if (rising_edge(clk_200_osc) and (time_counter_S(15 downto 0) = x"FFFF"))then
if ((time_counter_S(31 downto 16) = x"FFFF") and (time_counter_S(15 downto 0) = x"FFFF")) then
<Source name="code/soda_reply_pkt_builder.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
+ <Source name="code/posedge_to_pulse.vhd" type="VHDL" type_short="VHDL">
+ <Options/>
+ </Source>
<Source name="code/soda_packet_builder.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<Source name="code/version.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
+ <Source name="code/soda_4source.vhd" type="VHDL" type_short="VHDL">
+ <Options/>
+ </Source>
+ <Source name="code/soda_start_of_burst_control.vhd" type="VHDL" type_short="VHDL">
+ <Options/>
+ </Source>
+ <Source name="code/soda_packet_builder.vhd" type="VHDL" type_short="VHDL">
+ <Options/>
+ </Source>
<Source name="code/ip/sfp_1_125_int.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<Source name="code/soda_tx_control.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
- <Source name="code/soda_start_of_burst_control.vhd" type="VHDL" type_short="VHDL">
- <Options/>
- </Source>
<Source name="code/soda_reply_pkt_builder.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<Source name="code/soda_packet_handler.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
- <Source name="code/soda_packet_builder.vhd" type="VHDL" type_short="VHDL">
- <Options/>
- </Source>
<Source name="code/posedge_to_pulse.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<Source name="code/soda_d8crc8.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
- <Source name="code/soda_4source.vhd" type="VHDL" type_short="VHDL">
- <Options/>
- </Source>
<Source name="../trbnet/trb_net_std.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<Option name="HDL type" value="VHDL"/>
</Options>
<Implementation title="soda_source" dir="soda_source" description="soda_source" synthesis="synplify" default_strategy="Strategy1">
- <Options top="trb3_periph_sodasource"/>
+ <Options def_top="trb3_periph_sodasource" top="trb3_periph_sodasource"/>
<Source name="code/version.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
<BScanLen>1</BScanLen>
<BScanVal>0</BScanVal>
</Bypass>
- <File>/local/lemmens/lattice/soda/trb3_periph_sodasource_20150318.bit</File>
- <FileTime>03/18/15 15:40:50</FileTime>
+ <File>/local/lemmens/lattice/soda/trb3_periph_sodasource_20150319.bit</File>
+ <FileTime>03/19/15 08:09:52</FileTime>
+ <JedecChecksum>N/A</JedecChecksum>
<Operation>Fast Program</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
jspc29 / soda.git / commitdiff