changed CTS TDC to version 1.4

diff --git a/cts/compile_central_frankfurt.pl b/cts/compile_central_frankfurt.pl
index e44a6911964aaa28491df7b56b5ff9c9e5c4def2..fa244ee4f59e8dd42635f4e40b9806ac030d7d45 100755 (executable)
--- a/cts/compile_central_frankfurt.pl
+++ b/cts/compile_central_frankfurt.pl
@@ -42,7 +42,7 @@ my $SPEEDGRADE="8";
 
 #create full lpf file
 system("cp ../base/$TOPNAME.lpf workdir/$TOPNAME.lpf");
-system("cat ../tdc_releases/tdc_v1.1.1/tdc_constraints.lpf >> workdir/$TOPNAME.lpf");
+system("cat ../tdc_releases/tdc_v1.4/tdc_constraints.lpf >> workdir/$TOPNAME.lpf");
 system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
 system("sed -i 's#THE_TDC/#gen_TDC_THE_TDC/#g' workdir/$TOPNAME.lpf");
 

diff --git a/cts/cts_fpga2.p2t b/cts/cts_fpga2.p2t
index 8410b377a8b664ea52bc8d13f4035130b48d5302..afbb9a1cc0132d2a6d23e775783fab5d828884d5 100644 (file)
--- a/cts/cts_fpga2.p2t
+++ b/cts/cts_fpga2.p2t
@@ -1,7 +1,7 @@
 -w
 -i 15
 -l 5
--n 3
+-n 2
 -y
 -s 12
 -t 1

diff --git a/cts/source/cts.vhd b/cts/source/cts.vhd
index 40aca1db65e1e2f9c576f1bed0d46ddb66e22f71..e336587b38b308711eac12cfc3dd1613aaabb528 100755 (executable)
--- a/cts/source/cts.vhd
+++ b/cts/source/cts.vhd
@@ -830,7 +830,7 @@ begin
             throttle_enabled_i <= '0';
             stop_triggers_i <= '0';
 
-            eb_aggr_threshold_i <= x"00";
+            eb_aggr_threshold_i <= x"10";
             eb_mask_i     <= (0 => '1', others => '0');
             eb_special_calibration_eb_i <= x"0";
             eb_use_special_calibration_eb_i <= '0';
@@ -859,18 +859,24 @@ begin
                transfer_debug_limits_i     <= '1';
                
                cts_regio_write_ack_out_i   <= '1';
+               cts_regio_unknown_addr_out_i <= '0';
+               
             end if;
             
             if addr = 16#09# and cts_regio_write_enable_in_i = '1' then
                ro_configuration_i <= cts_regio_data_in_i(ro_configuration_i'RANGE);
+
                cts_regio_write_ack_out_i   <= '1';
+               cts_regio_unknown_addr_out_i <= '0';
             end if;
          
             if addr = 16#0c# and cts_regio_write_enable_in_i = '1' then
                throttle_threshold_i <= UNSIGNED(cts_regio_data_in_i(throttle_threshold_i'RANGE));
                throttle_enabled_i   <= cts_regio_data_in_i(throttle_threshold_i'LENGTH);
                stop_triggers_i      <= cts_regio_data_in_i(31);
+
                cts_regio_write_ack_out_i   <= '1';
+               cts_regio_unknown_addr_out_i <= '0';
             end if;
 
             if addr = 16#0d# and cts_regio_write_enable_in_i = '1' then
@@ -878,6 +884,9 @@ begin
                eb_aggr_threshold_i <= UNSIGNED(cts_regio_data_in_i(23 downto 16));
                eb_special_calibration_eb_i <= cts_regio_data_in_i(27 downto 24);
                eb_use_special_calibration_eb_i <= cts_regio_data_in_i(28);
+
+               cts_regio_write_ack_out_i   <= '1';
+               cts_regio_unknown_addr_out_i <= '0';
             end if;
          end if;
       end if;

diff --git a/cts/trb3_central.prj b/cts/trb3_central.prj
index 7200fc5f6bc7e3884ad4a39225918fdd436561bc..d3d6a6e81249de8b53e4d76080dbc79d35cf23fe 100644 (file)
--- a/cts/trb3_central.prj
+++ b/cts/trb3_central.prj
@@ -244,22 +244,27 @@ add_file -vhdl -lib work "source/cts.vhd"
 ###############
 #Change path to tdc release also in compile script!
 ###############
-#add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Adder_304.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/bit_sync.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/BusHandler.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Channel.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Channel_200.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Encoder_304_Bit.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/FIFO_32x32_OutReg.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/LogicAnalyser.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Readout.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Reference_Channel_200.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/Reference_Channel.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/ROM_encoder_3.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/ROM_FIFO.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/ShiftRegisterSISO.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/TDC.vhd"
-add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.1.1/up_counter.vhd"
+#add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Adder_304.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/bit_sync.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/BusHandler.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Channel.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Channel_200.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Encoder_304_Bit.vhd"
+#add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/FIFO_32x32_OutReg.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/LogicAnalyser.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Readout.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Reference_Channel_200.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/Reference_Channel.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/ROM_encoder_3.vhd"
+#add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/ROM_FIFO.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/ShiftRegisterSISO.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/TDC.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/up_counter.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/fallingEdgeDetect.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/FIFO_36x128_OutReg_Counter.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/risingEdgeDetect.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v1.4/ROM4_Encoder.vhd"
+
 
 add_file -vhdl -lib work "./trb3_central.vhd"
 #add_file -fpga_constraint "./cts.fdc"

diff --git a/cts/trb3_central.vhd b/cts/trb3_central.vhd
index 2af16581ac314acbf63cce657b3e4ce31a0cc615..753722e35432e17c72193de0c7c97ea749a77e67 100644 (file)
--- a/cts/trb3_central.vhd
+++ b/cts/trb3_central.vhd
@@ -1255,12 +1255,12 @@ gen_TDC : if INCLUDE_TDC = c_YES generate
       ESB_DATAREADY_OUT     => esb_data_ready,    -- bus data ready strobe
       ESB_UNKNOWN_ADDR_OUT  => esb_invalid,   -- bus invalid addr
       --Fifo Write Registers Bus
-      FWB_READ_EN_IN        => fwb_read_en,   -- bus read en strobe
-      FWB_WRITE_EN_IN       => fwb_write_en,  -- bus write en strobe
-      FWB_ADDR_IN           => fwb_addr,    -- bus address
-      FWB_DATA_OUT          => fwb_data_out,  -- bus data
-      FWB_DATAREADY_OUT     => fwb_data_ready,    -- bus data ready strobe
-      FWB_UNKNOWN_ADDR_OUT  => fwb_invalid,   -- bus invalid addr
+      EFB_READ_EN_IN        => fwb_read_en,   -- bus read en strobe
+      EFB_WRITE_EN_IN       => fwb_write_en,  -- bus write en strobe
+      EFB_ADDR_IN           => fwb_addr,    -- bus address
+      EFB_DATA_OUT          => fwb_data_out,  -- bus data
+      EFB_DATAREADY_OUT     => fwb_data_ready,    -- bus data ready strobe
+      EFB_UNKNOWN_ADDR_OUT  => fwb_invalid,   -- bus invalid addr
       --Lost Hit Registers Bus
       LHB_READ_EN_IN        => '0', -- lhb_read_en,   -- bus read en strobe
       LHB_WRITE_EN_IN       => '0', -- lhb_write_en,  -- bus write en strobe