2 & \multicolumn{3}{X|}{``TDC'' - For TDC designs. Detailed information about the TDC setup can be found in register
0xc8xx}\\
& 7 -- 0 & Pinout & Which pin-out is being used for the TDC inputs. 0: flexible by multiplexers, 1: default
-1-to-1, 2: every second input (e.g. Padiwa Amps fast-only), 3: every fourth input (HPTDC very high speed mode)\\
+1-to-1, 2: every second input (e.g. Padiwa Amps fast-only), 3: every fourth input (HPTDC very high speed mode), 128: 32pin AddOn, 129: 4conn, 130: 2x KEL on-board, 131: ADA plus test signals, 132: ADA every fourth input\\
& 11 -- 8 & DoubleEdge & Double edge setup: 0: single edge only, 1: same channel, 2: alternating channels, 3: same
channel with stretcher \\
& 14 -- 12 & RingBuffer & Ring Buffer size: 0:12 words, 1:44 words, 2:76
\item 0x71 Trb3sc TDC 4conn Backplane
\item 0x72 Trb3sc TDC KEL SFP
\item 0x73 Trb3sc TDC ADA Backplane
+ \item 0x75 Trb3sc TDC ADA for NINO Backplane
\item 0x80 Trb5sc
\end{itemize*}