Table cleanup

diff --git a/electronics/electronics2013.pdf b/electronics/electronics2013.pdf
index 25e6a41c4b8108b75a1fcf122e56fe423348cc18..62641e398863bb069fb25a6f42d99681a6f5dd2c 100644 (file)
Binary files a/electronics/electronics2013.pdf and b/electronics/electronics2013.pdf differ

diff --git a/electronics/electronics2013.tex b/electronics/electronics2013.tex
index 06beec718e0eaa446fa00bd41019e4d0eb3f3ca8..0259b793de6805a3abedbf98da2854ae35b953c5 100644 (file)
--- a/electronics/electronics2013.tex
+++ b/electronics/electronics2013.tex
@@ -328,35 +328,38 @@ the FPGA if pin-out fits better.
 \begin{table}[ht]
 \small
  \centering
-\begin{tabular}{c|c|c|c|cc|cc|c|c|c|c}
- & \multicolumn{2}{c|}{\textbf{single}} & \multicolumn{5}{c|}{\textbf{differ.}} &
+\begin{tabular}{c|c|cc|cc|c|c|c|c}
+ & \textbf{single} & \multicolumn{4}{c|}{\textbf{differ. Out}}
+&
 \multicolumn{4}{c}{\textbf{Groups}}\\
-\textbf{Pair} & \textbf{I} & \textbf{O} & \textbf{I} & \multicolumn{4}{c|}{\textbf{O}} & \textbf{Con
-1} & \textbf{Con 2} & \textbf{Con 3} & \textbf{Con 4}\\
+\textbf{Pair} & \textbf{Out} &
+\textbf{C1} & \textbf{C2} &\textbf{C3} &\textbf{C4} &\textbf{C1} & \textbf{C2} &
+\textbf{C3} & \textbf{C4}\\
 \hline
-1  & X & X & X & -- & -- & X  & -- & 0   & 0   & 0   & 0   \\
-2  & X & X & X & -- & X  & X  & X  & 0   & 0   & 0   & 0   \\
-3  & X & X & X & X  & X  & -- & -- & 0   & 0   & 0 C & 0   \\
-4  & X & X & X & -- & -- & -- & -- & 0 C & 0 C & 0   & 0 C \\
-5  & X & X & X & X  & -- & X  & -- & 0   & 0   & 0   & 0   \\
-6  & X & - & X & X  & X  & -- & X  & 0   & 0   & 0   & 0   \\
-7  & X & X & X & -- & -- & -- & -- & 1   & 1   & 1   & 1   \\
-8  & X & X & X & X  & X  & X  & X  & 1   & 1   & 1   & 1   \\
-9  & X & X & X & -- & -- & X  & X  & 1   & 1   & 1   & 1   \\
-10 & X & X & X & -- & -- & -- & -- & 1 C & 1 C & 1 C & 1 C \\
-11 & X & X & X & X  & X  & X  & -- & 1   & 1   & 1   & 1   \\
-12 & X & X & X & X  & X  & -- & X  & 1   & 1   & 1   & 1   \\
-13 & X & X & X & -- & -- & X  & -- & 2   & 2   & 2   & 2   \\
-14 & X & X & X & -- & -- & -- & X  & 2   & 2 C & 2   & 2   \\
-15 & X & X & X & -- & -- & X  & X  & 2 C & 2   & 2   & 2   \\
-16 & X & X & X & -- & -- & -- & -- & 2   & 3   & 2 C & 2 C \\
-17 & X & X & X & -- & -- & -- & -- &     &     &     &    \\
-18 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
-19 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
-20 & X & X & X & X  & X  & X  & X  &     &     &     &    \\
+1  & X & -- & -- & X  & -- & 0   & 0   & 0   & 0   \\
+2  & X & -- & X  & X  & X  & 0   & 0   & 0   & 0   \\
+3  & X & X  & X  & -- & -- & 0   & 0   & 0 C & 0   \\
+4  & X & -- & -- & -- & -- & 0 C & 0 C & 0   & 0 C \\
+5  & X & X  & -- & X  & -- & 0   & 0   & 0   & 0   \\
+6  & --& X  & X  & -- & X  & 0   & 0   & 0   & 0   \\
+7  & X & -- & -- & -- & -- & 1   & 1   & 1   & 1   \\
+8  & X & X  & X  & X  & X  & 1   & 1   & 1   & 1   \\
+9  & X & -- & -- & X  & X  & 1   & 1   & 1   & 1   \\
+10 & X & -- & -- & -- & -- & 1 C & 1 C & 1 C & 1 C \\
+11 & X & X  & X  & X  & -- & 1   & 1   & 1   & 1   \\
+12 & X & X  & X  & -- & X  & 1   & 1   & 1   & 1   \\
+13 & X & -- & -- & X  & -- & 2   & 2   & 2   & 2   \\
+14 & X & -- & -- & -- & X  & 2   & 2 C & 2   & 2   \\
+15 & X & -- & -- & X  & X  & 2 C & 2   & 2   & 2   \\
+16 & X & -- & -- & -- & -- & 2   & 3   & 2 C & 2 C \\
+17 & X & -- & -- & -- & -- &     &     &     &    \\
+18 & X & X  & X  & X  & X  &     &     &     &    \\
+19 & X & X  & X  & X  & X  &     &     &     &    \\
+20 & X & X  & X  & X  & X  &     &     &     &    \\
 
 \end{tabular}
-\caption{Pin-out of 4-conn AddOn and cable between FPGA and CB.}
+\caption{Pin-out of 4-conn AddOn and cable between FPGA and CB. First CB
+connects to C1/C3, second board to C2/C4.}
 \end{table}