CHECK_1:if TRANSFER_LENGTH >0 generate
APL_SHORT_TRANSFER_OUT <= '0';
+ APL_SEND_OUT <= buf_APL_SEND_OUT;
end generate;
CHECK_2:if TRANSFER_LENGTH =0 generate
APL_SHORT_TRANSFER_OUT <= '1';
+ APL_SEND_OUT <= '1' when APL_RUN_IN = '0' else '0';
end generate;
APL_DATA_OUT(15 downto 0) <= buf_APL_DATA_OUT;
APL_PACKET_NUM_OUT <= packet_counter;
APL_WRITE_OUT <= buf_APL_WRITE_OUT;
-APL_SEND_OUT <= buf_APL_SEND_OUT;
+
CLK_REG: process(CLK)
begin
CLK : in std_logic;
RESET : in std_logic;
CLK_EN : in std_logic;
-
+
-- Media direction port
MED_DATAREADY_IN: in STD_LOGIC;
MED_DATA_IN: in STD_LOGIC_VECTOR (DATA_WIDTH-1 downto 0);
MED_PACKET_NUM_IN: in STD_LOGIC_VECTOR (1 downto 0);
MED_READ_OUT: out STD_LOGIC;
-
+
MED_DATAREADY_OUT: out STD_LOGIC;
MED_DATA_OUT: out STD_LOGIC_VECTOR (DATA_WIDTH-1 downto 0);
MED_PACKET_NUM_OUT: out STD_LOGIC_VECTOR (1 downto 0);
MED_READ_IN: in STD_LOGIC;
-
+
-- Internal direction port
INT_DATAREADY_OUT: out STD_LOGIC_VECTOR (2**MUX_WIDTH-1 downto 0);
INT_DATA_OUT: out STD_LOGIC_VECTOR ((DATA_WIDTH)*(2**MUX_WIDTH)-1 downto 0);
INT_DATA_IN: in STD_LOGIC_VECTOR ((DATA_WIDTH)*(2**MUX_WIDTH)-1 downto 0);
INT_PACKET_NUM_IN: in STD_LOGIC_VECTOR (2*(2**MUX_WIDTH)-1 downto 0);
INT_READ_OUT: out STD_LOGIC_VECTOR (2**MUX_WIDTH-1 downto 0);
-
+
-- Status and control port
CTRL: in STD_LOGIC_VECTOR (31 downto 0);
STAT: out STD_LOGIC_VECTOR (31 downto 0)
end generate;
end generate;
--current_demux_READ <= INT_READ_IN;
- demux_next_READ <= (others => '1');
-
+ gen2: if MUX_SECURE_MODE = 0 generate
+ demux_next_READ <= (others => '1');
+ end generate;
MED_READ_OUT <= current_MED_READ_OUT;
comb_demux : process (next_demux_dr_tmp, demux_next_READ, INT_READ_IN,
SYN_READ_IN => MED_READ_IN
);
- genmux : if MUX_WIDTH /= 95 generate
- process (current_INT_READ_OUT, INT_DATA_IN, INT_PACKET_NUM_IN)
- variable var_mux_buffer : STD_LOGIC_VECTOR (DATA_WIDTH+2-1 downto 0);
- begin
- var_mux_buffer := (others => '0');
- for i in 0 to 2**MUX_WIDTH-1 loop
- if current_INT_READ_OUT(i) = '1' then
- var_mux_buffer(DATA_WIDTH-1 downto 0)
- := var_mux_buffer(DATA_WIDTH-1 downto 0) or INT_DATA_IN((DATA_WIDTH)*(i+1)-1 downto (DATA_WIDTH)*(i));
- var_mux_buffer(DATA_WIDTH+1 downto DATA_WIDTH)
- := var_mux_buffer(DATA_WIDTH+1 downto DATA_WIDTH) or INT_PACKET_NUM_IN(2*(i+1)-1 downto 2*i);
- if INT_PACKET_NUM_IN(2*(i+1)-1 downto 2*i) = "00" then
- var_mux_buffer(3+MUX_WIDTH-1 downto 3)
- := conv_std_logic_vector(i, MUX_WIDTH);
- end if;
+
+ process (current_INT_READ_OUT, INT_DATA_IN, INT_PACKET_NUM_IN)
+ variable var_mux_buffer : STD_LOGIC_VECTOR (DATA_WIDTH+2-1 downto 0);
+ variable k : integer range 0 to 2**MUX_WIDTH-1 := 0;
+ begin
+ k := 0;
+ var_mux_buffer := (others => '0');
+ for i in 0 to 2**MUX_WIDTH-1 loop
+ for j in 0 to DATA_WIDTH+NUM_WIDTH-1 loop
+ if j < DATA_WIDTH then
+ var_mux_buffer(j) := var_mux_buffer(j) or (INT_DATA_IN(DATA_WIDTH*i+j) and current_INT_READ_OUT(i));
+ else
+ var_mux_buffer(j) := var_mux_buffer(j) or (INT_PACKET_NUM_IN(NUM_WIDTH*i+j-DATA_WIDTH) and current_INT_READ_OUT(i));
+ end if;
+ if current_INT_READ_OUT(i) = '1' and INT_PACKET_NUM_IN(2*(i+1)-1 downto 2*i) = "00" then
+ k := i;
+ else
+ k := k;
end if;
end loop;
- current_mux_buffer <= var_mux_buffer;
- end process;
- end generate;
-
- genmux3: if MUX_WIDTH = 95 generate
- process (current_INT_READ_OUT, INT_DATA_IN, INT_PACKET_NUM_IN)
- variable var_mux_buffer : STD_LOGIC_VECTOR (DATA_WIDTH+2-1 downto 0);
- begin
- for i in 0 to DATA_WIDTH-1 loop
- current_mux_buffer(i) <= (INT_DATA_IN((DATA_WIDTH)*(0)+i) and current_INT_READ_OUT(0)) or
- (INT_DATA_IN((DATA_WIDTH)*(1)+i) and current_INT_READ_OUT(1)) or
- (INT_DATA_IN((DATA_WIDTH)*(2)+i) and current_INT_READ_OUT(2)) or
- (INT_DATA_IN((DATA_WIDTH)*(3)+i) and current_INT_READ_OUT(3)) or
- (INT_DATA_IN((DATA_WIDTH)*(4)+i) and current_INT_READ_OUT(4)) or
- (INT_DATA_IN((DATA_WIDTH)*(5)+i) and current_INT_READ_OUT(5)) or
- (INT_DATA_IN((DATA_WIDTH)*(6)+i) and current_INT_READ_OUT(6)) or
- (INT_DATA_IN((DATA_WIDTH)*(7)+i) and current_INT_READ_OUT(7));
- end loop;
- current_mux_buffer(DATA_WIDTH) <= (INT_PACKET_NUM_IN(0) and current_INT_READ_OUT(0)) or
- (INT_PACKET_NUM_IN(2) and current_INT_READ_OUT(1)) or
- (INT_PACKET_NUM_IN(4) and current_INT_READ_OUT(2)) or
- (INT_PACKET_NUM_IN(6) and current_INT_READ_OUT(3)) or
- (INT_PACKET_NUM_IN(8) and current_INT_READ_OUT(4)) or
- (INT_PACKET_NUM_IN(10) and current_INT_READ_OUT(5)) or
- (INT_PACKET_NUM_IN(12) and current_INT_READ_OUT(6)) or
- (INT_PACKET_NUM_IN(14) and current_INT_READ_OUT(7));
- current_mux_buffer(DATA_WIDTH+1) <= (INT_PACKET_NUM_IN(1) and current_INT_READ_OUT(0)) or
- (INT_PACKET_NUM_IN(3) and current_INT_READ_OUT(1)) or
- (INT_PACKET_NUM_IN(5) and current_INT_READ_OUT(2)) or
- (INT_PACKET_NUM_IN(7) and current_INT_READ_OUT(3)) or
- (INT_PACKET_NUM_IN(9) and current_INT_READ_OUT(4)) or
- (INT_PACKET_NUM_IN(11) and current_INT_READ_OUT(5)) or
- (INT_PACKET_NUM_IN(13) and current_INT_READ_OUT(6)) or
- (INT_PACKET_NUM_IN(15) and current_INT_READ_OUT(7));
-
- end process;
- end generate;
+ end loop;
+ var_mux_buffer(3+MUX_WIDTH-1 downto 3) := var_mux_buffer(3+MUX_WIDTH-1 downto 3) or conv_std_logic_vector(k, MUX_WIDTH);
+ current_mux_buffer <= var_mux_buffer;
+ end process;
+
+
mux_enable <= (mux_next_READ); -- or MED_READ_IN
mux_read <= or_all(current_INT_READ_OUT and INT_DATAREADY_IN);
-end architecture;
\ No newline at end of file
+end architecture;
next_APL_GOT_TRM <= reg_APL_GOT_TRM;
next_send_trm <= '0';
next_INT_DATAREADY_OUT <= '0';
- --next_INT_DATA_OUT <= buf_INT_DATA_OUT;
+ next_INT_DATA_OUT <= buf_INT_DATA_OUT;
next_transfer_counter <= transfer_counter;
if saved_packet_type = TYPE_TRM then
if INT_PACKET_NUM_IN = "11" then
end if;
next_INT_DATAREADY_OUT <= '1';
end if;
- if transfer_counter = "11" then
- next_INT_DATA_OUT <= (others => '0');
- next_INT_DATA_OUT(2 downto 0) <= TYPE_TRM;
- elsif transfer_counter = "00" then
- next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(31 downto 16);
- elsif transfer_counter = "01" then
- next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(15 downto 0);
- else
- next_INT_DATA_OUT <= (others => '0');
- next_INT_DATA_OUT(11 downto 4) <= reg_APL_SEQNR_OUT;
+ if buf_INT_DATAREADY_OUT = '1' and INT_READ_IN = '1' then
+ if transfer_counter = "11" then
+ next_INT_DATA_OUT <= (others => '0');
+ next_INT_DATA_OUT(2 downto 0) <= TYPE_TRM;
+ elsif transfer_counter = "00" then
+ next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(31 downto 16);
+ elsif transfer_counter = "01" then
+ next_INT_DATA_OUT <= buf_APL_ERROR_PATTERN_IN(15 downto 0);
+ else
+ next_INT_DATA_OUT <= (others => '0');
+ next_INT_DATA_OUT(11 downto 4) <= reg_APL_SEQNR_OUT;
+ end if;
end if;
if APL_RELEASE_TRM = '1' and reg_APL_GOT_TRM = '1' then
next_APL_GOT_TRM <= '0';
begin
if rising_edge(CLK) then
if RESET = '1' then
- buf_INT_DATA_OUT <= (others => '0');
+ buf_INT_DATA_OUT <= "0000000000000" & TYPE_TRM;
buf_INT_DATAREADY_OUT <= '0';
else
buf_INT_DATA_OUT <= next_INT_DATA_OUT;
process(CLK)
begin
if rising_edge(CLK) then
- if RESET = '1' then --or (INT_PACKET_NUM_IN = "11" and INT_DATAREADY_IN = '1')
+ if RESET = '1' or (INT_PACKET_NUM_IN = "11" and INT_DATAREADY_IN = '1') then --or
saved_packet_type <= "111";
elsif INT_PACKET_NUM_IN = "00" then
saved_packet_type <= INT_DATA_IN(2 downto 0);
next_send_REPLY_ack <= send_REPLY_ack;
next_send_REPLY_trm <= send_REPLY_trm;
next_sending_REPLY_ACK <= sending_REPLY_ACK;
- next_MED_INIT_DATA_OUT <= "0000000000000111";
+ next_MED_INIT_DATA_OUT <= buf_MED_INIT_DATA_OUT;
next_MED_INIT_DATAREADY_OUT <= '0';
- next_MED_REPLY_DATA_OUT <= "0000000000000111";
+ next_MED_REPLY_DATA_OUT <= buf_MED_REPLY_DATA_OUT;
next_MED_REPLY_DATAREADY_OUT <= '0';
next_INIT_SEQNR <= INIT_SEQNR;
--output INIT data
if send_INIT_ack = '1' then
next_MED_INIT_DATAREADY_OUT <= '1';
- --next_MED_DATA_OUT <= ;
- if INIT_transfer_counter = "00" then
- next_MED_INIT_DATA_OUT(2 downto 0) <= TYPE_ACK;
- elsif INIT_transfer_counter = "10" then
- next_MED_INIT_DATA_OUT(3 downto 0) <= "0111";
- elsif INIT_transfer_counter = "11" then
- if MED_INIT_READ_IN = '1' then
- next_send_REPLY_ack <= '1';
+ if buf_MED_INIT_DATAREADY_OUT = '1' and MED_INIT_READ_IN = '1' then
+ if INIT_transfer_counter = "11" then
+ next_MED_INIT_DATA_OUT(2 downto 0) <= TYPE_ACK;
+ elsif INIT_transfer_counter = "01" then
+ next_MED_INIT_DATA_OUT(3 downto 0) <= "0111";
+ elsif INIT_transfer_counter = "10" then
+ if MED_INIT_READ_IN = '1' then
+ next_send_INIT_ack <= '0';
+ end if;
end if;
end if;
end if;
- --output REPLY data
- if send_REPLY_ack = '1' or sending_REPLY_ACK = '1' then
+ if send_REPLY_trm = '1' then
next_MED_REPLY_DATAREADY_OUT <= '1';
- next_sending_REPLY_ACK <= '1';
- if REPLY_transfer_counter = "00" then
- sent_REPLY_ack <= '1';
- next_MED_REPLY_DATA_OUT(2 downto 0) <= TYPE_ACK;
- elsif REPLY_transfer_counter = "10" then
- next_MED_REPLY_DATA_OUT(3 downto 0) <= "0111";
- elsif REPLY_transfer_counter = "11" then
- if MED_REPLY_READ_IN = '1' then
- next_sending_REPLY_ACK <= '0';
+ if buf_MED_REPLY_DATAREADY_OUT = '1' and MED_REPLY_READ_IN = '1' then
+ next_MED_REPLY_DATA_OUT <= (others => '0');
+ if REPLY_transfer_counter = "11" then
+ next_MED_REPLY_DATA_OUT(2 downto 0) <= TYPE_TRM;
+ elsif REPLY_transfer_counter = "10" then
+ next_MED_REPLY_DATA_OUT(11 downto 4) <= INIT_SEQNR;
+ next_MED_REPLY_DATA_OUT(3 downto 0) <= "0000";
+ next_send_REPLY_trm <= '0';
end if;
end if;
- elsif send_REPLY_trm = '1' then
- next_MED_REPLY_DATAREADY_OUT <= '1';
- next_MED_REPLY_DATA_OUT <= (others => '0');
- if REPLY_transfer_counter = "00" then
- next_MED_REPLY_DATA_OUT(2 downto 0) <= TYPE_TRM;
- elsif REPLY_transfer_counter = "11" then
- next_MED_REPLY_DATA_OUT(11 downto 4) <= INIT_SEQNR;
- next_MED_REPLY_DATA_OUT(3 downto 0) <= "0000";
- sent_REPLY_trm <= '1';
- end if;
end if;
-- input data
if MED_INIT_PACKET_NUM_IN = "11" then
if INIT_saved_packet_type = TYPE_EOB then
next_send_INIT_ack <= '1';
+ next_MED_INIT_DATAREADY_OUT <= '1';
+ next_MED_INIT_DATA_OUT(2 downto 0) <= TYPE_ACK;
end if;
if INIT_saved_packet_type = TYPE_TRM then
next_send_INIT_ack <= '1';
+ next_MED_INIT_DATAREADY_OUT <= '1';
+ next_MED_INIT_DATA_OUT(2 downto 0) <= TYPE_ACK;
next_send_REPLY_trm <= '1';
+ next_MED_REPLY_DATA_OUT(2 downto 0) <= TYPE_TRM;
+ next_MED_REPLY_DATAREADY_OUT <= '1';
next_INIT_SEQNR <= MED_INIT_DATA_IN(11 downto 4);
end if;
end if;
end if;
- if MED_REPLY_DATAREADY_IN = '1' then
- if MED_REPLY_PACKET_NUM_IN = "11" then
- if REPLY_saved_packet_type = TYPE_EOB or REPLY_saved_packet_type = TYPE_TRM then
- next_send_REPLY_ack <= '1';
- end if;
- end if;
- end if;
end process;
--count packets
begin
if rising_edge(CLK) then
if RESET = '1' then
- INIT_transfer_counter <= (others => '0');
+ INIT_transfer_counter <= "00";
elsif buf_MED_INIT_DATAREADY_OUT = '1' and MED_INIT_READ_IN = '1' then
INIT_transfer_counter <= INIT_transfer_counter + 1;
end if;
begin
if rising_edge(CLK) then
if RESET = '1' then
- REPLY_transfer_counter <= (others => '0');
+ REPLY_transfer_counter <= "00";
elsif buf_MED_REPLY_DATAREADY_OUT = '1' and MED_REPLY_READ_IN = '1' then
REPLY_transfer_counter <= REPLY_transfer_counter + 1;
end if;
MED_REPLY_DATAREADY_OUT <= buf_MED_REPLY_DATAREADY_OUT;
MED_REPLY_DATA_OUT <= buf_MED_REPLY_DATA_OUT;
- MED_REPLY_PACKET_NUM_OUT <= buf_MED_REPLY_PACKET_NUM_OUT;
+ MED_REPLY_PACKET_NUM_OUT <= REPLY_transfer_counter; -- buf_MED_REPLY_PACKET_NUM_OUT; --
MED_INIT_DATAREADY_OUT <= buf_MED_INIT_DATAREADY_OUT;
MED_INIT_DATA_OUT <= buf_MED_INIT_DATA_OUT;
- MED_INIT_PACKET_NUM_OUT <= buf_MED_INIT_PACKET_NUM_OUT;
+ MED_INIT_PACKET_NUM_OUT <= INIT_transfer_counter; --buf_MED_INIT_PACKET_NUM_OUT;
MED_INIT_OUT_REG: process(CLK)
begin
if rising_edge(CLK) then
if RESET = '1' then
send_REPLY_trm <= '0';
- send_REPLY_ack <= '0';
send_INIT_ack <= '0';
- sending_REPLY_ACK <= '0';
INIT_SEQNR <= (others => '0');
else
- send_REPLY_trm <= next_send_REPLY_trm and not sent_REPLY_trm;
- send_REPLY_ack <= next_send_REPLY_ack and not sent_REPLY_ack;
- send_INIT_ack <= next_send_INIT_ack and not sent_INIT_ack;
- sending_REPLY_ACK <= next_sending_REPLY_ACK;
+ send_REPLY_trm <= next_send_REPLY_trm;
+ send_INIT_ack <= next_send_INIT_ack;
INIT_SEQNR <= next_INIT_SEQNR;
end if;
end if;
);
- TRG_REPLY : trb_net16_term
- generic map (
- FIFO_TERM_BUFFER_DEPTH => 0,
- SECURE_MODE => 0
- )
- port map(
- -- Misc
- CLK => CLK,
- RESET => RESET,
- CLK_EN => CLK_EN,
- INT_DATAREADY_OUT => apl_to_buf_TRG_INIT_DATAREADY,
- INT_DATA_OUT => apl_to_buf_TRG_INIT_DATA,
- INT_PACKET_NUM_OUT => apl_to_buf_TRG_INIT_PACKET_NUM,
- INT_READ_IN => apl_to_buf_TRG_INIT_READ,
- INT_DATAREADY_IN => buf_to_apl_TRG_REPLY_DATAREADY,
- INT_DATA_IN => buf_to_apl_TRG_REPLY_DATA,
- INT_PACKET_NUM_IN => buf_to_apl_TRG_REPLY_PACKET_NUM,
- INT_READ_OUT => buf_to_apl_TRG_REPLY_READ,
- -- "mini" APL, just to see the triggers coming in
- APL_DTYPE_OUT => open,
- APL_ERROR_PATTERN_OUT => open,
- APL_SEQNR_OUT => open,
- APL_GOT_TRM => open,
- APL_RELEASE_TRM => '1',
- APL_ERROR_PATTERN_IN => (others => '0')
- -- Status and control port
- );
+apl_to_buf_TRG_INIT_DATAREADY <= '0';
+apl_to_buf_TRG_INIT_DATA <= (others => '0');
+apl_to_buf_TRG_INIT_PACKET_NUM <= (others => '0');
+buf_to_apl_TRG_REPLY_READ <= '1';
end architecture;
signal MED_REPLY_READ_OUT : std_logic;
signal m_DATAREADY_OUT : std_logic_vector (2**MUX_WIDTH-1 downto 0);
-signal m_DATA_OUT : std_logic_vector (DATA_WIDTH*2**MUX_WIDTH-1 downto 0);
-signal m_PACKET_NUM_OUT: std_logic_vector (NUM_WIDTH*2**MUX_WIDTH-1 downto 0);
+signal m_DATA_OUT : std_logic_vector (DATA_WIDTH*(2**MUX_WIDTH)-1 downto 0);
+signal m_PACKET_NUM_OUT: std_logic_vector (NUM_WIDTH*(2**MUX_WIDTH)-1 downto 0);
signal m_READ_IN : std_logic_vector (2**MUX_WIDTH-1 downto 0);
signal m_DATAREADY_IN : std_logic_vector (2**MUX_WIDTH-1 downto 0);
-signal m_DATA_IN : std_logic_vector (DATA_WIDTH**MUX_WIDTH-1 downto 0);
+signal m_DATA_IN : std_logic_vector (DATA_WIDTH*2**MUX_WIDTH-1 downto 0);
signal m_PACKET_NUM_IN : std_logic_vector (NUM_WIDTH*2**MUX_WIDTH-1 downto 0);
signal m_READ_OUT : std_logic_vector (2**MUX_WIDTH-1 downto 0);
);
- TRM_REPLY : trb_net16_term
- port map(
- -- Misc
- CLK => CLK,
- RESET => RESET,
- CLK_EN => CLK_EN,
- INT_DATAREADY_OUT => apl_to_buf_INIT_DATAREADY,
- INT_DATA_OUT => apl_to_buf_INIT_DATA,
- INT_PACKET_NUM_OUT => apl_to_buf_INIT_PACKET_NUM,
- INT_READ_IN => apl_to_buf_INIT_READ,
- INT_DATAREADY_IN => buf_to_apl_REPLY_DATAREADY,
- INT_DATA_IN => buf_to_apl_REPLY_DATA,
- INT_PACKET_NUM_IN => buf_to_apl_REPLY_PACKET_NUM,
- INT_READ_OUT => buf_to_apl_REPLY_READ,
- -- "mini" APL, just to see the triggers coming in
- APL_DTYPE_OUT => open,
- APL_ERROR_PATTERN_OUT => open,
- APL_SEQNR_OUT => open,
- APL_GOT_TRM => open,
- APL_RELEASE_TRM => '1',
- APL_ERROR_PATTERN_IN => (others => '0')
- -- Status and control port
- );
-
+-- TRM_REPLY : trb_net16_term
+-- port map(
+-- -- Misc
+-- CLK => CLK,
+-- RESET => RESET,
+-- CLK_EN => CLK_EN,
+-- INT_DATAREADY_OUT => apl_to_buf_INIT_DATAREADY,
+-- INT_DATA_OUT => apl_to_buf_INIT_DATA,
+-- INT_PACKET_NUM_OUT => apl_to_buf_INIT_PACKET_NUM,
+-- INT_READ_IN => apl_to_buf_INIT_READ,
+-- INT_DATAREADY_IN => buf_to_apl_REPLY_DATAREADY,
+-- INT_DATA_IN => buf_to_apl_REPLY_DATA,
+-- INT_PACKET_NUM_IN => buf_to_apl_REPLY_PACKET_NUM,
+-- INT_READ_OUT => buf_to_apl_REPLY_READ,
+-- -- "mini" APL, just to see the triggers coming in
+-- APL_DTYPE_OUT => open,
+-- APL_ERROR_PATTERN_OUT => open,
+-- APL_SEQNR_OUT => open,
+-- APL_GOT_TRM => open,
+-- APL_RELEASE_TRM => '1',
+-- APL_ERROR_PATTERN_IN => (others => '0')
+-- -- Status and control port
+-- );
+apl_to_buf_INIT_DATAREADY <= '0';
+apl_to_buf_INIT_DATA <= (others => '0');
+apl_to_buf_INIT_PACKET_NUM <= (others => '0');
+buf_to_apl_REPLY_READ <= '1';
end architecture;
\ No newline at end of file
begin
- gen_shiftreg : if DEPTH < 4 or WIDTH /= 18 generate
+ gen_shiftreg : if DEPTH /= 6 or WIDTH /= 18 generate
FULL_OUT <= current_FULL;
EMPTY_OUT <= current_EMPTY;
- gen_BRAM : if DEPTH > 3 and WIDTH = 18 generate
+ gen_BRAM : if DEPTH = 6 and WIDTH = 18 generate
bram_fifo:trb_net16_bram_fifo
port map (
clock_in => CLK,
jspc29 / trbnet.git / commitdiff