update list of broadcast addresses

diff --git a/trb3/Trb3GeneralRemarks.tex b/trb3/Trb3GeneralRemarks.tex
index 3f92b8fa85ff109c8ea49809f2776c2df877b0c0..11e870efe40b6db755b8adb6b5cbe68c16657342 100644 (file)
--- a/trb3/Trb3GeneralRemarks.tex
+++ b/trb3/Trb3GeneralRemarks.tex
@@ -170,10 +170,11 @@ Fields marked as ``version'' should be increased after any bigger change in the
 \subsection{Network Addresses}
 For proper automatic detection of data in software, the network addresses in a TRB set-up need to have their first hex digit representing their function: 'C' for the CTS, '8' for a hub, '0' or '1' for TDCs. See \ref{Data_Unpacking}.
 
+
 The middle two digits are often chosen to equal the serial number of the board while the last digit enumerates the FPGAs on one board / one crate.
 
+All boards of a given type are accessible by a broadcast address (0xFE\_\_) at the same time. This is set by \signal{Broadcast\_Special\_Addr} in the TrbNet endpoint:
 
-All boards of a given type are accessible in parallel by a broadcast address. This is set by \signal{Broadcast\_Special\_Addr} in the TrbNet endpoint:
 \begin{itemize*}
  \item 0x30 for the TOMcat board
  \item 0x40 for the central FPGA
@@ -211,13 +212,22 @@ All boards of a given type are accessible in parallel by a broadcast address. Th
  \item 0x73 Trb3sc TDC ADA Backplane, 200 MHz calibration
  \item 0x74 Trb3sc TDC 4conn Backplane
  \item 0x75 Trb3sc TDC ADA for NINO Backplane
- \item 0x76 Trb3sc TDC 4conn backplane, edge in separate channels
+ \item 0x76 Trb3sc TDC 4conn Backplane, edge in separate channels
  \item 0x80 Trb5sc 
+ \item 0x81 Trb5sc TDC SFP
+ \item 0x82 Trb5sc Mimosis read-out
+ \item 0x83 Trb5sc PONE
+ \item 0x84 Trb5sc TDC Backplane
+ \item 0x85 Trb5sc CBM RICH
  \item 0x90 MDC central
  \item 0x91 MDC TDC
 \end{itemize*}
 
-The initial address set with \signal{Regio\_Init\_Address} can be chosen freely. Some suggestions:
+
+In addition, broadcast addresses 0xFD\_\_ can be configured at runtime (register 0x7001) to make arbitrary sub-groups of boards addressable with their own broadcast.
+
+The initial address set with \signal{Regio\_Init\_Address} can be chosen in the range between 0xf000 and 0xfcff. Some common addresses are:
+
 \begin{itemize*}
  \item 0xF300 for the central FPGA
  \item 0xF305 for the peripheral FPGA