+static char rcsId[]="";
#define _GNU_SOURCE
#include <stdio.h>
#include <stdlib.h>
#define HEXMODE 0
#endif
+#define VERSION_NUMBER "2.00 20090723"
+
static int hexMode = HEXMODE;
/* ------ MAIN ---------------------------------------------------------- */
printf(" -l lazy-mode: skip most consistency-checks of packages\n");
printf(" -H hex-mode: all following arguments will be interpreted "
"as hexadecimal-numbers\n");
+ printf(" -V Version number\n");
printf("\nCommands:\n");
printf(" r <trbaddress> <register> -> read register\n");
printf(" w <trbaddress> <register> <data> -> write register\n");
char scriptFileName[256] = "";
char cmd[CMD_MAX_NUM][CMD_SIZE];
char *cmdLine = NULL;
+ size_t cmdLineLen = 0;
unsigned int cmdLen = 0;
uint16_t trb_address = 0;
uint16_t reg_address = 0;
trb_lazy = 0;
/* Parse Arguments */
- while ((opt = getopt(argc, argv, "+hf:n:d:DlH")) != -1) {
+ while ((opt = getopt(argc, argv, "+hf:n:d:DlHV")) != -1) {
switch (opt) {
case '?':
usage(basename(argv[0]));
case 'H':
hexMode = 1;
break;
+ case 'V':
+ printf("trbcmd %s\n", VERSION_NUMBER);
+ exit(EXIT_SUCCESS);
+ break;
default:
break;
}
} else {
/* Get next command from file */
char *c = NULL;
- size_t len = 0;
+
unsigned int i;
lineCtr++;
cmd[i][0] = '\0';
}
- if ((scriptStatus = getline(&cmdLine, &len, scriptFile)) == -1) {
+ if ((scriptStatus =
+ getline(&cmdLine, &cmdLineLen, scriptFile)) == -1) {
if (feof(scriptFile) != 0) {
/* EOF reached */
rewind(scriptFile);
exit(EXIT_FAILURE);
}
}
-
+
/* Remove newline and comments */
if ((c = strchr(cmdLine, '\n')) != NULL) {
*c = '\0';
/* Empty Line */
continue;
}
- printf("#Line %d: %s\n", lineCtr, cmdLine);
}
-
+
if (strncmp(cmd[0], "w", CMD_SIZE) == 0) {
/*******************************************/
}
exit(EXIT_FAILURE);
}
-
} /* End script-file-loop */
} /* End repeat-loop */
#include <stdio.h>
#include <stdlib.h>
+#include <signal.h>
#include <fs_fpga_int_mem.h>
+#include <port.h>
#include <trberror.h>
#include "trbnet.h"
#define MAX_TIME_OUT 1500000
#define DATA_BUFFER_SIZE 8192
-
/* ---------------------------------------------------------------------- */
+static sigset_t blockSet; /* Used for blocking Signals SIGINT and SIGTERM */
+static sigset_t blockSetOld;
+static int signalsBlocked = 0;
+
unsigned int trb_debug = 0;
unsigned int trb_lazy = 0;
unsigned int trb_dma = 0;
case HEADER_DAT:
for (i = 0; (i < 2) && (dataCtr < len); i++) {
if (dataCtr < dsize) {
- data[dataCtr++] = i == 0
+ data[dataCtr++] = (i == 0)
? (((uint32_t)package.F0 << 16) |
((uint32_t)package.F1))
: (((uint32_t)package.F2 << 16) |
if (timeout >= MAX_TIME_OUT) {
trb_fifo_flush(channel);
- trb_errno = TRB_FIFO_TIMEOUT;
+ trb_errno = TRB_FIFO_INCOMPLETE;
return -1;
}
}
return dataCtr;
}
+static void blockSignals()
+{
+ signalsBlocked++;
+ if (signalsBlocked > 1) return;
+ sigprocmask(SIG_BLOCK, &blockSet, &blockSetOld);
+}
+
+static void unblockSignals()
+{
+ signalsBlocked--;
+ if (signalsBlocked > 0) return;
+ sigprocmask(SIG_SETMASK, &blockSetOld, NULL);
+}
+
/* ----- Global Functions ----------------------------------------------- */
+/* Intit FPGA Interface */
+int init_ports()
+{
+ /* Set signal mask for blocking */
+ sigemptyset(&blockSet);
+ sigaddset(&blockSet, SIGINT);
+ sigaddset(&blockSet, SIGTERM);
+ sigemptyset(&blockSetOld);
+
+ if (port_init_ports() != 0) {
+ /* Set trberrno ?? */
+ return -1;
+ }
+
+ return 0;
+}
+
+void close_ports()
+{
+ port_close_ports();
+}
+
int trb_fifo_flush(uint8_t channel)
{
uint32_t tmp;
if (trb_debug > 1) {
fprintf(stderr, "Flushing FIFO of channel# %d\n", channel);
}
+
+ blockSignals();
fifoAddress = CHANNEL_N_RECEIVER_DATA | ((channel * 2 + 1) << 4);
do {
}
} while ((tmp & MASK_FIFO_VALID) != 0);
+ unblockSignals();
+
return 0;
}
if (trb_debug > 0) {
fprintf(stderr, "Init_Transfer done.\n");
}
-
+
+ blockSignals();
+
/* Build up package and start transfer */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address);
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
status = trb_fifo_read(3, FIFO_MODE_REG_READ, data, dsize);
+ unblockSignals();
+
if ((status > 0) && (status % 2 != 0)) {
trb_errno = TRB_INVALID_PKG_NUMBER;
return -1;
fprintf(stderr, "Init_Tranfer done.\n");
}
+ blockSignals();
+
/* Build up package and start transfer */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address);
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
status = trb_fifo_read(3, FIFO_MODE_REG_READ_MEM, data, dsize);
+ unblockSignals();
+
if (status == -1) return status;
/* Check size */
uint16_t reg_address,
uint32_t value)
{
+ int status;
+
trb_errno = TRB_NONE;
/* Init transfer */
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Build up package */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address);
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
fprintf(stderr, "CMD_REGISTER_WRITE started.\n");
}
- return trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0);
+ status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0);
+
+ unblockSignals();
+
+ return status;
}
int trb_register_write_mem(uint16_t trb_address,
{
uint16_t config;
uint16_t i;
+ int status;
trb_errno = TRB_NONE;
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Build up package */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address);
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
fprintf(stderr, "CMD_REGISTER_WRITE_MEM started.\n");
}
- return trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0);
+ status = trb_fifo_read(3, FIFO_MODE_REG_WRITE, NULL, 0);
+
+ unblockSignals();
+
+ return status;
}
int trb_read_uid(uint16_t trb_address,
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Build up package and start transfer */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, trb_address);
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
status = trb_fifo_read(3, FIFO_MODE_UID, (uint32_t*)uidBuffer, dsize);
+ unblockSignals();
+
if ((status > 0) && (status % 4 != 0)) {
trb_errno = TRB_INVALID_PKG_NUMBER;
return -1;
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Build up package and start transfer */
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, 0xffff); /* always broadcast */
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
}
status = trb_fifo_read(3, FIFO_MODE_SET_ADDRESS, NULL, 0);
+
+ unblockSignals();
+
if (status == -1) return -1;
-
if (status != 2) {
trb_errno = TRB_ENDPOINT_NOT_REACHED;
return -1;
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Prepare IPU channel */
write32_to_FPGA(CHANNEL_1_SENDER_ERROR, (((uint32_t)trg_info << 24) |
((uint32_t)trg_random << 16) |
status = trb_fifo_read(1, FIFO_MODE_IPU_DATA, data, dsize);
+ unblockSignals();
+
return status;
}
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Prepare trigger channel */
write32_to_FPGA(CHANNEL_0_SENDER_ERROR, (((uint32_t)trg_info << 24) |
((uint32_t)trg_random << 16) |
/* Check for replay packets (trigger) */
status = trb_fifo_read(0, FIFO_MODE_NONE, NULL, 0);
+
+ unblockSignals();
+
if (status == -1) return -1;
return 0;
fprintf(stderr, "Init_Transfer done.\n");
}
+ blockSignals();
+
/* Prepare trigger channel */
write32_to_FPGA(CHANNEL_0_SENDER_ERROR, (((uint32_t)trg_info << 24) |
((uint32_t)trg_random << 16) |
write32_to_FPGA(CHANNEL_3_TARGET_ADDRESS, 0x0000fffb); /* RICH Subnet only */
write32_to_FPGA(CHANNEL_3_SENDER_ERROR, 0x00000000);
write32_to_FPGA(CHANNEL_3_SENDER_DATA, (0x8080 | (uint32_t)trg_input));
- write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x0000dead); /*fake data is */
- write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x0000beef); /* discarded at ADCM */
+ write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x0000dead); /* fake data is */
+ write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x0000beef); /* discarded at ADCM */
write32_to_FPGA(CHANNEL_3_SENDER_DATA, 0x00000000);
/* Send both fake trigger and LVL1 information */
status = trb_fifo_read(3, FIFO_MODE_NONE, NULL, 0);
if (status == -1) {
trb_fifo_flush(0);
+ unblockSignals();
return -1;
}
/* Check for replay packets (trigger) */
status = trb_fifo_read(0, FIFO_MODE_NONE, NULL, 0);
+
+ unblockSignals();
+
if (status == -1) return -1;
return 0;