SEND_RESET);
signal current_state : state_t;
- type ram_t is array(0 to 255) of std_logic_vector(15 downto 0);
+ type ram_t is array(0 to 255) of std_logic_vector(17 downto 0);
signal ram : ram_t;
signal ram_write : std_logic;
signal ram_write_addr : unsigned(7 downto 0);
signal ram_read : std_logic;
signal ram_read_addr : unsigned(7 downto 0);
- signal ram_dout : std_logic_vector(15 downto 0);
+ signal ram_dout : std_logic_vector(17 downto 0);
signal ram_fill_level : unsigned(7 downto 0);
signal ram_empty : std_logic;
signal ram_afull : std_logic;
signal request_retransmit_i : std_logic;
signal buf_tx_read_out : std_logic;
- signal tx_data_25_i : std_logic_vector(15 downto 0);
+ signal tx_data_25_i : std_logic_vector(17 downto 0);
signal tx_allow_qtx : std_logic;
signal tx_allow_q : std_logic;
signal send_link_reset_qtx : std_logic;