fixed missing wait for ready when reading, IF

diff --git a/interface/spi_slave.vhd b/interface/spi_slave.vhd
index 9badbab5a5d7cdb32c8f6472b15305c1590889e4..8db8c1aacfaed9e1718283b5d0bc086172fdb011 100644 (file)
--- a/interface/spi_slave.vhd
+++ b/interface/spi_slave.vhd
@@ -114,10 +114,18 @@ PROC_GEN_SIGNALS : process begin
       state <= PREPARE_OUTPUT;
       
     when PREPARE_OUTPUT =>
-      if READY_IN = '1' then
-        output_data(15 downto 0) <= DATA_IN;
+      if operation_i = '0' then
+        if READY_IN = '1' then
+          output_data(15 downto 0) <= DATA_IN;
+          state <= WRITE_DATA;
+        end if;
+      else
+--        if READY_IN = '1' then
+--          output_data(15 downto 0) <= DATA_IN;
+--        end if;
+        output_data(15 downto 0) <= x"0000";
+        state <= WRITE_DATA;
       end if;
-      state <= WRITE_DATA;
       
     when WRITE_DATA =>
       if bitcnt = 31 then