constant use_120_mhz : integer := 0;
---TDC settings
- constant NUM_TDC_CHANNELS : integer range 1 to 65 := 33; -- number of tdc channels per module
- constant NUM_TDC_CHANNELS_POWER2 : integer range 0 to 6 := 5; --the nearest power of two, for convenience reasons
-
- constant EVENT_BUFFER_SIZE : integer range 9 to 13 := 10; -- size of the event buffer, 2**N
- constant EVENT_MAX_SIZE : integer := 400; --maximum event size. Must not exceed EVENT_BUFFER_SIZE/2
------------------------------------------------------------------------------
------------------------------------------------------------------------------
- type data_t is array (0 to 1023) of std_logic_vector(7 downto 0);
- constant LCD_DATA : data_t := (others => x"00");
-
------------------------------------------------------------------------------
--Select settings by configuration
------------------------------------------------------------------------------
add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
+
add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"
REGIO_WRITE_ACK_IN => wrack,
REGIO_UNKNOWN_ADDR_IN => ctrlbus_tx.unknown,
REGIO_TIMEOUT_OUT => ctrlbus_rx.timeout,
-
+ BUS_MASTER_IN => bus_master_in,
+ BUS_MASTER_OUT => bus_master_out,
+ BUS_MASTER_ACTIVE => bus_master_active,
ONEWIRE => open,
ONEWIRE_MONITOR_OUT => open,
I2C_SCL => I2C_SCL,