-- KEL : inout std_logic_vector(40 downto 1);
--Additional IO
- HDR_IO : inout std_logic_vector( 9 downto 0);
+ HDR_IO : inout std_logic_vector(10 downto 1);
RJ_IO : inout std_logic_vector( 3 downto 0);
SPARE_IN : in std_logic_vector( 1 downto 0);
signal reset_i : std_logic;
signal clear_i : std_logic;
- signal time_counter : unsigned(31 downto 0) := (others => '0');
+ signal time_counter : unsigned(31 downto 0) := (others => '0');
+ signal led : std_logic_vector(1 downto 0);
signal debug_clock_reset : std_logic_vector(31 downto 0);
--Media Interface
- signal med2int : med2int_array_t(0 to 0);
- signal int2med : int2med_array_t(0 to 0);
- signal med_stat_debug : std_logic_vector (1*64-1 downto 0);
+ signal med2int : med2int_array_t(0 to 0);
+ signal int2med : int2med_array_t(0 to 0);
+ signal med_stat_debug : std_logic_vector (1*64-1 downto 0);
--READOUT
- signal readout_rx : READOUT_RX;
- signal readout_tx : readout_tx_array_t(0 to 0);
+ signal readout_rx : READOUT_RX;
+ signal readout_tx : readout_tx_array_t(0 to 0);
signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx : CTRLBUS_RX;
signal ctrlbus_tx, bussci_tx, bustools_tx, bustc_tx : CTRLBUS_TX;
signal sed_error_i : std_logic;
signal clock_select : std_logic;
+
+ signal spi_cs, spi_mosi, spi_miso, spi_clk : std_logic_vector(15 downto 0);
+ signal uart_tx, uart_rx : std_logic;
signal timer : TIMERS;
+
attribute syn_keep of GSR_N : signal is true;
attribute syn_preserve of GSR_N : signal is true;
PROGRAMN => PROGRAMN,
REBOOT_IN => common_ctrl_reg(15),
--SPI
- SPI_CS_OUT => open,
- SPI_MOSI_OUT=> open,
- SPI_MISO_IN => open,
- SPI_CLK_OUT => open,
+ SPI_CS_OUT => spi_cs,
+ SPI_MOSI_OUT=> spi_mosi,
+ SPI_MISO_IN => spi_miso,
+ SPI_CLK_OUT => spi_clk,
--UART
- UART_TX => open,
- UART_RX => open,
+ UART_TX => uart_tx,
+ UART_RX => uart_rx,
--ADC
ADC_CS => ADC_CS,
ADC_MOSI => ADC_DIN,
---------------------------------------------------------------------------
-- I/O
---------------------------------------------------------------------------
- HDR_IO <= (others => '0');
+ HDR_IO(1) <= uart_tx;
+ uart_rx <= HDR_IO(2);
+ HDR_IO(3) <= spi_mosi(8);
+ spi_miso(8) <= HDR_IO(4);
+ HDR_IO(5) <= spi_clk(8);
+ HDR_IO(6) <= spi_cs(8);
+ HDR_IO(10 downto 7) <= (others => '0');
+
RJ_IO <= "0000";
BACK_GPIO <= (others => 'Z');
LED_ORANGE <= debug_clock_reset(1);
LED_RED <= not sed_error_i;
LED_YELLOW <= debug_clock_reset(2);
- LED_WHITE <= time_counter(26) & time_counter(28);
+ LED_WHITE <= led;
LED_SFP_GREEN <= not med2int(0).stat_op(9) & '1'; --SFP Link Status
LED_SFP_RED <= not (med2int(0).stat_op(10) or med2int(0).stat_op(11)) & '1'; --SFP RX/TX
end if;
end process;
+ led(0) <= time_counter(26) and time_counter(19);
+ led(1) <= time_counter(20);
+
+
-- TEST_LINE <= med_stat_debug(15 downto 0);
end architecture;