update TDC documentation for v2.4

diff --git a/trb3/TdcControlReg.tex b/trb3/TdcControlReg.tex
index 41b8ec3dbd80ac3de2d84397ea28e042e4fbbbab..e03b0024a58487cd17f943676b6a269fd3773b66 100644 (file)
--- a/trb3/TdcControlReg.tex
+++ b/trb3/TdcControlReg.tex
@@ -19,7 +19,7 @@
   \endlastfoot  \textbf{BasicControl}\hfill(rw) & c800 &   & Basic control for all channels \\
   \quad  DebugOutput &  & 0--3 & Enables different signals to the HPLA* output for debugging with logic analyser \\
   \quad  DebugMode &  & 4 & Enables the Debug Mode. Different statistics and debug words are sent after every trigger \\
-  \quad  LightMode &  & 5 & Enables the Light Mode. No header and reference channel information is sent if there are no recorded hits. Works only in the free streaming mode (trigger window off) \\
+  \quad  LightMode &  & 5 & Enables the Light Mode. Deprecated as of v2.4 - use the minimum event size feature of the endpoint \\
   \quad  ResetCounters &  & 8 & Resets the internal counters \\
   \quad  ResetCoarseCounter &  & 13 & Used to reset the coarse counters. Setting this bit signals for the coarse counter reset but the action will take place with the arrival of the next valid trigger in order to synchronise the coarse counters in a large system. \\
   \quad  CalibrationPrescaler &  & 28--31 & Used to divide the calibration hit frequency. \\

diff --git a/trb3/TdcDataFormat.tex b/trb3/TdcDataFormat.tex
index 23a89912d96cb9fa23e334259e2781192440c4ad..ebc2fb10d72e47a0f5cc608b2c1b8980ab967458 100644 (file)
--- a/trb3/TdcDataFormat.tex
+++ b/trb3/TdcDataFormat.tex
@@ -13,7 +13,8 @@ The data format of the \textbf{\textit{time data}} word is shown below:
       \textbf{Data Format} & \textbf{Bits} & \textbf{Description}\\
       \hline
       0x0 & 31 & Time Data Marker\\
-      & 30-29 & reserved\\
+      & 30 & reserved. In v2.4 used as marker for corrected, approximate time values\\
+      & 29 & reserved\\
       & 28-22 & channel number\\
       & 21-12 & fine time - sum of the two transition of the WUL\\
       & 11 & the type of the measured edge - '1' rising, '0' falling edge\\
@@ -203,13 +204,15 @@ below:
 \end{table}
 
 The EPOCH counter is designed with 28 bits increasing the total measurement
-range up to $\sim$45,8~min. For each channel an individual EPOCH counter is
+range up to $\sim$45.8~min. For each channel an individual EPOCH counter is
 implemented and they are incremented, when the coarse counter wraps
 around. The value of the EPOCH counter is kept in a register before it is
 written in the channel memory. It is written once per event per channel and 
 only updated, if a time measurement takes place after the last increment of the 
-EPOCH counter. In order to be on the safe side and not overflow the EPOCH 
-counter, the readout trigger frequency can be set minimum to 24~Hz.
+EPOCH counter. 
+
+Starting from v2.4, the epoch counter is not written for each channel anymore.
+The epoch word is only included only once per event and everytime it changes.
 
 
 \subsubsection{TDC TRAILER (was RESERVED before tdc\_v2.3)}

diff --git a/trb3/TdcFeatures.tex b/trb3/TdcFeatures.tex
index 1dfd23df8b504271f388819f7be59aff18202956..c54ca93bcd38fde47d0407978758969c7ba47930 100644 (file)
--- a/trb3/TdcFeatures.tex
+++ b/trb3/TdcFeatures.tex
@@ -10,6 +10,8 @@ trigger window is relative to the rising edge of the reference time at the
 5~ns. The \textit{Pre-Trigger Window} and \textit{Post-Trigger Window} widths
 can be set via slow control (Table \ref{tab:tdcControlReg}).
 
+As of verson 2.4, the post-trigger window can be set to negative values. The 11 Bit wide register allows values from -1023 to 1023, corresponding to times -5115 ns to +5115 ns. The values 0x0 to 0xa are not allowed and the post-window setting must be later than the pre-window.
+
 \begin{figure}[htp]
   \centering
   \includegraphics[width=0.8\textwidth]{figures/tdcTrigWinWF.png}
@@ -17,9 +19,4 @@ can be set via slow control (Table \ref{tab:tdcControlReg}).
   \label{fig:tdcTrigWin}
 \end{figure}
 
-Trigger mode is controlled by register 0xc800 bit 12. If it is set to triggered
-mode ('1'), the epoch and coarse counters are reset after each trigger
-window. If this bit is set to trigger-less mode ('0'), the epoch and coarse
-counters are never reset, unless there is a system wide reset. They will run
-until they have an overflow. \textbf{This feature is disabled the after tdc 
-version 2.0.0, as it is obsolete for the analysis software.}
+

diff --git a/trb3/TdcVersion.tex b/trb3/TdcVersion.tex
index 5175277ff9cea4c4b57bc3ddf5828b10eef0e750..f2ac877c3770e7c77d0cafcb26ab2e0ec563de24 100644 (file)
--- a/trb3/TdcVersion.tex
+++ b/trb3/TdcVersion.tex
@@ -9,7 +9,11 @@
 \hline\multicolumn{3}{r}{Continued on next page} \\
 \endfoot
 \endlastfoot
-tdc\_v2.4* & 08.03.2015 & Faster clock (400 MHz) for the delay line is used.\\
+tdc\_v2.4 & 12.2018 &     Epoch markers are not sent for each channel, but only once when the epoch of the next hit changes.\newline
+    Better handling of small ring-buffer sizes - limit to few words per channel possible\newline
+    The trigger window can be adjusted to end before the reference time (valid "after" settings -5000..-5, 50..5000 ns)\newline
+    TrbNet allows to discard empty events by setting a minimum event size in the readout controller\newline
+    Wrongly decoded hits (fine time 0x3ff) are replaced by an approximate time information. These hits are marked in Bit 29 in the data word. \\
 \hline
 tdc\_v2.3 & 08.12.2015 & Trailer word is introduced to mark some error bits.\\
  &  & Temperature value is added to the data stream for status trigger (0xE).\\