resize ram counters properly

diff --git a/ADC/source/adc_processor_cfd.vhd b/ADC/source/adc_processor_cfd.vhd
index 94dd99507383a1e0db8d40265d2bf862db132c3d..0a71b004885cebdf828c6e3ceaedd4c65f945b78 100644 (file)
--- a/ADC/source/adc_processor_cfd.vhd
+++ b/ADC/source/adc_processor_cfd.vhd
@@ -93,7 +93,7 @@ begin
                DEBUG    => debug_adc(i)
       );
     
-    ram_addr_sys(i) <= std_logic_vector(ram_counter(i));
+    ram_addr_sys(i) <= std_logic_vector(resize(ram_counter(i),ram_addr_sys(i)'length));
     dpram : entity work.dpram_32x512
       port map(WrAddress => ram_addr_adc(i),
                RdAddress => ram_addr_sys(i),

diff --git a/ADC/source/adc_processor_cfd_ch.vhd b/ADC/source/adc_processor_cfd_ch.vhd
index 9f97c4abac0b4ba2d12d9afa09b0dd6c9c9a22d4..c2f65cfdbc3ed125b5e48a08d7873828b57f8502 100644 (file)
--- a/ADC/source/adc_processor_cfd_ch.vhd
+++ b/ADC/source/adc_processor_cfd_ch.vhd
@@ -221,7 +221,7 @@ begin
   end process proc_integral_delay;
 
   -- ZeroX detect, integrate, write to RAM
-  RAM_ADDR <= std_logic_vector(ram_counter);
+  RAM_ADDR <= std_logic_vector(resize(ram_counter,RAM_ADDR'length));
   proc_zeroX_gate : process is
     variable zeroX            : std_logic := '0';
     variable integral_counter : integer range 0 to 2 ** CONF.IntegrateWindow'length - 1;