gen_TRIGGER_LOGIC : if INCLUDE_TRIGGER_LOGIC = 1 generate
THE_TRIG_LOGIC : input_to_trigger_logic
generic map(
- INPUTS => PHYSICAL_INPUTS,
- OUTPUTS => 4
+ INPUTS => TRIG_GEN_INPUT_NUM,
+ OUTPUTS => TRIG_GEN_OUTPUT_NUM
)
port map(
CLK => clk_100_i,
- INPUT => INP(PHYSICAL_INPUTS-1 downto 0),
+ INPUT => INP(TRIG_GEN_INPUT_NUM-1 downto 0),
OUTPUT => trig_out,
DATA_IN => trig_din,
THE_STAT_LOGIC : entity work.input_statistics
generic map(
- INPUTS => PHYSICAL_INPUTS,
+ INPUTS => MONITOR_INPUT_NUM,
SINGLE_FIFO_ONLY => USE_SINGLE_FIFO
)
port map(
CLK => clk_100_i,
- INPUT => INP(PHYSICAL_INPUTS-1 downto 0),
+ INPUT => INP(MONITOR_INPUT_NUM-1 downto 0),
DATA_IN => stat_din,
DATA_OUT => stat_dout,
gen_TRIGGER_LOGIC : if INCLUDE_TRIGGER_LOGIC = 1 generate
THE_TRIG_LOGIC : input_to_trigger_logic
generic map(
- INPUTS => PHYSICAL_INPUTS,
- OUTPUTS => 4
+ INPUTS => TRIG_GEN_INPUT_NUM,
+ OUTPUTS => TRIG_GEN_OUTPUT_NUM
)
port map(
CLK => clk_100_i,
- INPUT => INP(PHYSICAL_INPUTS-1 downto 0),
+ INPUT => INP(TRIG_GEN_INPUT_NUM-1 downto 0),
OUTPUT => trig_out,
DATA_IN => trig_din,
THE_STAT_LOGIC : entity work.input_statistics
generic map(
- INPUTS => PHYSICAL_INPUTS,
+ INPUTS => MONITOR_INPUT_NUM,
SINGLE_FIFO_ONLY => USE_SINGLE_FIFO
)
port map(
CLK => clk_100_i,
- INPUT => INP(PHYSICAL_INPUTS-1 downto 0),
+ INPUT => INP(MONITOR_INPUT_NUM-1 downto 0),
DATA_IN => stat_din,
DATA_OUT => stat_dout,
DEBUG_TX_OUT => debug_tx,
--Trigger & Monitor
- MONITOR_INPUTS(19 downto 0) => INP(19 downto 0),
- MONITOR_INPUTS(23 downto 20) => trig_gen_out_i,
- TRIG_GEN_INPUTS => INP(15 downto 0),
+ MONITOR_INPUTS(31 downto 0) => INP(31 downto 0),
+ MONITOR_INPUTS(35 downto 32) => trig_gen_out_i,
+ TRIG_GEN_INPUTS => INP(31 downto 0),
TRIG_GEN_OUTPUTS => trig_gen_out_i,
LCD_OUT => lcd_out,
--SED