recent changes, JM

diff --git a/cts/trb3_central.p2t b/cts/trb3_central.p2t
index 3838d811216aae4a52b87bd1e14709b294e4a965..7b937b77bf5deb33b3ae46663876f685d8bff347 100644 (file)
--- a/cts/trb3_central.p2t
+++ b/cts/trb3_central.p2t
@@ -4,7 +4,7 @@
 -n 1
 -y
 -s 12
--t 10
+-t 14
 -c 1
 -e 2
 #-g guidefile.ncd

diff --git a/tdc_releases/tdc_v1.1.1/Encoder_304_Bit.vhd b/tdc_releases/tdc_v1.1.1/Encoder_304_Bit.vhd
index 79de25de9d7000418e4414612b7189f25fc1590f..bca1d381ccbff10b34e4a17d6812c35cdd00b43b 100644 (file)
--- a/tdc_releases/tdc_v1.1.1/Encoder_304_Bit.vhd
+++ b/tdc_releases/tdc_v1.1.1/Encoder_304_Bit.vhd
@@ -354,159 +354,159 @@ begin
     end case;
   end process FSM_PROC;
 
+--   --purpose : Conversion number 1
+--   Conv_1 : process (CLK, RESET)
+--   begin
+--     if rising_edge(CLK) then
+--       if RESET = '1' then
+--         proc_cnt_1      <= x"6";
+--         proc_finished_1 <= '0';
+--       elsif start_cnt_1_i = '1' then
+--         proc_cnt_1      <= x"1";
+--         proc_finished_1 <= '0';
+--       elsif proc_cnt_1 = x"5" then
+--         proc_cnt_1      <= proc_cnt_1 + 1;
+--         proc_finished_1 <= '1';
+--       elsif proc_cnt_1 = x"6" then
+--         proc_cnt_1      <= x"6";
+--         proc_finished_1 <= '0';
+--       else
+--         proc_cnt_1      <= proc_cnt_1 + 1;
+--         proc_finished_1 <= '0';
+--       end if;
+--     end if;
+--   end process Conv_1;
+-- 
+--   --purpose : Conversion number 2
+--   Conv_2 : process (CLK, RESET)
+--   begin
+--     if rising_edge(CLK) then
+--       if RESET = '1' then
+--         proc_cnt_2      <= x"6";
+--         proc_finished_2 <= '0';
+--       elsif start_cnt_2_i = '1' then
+--         proc_cnt_2      <= x"1";
+--         proc_finished_2 <= '0';
+--       elsif proc_cnt_2 = x"5" then
+--         proc_cnt_2      <= proc_cnt_2 + 1;
+--         proc_finished_2 <= '1';
+--       elsif proc_cnt_2 = x"6" then
+--         proc_cnt_2      <= x"6";
+--         proc_finished_2 <= '0';
+--       else
+--         proc_cnt_2      <= proc_cnt_2 + 1;
+--         proc_finished_2 <= '0';
+--       end if;
+--     end if;
+--   end process Conv_2;
+-- 
+--   --purpose : Conversion number 3
+--   Conv_3 : process (CLK, RESET)
+--   begin
+--     if rising_edge(CLK) then
+--       if RESET = '1' then
+--         proc_cnt_3      <= x"6";
+--         proc_finished_3 <= '0';
+--       elsif start_cnt_3_i = '1' then
+--         proc_cnt_3      <= x"1";
+--         proc_finished_3 <= '0';
+--       elsif proc_cnt_3 = x"5" then
+--         proc_cnt_3      <= proc_cnt_3 + 1;
+--         proc_finished_3 <= '1';
+--       elsif proc_cnt_3 = x"6" then
+--         proc_cnt_3      <= x"6";
+--         proc_finished_3 <= '0';
+--       else
+--         proc_cnt_3      <= proc_cnt_3 + 1;
+--         proc_finished_3 <= '0';
+--       end if;
+--     end if;
+--   end process Conv_3;
+-- 
+--   --purpose : Conversion number 4
+--   Conv_4 : process (CLK, RESET)
+--   begin
+--     if rising_edge(CLK) then
+--       if RESET = '1' then
+--         proc_cnt_4      <= x"6";
+--         proc_finished_4 <= '0';
+--       elsif start_cnt_4_i = '1' then
+--         proc_cnt_4      <= x"1";
+--         proc_finished_4 <= '0';
+--       elsif proc_cnt_4 = x"5" then
+--         proc_cnt_4      <= proc_cnt_4 + 1;
+--         proc_finished_4 <= '1';
+--       elsif proc_cnt_4 = x"6" then
+--         proc_cnt_4      <= x"6";
+--         proc_finished_4 <= '0';
+--       else
+--         proc_cnt_4      <= proc_cnt_4 + 1;
+--         proc_finished_4 <= '0';
+--       end if;
+--     end if;
+--   end process Conv_4;
+-- 
+--   Binary_Code_Calculation : process (CLK, RESET)
+--   begin
+--     if rising_edge(CLK) then
+--       if RESET = '1' then
+--         BINARY_CODE_OUT <= (others => '0');
+--         FINISHED_OUT    <= '0';
+--       elsif conv_finished_i = '1' and interval_detected_i = '1' then
+--         BINARY_CODE_OUT <= ('0' & binary_code_r) + ('0' & binary_code_f);
+--         FINISHED_OUT    <= '1';
+--       else
+-- --        BINARY_CODE_OUT <= (others => '0');
+--         FINISHED_OUT    <= '0';
+--       end if;
+--     end if;
+--   end process Binary_Code_Calculation;
+-- 
+--   conv_finished_i <= proc_finished_1 or proc_finished_2 or proc_finished_3 or proc_finished_4;
+
+
+-------------------------------------------------------------------------------
+-- DEBUG
+-------------------------------------------------------------------------------
   --purpose : Conversion number 1
   Conv_1 : process (CLK, RESET)
   begin
-    if rising_edge(CLK) then
-      if RESET = '1' then
-        proc_cnt_1      <= x"6";
-        proc_finished_1 <= '0';
-      elsif start_cnt_1_i = '1' then
-        proc_cnt_1      <= x"1";
-        proc_finished_1 <= '0';
-      elsif proc_cnt_1 = x"5" then
-        proc_cnt_1      <= proc_cnt_1 + 1;
-        proc_finished_1 <= '1';
-      elsif proc_cnt_1 = x"6" then
-        proc_cnt_1      <= x"6";
-        proc_finished_1 <= '0';
-      else
-        proc_cnt_1      <= proc_cnt_1 + 1;
-        proc_finished_1 <= '0';
-      end if;
-    end if;
+   if rising_edge(CLK) then
+     if RESET = '1' then
+       proc_cnt_1      <= x"3";
+       proc_finished_1 <= '0';
+     elsif START_IN = '1' then
+       proc_cnt_1      <= x"1";
+       proc_finished_1 <= '0';
+     elsif proc_cnt_1 = x"1" or proc_cnt_1 = x"2" then
+       proc_cnt_1      <= proc_cnt_1 + 1;
+       proc_finished_1 <= '1';
+     elsif proc_cnt_1 = x"3" then
+       proc_cnt_1      <= x"3";
+       proc_finished_1 <= '0';
+     else
+       proc_cnt_1      <= proc_cnt_1 + 1;
+       proc_finished_1 <= '0';
+     end if;
+   end if;
   end process Conv_1;
 
-  --purpose : Conversion number 2
-  Conv_2 : process (CLK, RESET)
-  begin
-    if rising_edge(CLK) then
-      if RESET = '1' then
-        proc_cnt_2      <= x"6";
-        proc_finished_2 <= '0';
-      elsif start_cnt_2_i = '1' then
-        proc_cnt_2      <= x"1";
-        proc_finished_2 <= '0';
-      elsif proc_cnt_2 = x"5" then
-        proc_cnt_2      <= proc_cnt_2 + 1;
-        proc_finished_2 <= '1';
-      elsif proc_cnt_2 = x"6" then
-        proc_cnt_2      <= x"6";
-        proc_finished_2 <= '0';
-      else
-        proc_cnt_2      <= proc_cnt_2 + 1;
-        proc_finished_2 <= '0';
-      end if;
-    end if;
-  end process Conv_2;
-
-  --purpose : Conversion number 3
-  Conv_3 : process (CLK, RESET)
-  begin
-    if rising_edge(CLK) then
-      if RESET = '1' then
-        proc_cnt_3      <= x"6";
-        proc_finished_3 <= '0';
-      elsif start_cnt_3_i = '1' then
-        proc_cnt_3      <= x"1";
-        proc_finished_3 <= '0';
-      elsif proc_cnt_3 = x"5" then
-        proc_cnt_3      <= proc_cnt_3 + 1;
-        proc_finished_3 <= '1';
-      elsif proc_cnt_3 = x"6" then
-        proc_cnt_3      <= x"6";
-        proc_finished_3 <= '0';
-      else
-        proc_cnt_3      <= proc_cnt_3 + 1;
-        proc_finished_3 <= '0';
-      end if;
-    end if;
-  end process Conv_3;
-
-  --purpose : Conversion number 4
-  Conv_4 : process (CLK, RESET)
-  begin
-    if rising_edge(CLK) then
-      if RESET = '1' then
-        proc_cnt_4      <= x"6";
-        proc_finished_4 <= '0';
-      elsif start_cnt_4_i = '1' then
-        proc_cnt_4      <= x"1";
-        proc_finished_4 <= '0';
-      elsif proc_cnt_4 = x"5" then
-        proc_cnt_4      <= proc_cnt_4 + 1;
-        proc_finished_4 <= '1';
-      elsif proc_cnt_4 = x"6" then
-        proc_cnt_4      <= x"6";
-        proc_finished_4 <= '0';
-      else
-        proc_cnt_4      <= proc_cnt_4 + 1;
-        proc_finished_4 <= '0';
-      end if;
-    end if;
-  end process Conv_4;
-
   Binary_Code_Calculation : process (CLK, RESET)
   begin
-    if rising_edge(CLK) then
-      if RESET = '1' then
-        BINARY_CODE_OUT <= (others => '0');
-        FINISHED_OUT    <= '0';
-      elsif conv_finished_i = '1' and interval_detected_i = '1' then
-        BINARY_CODE_OUT <= ('0' & binary_code_r) + ('0' & binary_code_f);
-        FINISHED_OUT    <= '1';
-      else
---        BINARY_CODE_OUT <= (others => '0');
-        FINISHED_OUT    <= '0';
-      end if;
-    end if;
+   if rising_edge(CLK) then
+     if RESET = '1' then
+       BINARY_CODE_OUT <= (others => '0');
+       FINISHED_OUT    <= '0';
+     elsif proc_finished_1 = '1' then
+       BINARY_CODE_OUT <= address_i; --'0' & interval_reg;
+       FINISHED_OUT    <= '1';
+     else
+       BINARY_CODE_OUT <= (others => '0');
+       FINISHED_OUT    <= '0';
+     end if;
+   end if;
   end process Binary_Code_Calculation;
 
-  conv_finished_i <= proc_finished_1 or proc_finished_2 or proc_finished_3 or proc_finished_4;
-
-
--------------------------------------------------------------------------------
--- DEBUG
--------------------------------------------------------------------------------
-  ----purpose : Conversion number 1
-  --Conv_1 : process (CLK, RESET)
-  --begin
-  --  if rising_edge(CLK) then
-  --    if RESET = '1' then
-  --      proc_cnt_1      <= x"3";
-  --      proc_finished_1 <= '0';
-  --    elsif START_IN = '1' then
-  --      proc_cnt_1      <= x"1";
-  --      proc_finished_1 <= '0';
-  --    elsif proc_cnt_1 = x"1" or proc_cnt_1 = x"2" then
-  --      proc_cnt_1      <= proc_cnt_1 + 1;
-  --      proc_finished_1 <= '1';
-  --    elsif proc_cnt_1 = x"3" then
-  --      proc_cnt_1      <= x"3";
-  --      proc_finished_1 <= '0';
-  --    else
-  --      proc_cnt_1      <= proc_cnt_1 + 1;
-  --      proc_finished_1 <= '0';
-  --    end if;
-  --  end if;
-  --end process Conv_1;
-
-  --Binary_Code_Calculation : process (CLK, RESET)
-  --begin
-  --  if rising_edge(CLK) then
-  --    if RESET = '1' then
-  --      BINARY_CODE_OUT <= (others => '0');
-  --      FINISHED_OUT    <= '0';
-  --    elsif proc_finished_1 = '1' then
-  --      BINARY_CODE_OUT <= address_i; --'0' & interval_reg;
-  --      FINISHED_OUT    <= '1';
-  --    else
-  --      BINARY_CODE_OUT <= (others => '0');
-  --      FINISHED_OUT    <= '0';
-  --    end if;
-  --  end if;
-  --end process Binary_Code_Calculation;
-
-  --ENCODER_DEBUG(8 downto 0) <= interval_reg;
+  ENCODER_DEBUG(8 downto 0) <= interval_reg;
 
 end behavioral;

diff --git a/wasa/trb3_periph_padiwa.vhd b/wasa/trb3_periph_padiwa.vhd
index 11e5d986930312ae40b1416015522f02d9f216be..6587ec3d203f3ff499cd57297835c76017345847 100644 (file)
--- a/wasa/trb3_periph_padiwa.vhd
+++ b/wasa/trb3_periph_padiwa.vhd
@@ -11,7 +11,7 @@ use work.version.all;
 
 entity trb3_periph_padiwa is
   generic(
-    SYNC_MODE : integer range 0 to 1 := c_YES   --use the RX clock for internal logic and transmission.
+    SYNC_MODE : integer range 0 to 1 := c_NO   --use the RX clock for internal logic and transmission.
     );
   port(
     --Clocks
@@ -324,7 +324,7 @@ begin
       USE_SLAVE   => SYNC_MODE
       )      
     port map(
-      CLK                => clk_200_i,
+      CLK                => clk_200_internal,
       SYSCLK             => clk_100_i,
       RESET              => reset_i,
       CLEAR              => clear_i,