signal rx_serdes_rst : std_logic_vector(3 downto 0);
signal rx_pcs_rst : std_logic_vector(3 downto 0);
- signal tx_pcs_rst : std_logic_vector(3 downto 0);
signal rx_los_low : std_logic_vector(3 downto 0);
signal lsm_status : std_logic_vector(3 downto 0);
-------------------------------------------------
-- SFPs are disabled on unused SerDes channels
-------------------------------------------------
--- BUG: link_tx_ready(i) for master ports to be included
-- BUG: slave ports need also disable with link_tx_ready(i)
SD_TXDIS_OUT(3) <= DESTROY_LINK_IN(3) or (not SLAVE_ACTIVE_IN) or RESET
when IS_MODE(3) = c_IS_MASTER else
MASTER_CLK_OUT <= clk_rx_full(0) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
clk_rx_full(1) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
clk_rx_full(2) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- clk_rx_full(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ clk_rx_full(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
clk_tx_full(0) when ((quad_mode = 1) and (IS_MODE(0) = c_IS_MASTER)) else
clk_tx_full(1) when ((quad_mode = 1) and (IS_MODE(1) = c_IS_MASTER)) else
clk_tx_full(2) when ((quad_mode = 1) and (IS_MODE(2) = c_IS_MASTER)) else
GLOBAL_RESET_OUT <= global_reset_i(0) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
global_reset_i(1) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
global_reset_i(2) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- global_reset_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ global_reset_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
'0';
-------------------------------------------------
tx_clk_avail_sel <= link_rx_ready_i(0) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
link_rx_ready_i(1) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
link_rx_ready_i(2) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- link_rx_ready_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ link_rx_ready_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
'1';
TX_CLK_AVAIL_OUT <= tx_clk_avail_sel;
word_sync_sel <= word_sync_i(0) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
word_sync_i(1) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
word_sync_i(2) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- word_sync_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ word_sync_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
word_sync_i(0) when ((quad_mode = 1) and (IS_MODE(0) = c_IS_MASTER)) else
word_sync_i(1) when ((quad_mode = 1) and (IS_MODE(1) = c_IS_MASTER)) else
word_sync_i(2) when ((quad_mode = 1) and (IS_MODE(2) = c_IS_MASTER)) else
RX_RST_OUT <= rx_rst_i(0) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
rx_rst_i(1) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
rx_rst_i(2) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- rx_rst_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ rx_rst_i(3) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
'0';
RX_RST_WORD_OUT <= rx_rst_word_i(0*8+7 downto 0*8) when ((quad_mode >= 8) and (IS_MODE(0) = c_IS_SLAVE)) else
rx_rst_word_i(1*8+7 downto 1*8) when ((quad_mode >= 8) and (IS_MODE(1) = c_IS_SLAVE)) else
rx_rst_word_i(2*8+7 downto 2*8) when ((quad_mode >= 8) and (IS_MODE(2) = c_IS_SLAVE)) else
- rx_rst_word_i(3*8+7 downto 3*8) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else -- HEREWEARE
+ rx_rst_word_i(3*8+7 downto 3*8) when ((quad_mode >= 8) and (IS_MODE(3) = c_IS_SLAVE)) else
x"00";
-------------------------------------------------
rx_serdes_rst_ch0_c => rx_serdes_rst(0),
sb_felb_ch0_c => '0',
sb_felb_rst_ch0_c => '0',
- tx_pcs_rst_ch0_c => tx_pcs_rst(0),
+ tx_pcs_rst_ch0_c => TX_PCS_RST_IN,
tx_pwrup_ch0_c => powerup_ch(0),
rx_pcs_rst_ch0_c => rx_pcs_rst(0),
rx_pwrup_ch0_c => powerup_ch(0),
rx_serdes_rst_ch1_c => rx_serdes_rst(1),
sb_felb_ch1_c => '0',
sb_felb_rst_ch1_c => '0',
- tx_pcs_rst_ch1_c => tx_pcs_rst(1),
+ tx_pcs_rst_ch1_c => TX_PCS_RST_IN,
tx_pwrup_ch1_c => powerup_ch(1),
rx_pcs_rst_ch1_c => rx_pcs_rst(1),
rx_pwrup_ch1_c => powerup_ch(1),
rx_serdes_rst_ch2_c => rx_serdes_rst(2),
sb_felb_ch2_c => '0',
sb_felb_rst_ch2_c => '0',
- tx_pcs_rst_ch2_c => tx_pcs_rst(2),
+ tx_pcs_rst_ch2_c => TX_PCS_RST_IN,
tx_pwrup_ch2_c => powerup_ch(2),
rx_pcs_rst_ch2_c => rx_pcs_rst(2),
rx_pwrup_ch2_c => powerup_ch(2),
rx_serdes_rst_ch3_c => rx_serdes_rst(3),
sb_felb_ch3_c => '0',
sb_felb_rst_ch3_c => '0',
- tx_pcs_rst_ch3_c => tx_pcs_rst(3),
+ tx_pcs_rst_ch3_c => TX_PCS_RST_IN,
tx_pwrup_ch3_c => powerup_ch(3),
rx_pcs_rst_ch3_c => rx_pcs_rst(3),
rx_pwrup_ch3_c => powerup_ch(3),
-- control signals to SerDes
RX_SERDES_RST => rx_serdes_rst(i),
RX_PCS_RST => rx_pcs_rst(i),
- TX_PCS_RST => tx_pcs_rst(i),
-- SerDes data streams
TX_DATA_OUT => tx_data(i*8+7 downto i*8),
TX_K_OUT => tx_k(i),