\item Doing a memory write with 18 words will do the job, should be faster than two individual accesses for data and length.
\item All data is sent MSB first (Bit 31), Bits 31-24 are the don't-care-Bits of the DAC.
\item Interface speed: e.g. 6.25 MHz -> max. 80us for 16 chips
+ \item If a chain contains only one device, up to 16 commands can be sent to this device with one access. Bit 7 in length register 0xd411 has to be set to select this multi-write to single device mode.
+ \item Register 0xd412 contains the read-back of data from SPI. Content depends on slave chip.
\end{itemize*}
\paragraph*{Configuration File}
rcrpcbind restart
\end{verbatim}
+If you have a running instance of trbnetd and want to know to which TRB3 it connects:
+\begin{verbatim}
+ cat /proc/$(pgrep -f "trbnetd")/environ | strings | grep TRB3
+\end{verbatim}
+
\subsubsection{Trbcmd server}
\begin{itemize*}
\subsubsection{Usage}
Now you are ready to use the trbcmd in the same way as it is for the normal HADES system.
+
+
\item[0040] sends triggers to optical link SFP1
\item[0080] sends slow-control to optical link SFP1
\end{description*}
-\item[Peripheral FPGA]~
+\item[Peripheral FPGA (also CBM-RICH and other derivates)]~
\begin{description*}
\item[0XXX] use with ADA adapter board AddOn version 1
\item[1XXX] use with ADA adapter board AddOn version 2
\item[X0nX] contains $2^n$ TDC channels, single edge
\item[X1nX] contains $2^n$ TDC channels, double edge
\item[X2XX] contains a network hub
+ \item[X4XX] SPI interface on AddOn connector
+ \item[X8XX] Double edge TDC realized with two single edge channels
\end{description*}
\end{description*}
\item 0x42 for a design for FPGA 2 only
\item 0x43 for a design for FPGA 3 only
\item 0x44 for a design for FPGA 4 only
+ \item 0x48 TDC design for peripheral FPGA
+ \item 0x50 CBM-Rich
\end{itemize*}
The initial address set with \signal{Regio\_Init\_Address} can be chosen from the following set:
\subsubsection{Configuration}
All configuration is done via a single-device SPI bus. The interface is kept similar to the LTC2600 to use the same SPI master code.
+Note that up to 16 commands can be sent to a board with one trbnet access: Load all commands to registers 0xd400 - 0xd40f, set the correct amount in 0xd411 plus Bit 7 to select the multi-write mode.
\begin{table}
\begin{tabularx}{\textwidth}{c|c|X}
\textbf{Bits} & \textbf{Name} & \textbf{Content} \\
\hline
31 -- 24 & Select & See table \ref{tab:spiselect}\\
-23 -- 20 & Command & Command, similar to LTC2600:\newline
-0: write\newline
-8: read\newline
-other: no operation \\
+23 -- 20 & Command & Command, 0: read, 8: write, other: no operation \\
19 -- 16 & Channel & Channel / Register select (0 -- 15)\\
15 -- 0\newline (\& following$\dagger$)& Data & 16 Bit data payload for write commands\\
\hline
0x00 & PWM & Write/read settings for PWM channels 0 - 15.\\
0x10 & UId / Temperature & read unique id. 64 Bit Id is divided in 4 16 Bit words, in registers 0 - 3. Temperature is available in register 4. (r/o)\\
-0x20 & I/O $\dagger$& Register 0 contains one bit per input. 0: enable (default), 1: disable.\newline Register 1 shows the current status of the pin.\newline Register 2 Write: Override LED status. Bit 0-3: LED in alphabetical order. Bit 4: enable override. Read: LED status. \\
-0x40 & Memory & Read/Write to/from RAM. 16 registers with 16 Bit each. (Payload is written to/sent from subsequent registers $\dagger$)\\
-0x50 & Flash $\dagger$& Write RAM content to Flash. No data payload\\
-0x51 & Flash $\dagger$& Load RAM content from Flash. No data payload\\
-0x52 & Flash $\dagger$& Load RAM content as PWM settings. No data payload\\
+0x20 & I/O & Register 0 contains one bit per input. 0: enable (default), 1: disable.\newline Register 1 shows the current status of the pin.\newline Register 2 Write: Override LED status. Bit 0-3: LED in alphabetical order. Bit 4: enable override. Read: LED status.\newline Register 3: 4 Bit to select one input to be routed to test output (SPARE\_LINE 5\&6) \\
+0x40 & Memory & Read/Write to/from RAM. 16 registers with 8 Bit each.\\
+0x50 & Flash & Execute Flash command. Bit 14-12: Command (0:read, 2:write, 4:enable flash, 5:disable flash, 7:erase, Bit 11-0: Flash page\\
+0x51 & Flash & Load RAM content to PWM settings. Channel Bit 0 selects upper or lower half of PWM channels. No data payload\\
+0x52 & Flash $\dagger$& Load RAM content from Flash. No data payload\\
\end{tabularx}
\caption{SPI component selection}
\label{tab:spiselect}
\section{Web interface}
-\subsection{CTS monitor}
-
Now in your browser open the page \verb+ctshost:1234+, where \verb+ctshost+ is
-the machine when CTS server is started.
+the machine when CTS server is started. If the CTS server is running we can also have access to configuration pages for
+different components, described in following parts.
+
+
+\begin{description}
+\item[/] Main page with links to all individual screens
+\item[cts.htm] The main control screen for all CTS functions
+\item[tdc/tdc.htm] The TDC status - input status, hit counter, status registers and control function to enable individual inputs
+\item[network/gbe.htm] The Gigabit Ethernet status information
+\item[thresh/threshold.htm] Manual setting of thresholds for CBM-Rich and Padiwa boards
+\item[padiwa/padiwa.htm] Temperature, IDs and threshold information about Padiwa front-ends
+\end{description}
+
+Note: All pages despite the CTS monitor fetch data directly from the DAQ network. Make sure that you don't read too often or from too many open browser windows at the same time.
\begin{figure}[!ht]
\centering
\includegraphics[width=1.0\textwidth]{trb3qs_img/CTS}
- \caption{Screenshoot of the CTS window. In this example the Pulser \#0 with
+ \caption{Screenshot of the CTS window. In this example the Pulser \#0 with
frequency 1~MHz is used as a trigger source.}
\end{figure}
-If the CTS server is running we can also have access to configuration pages for
-different components, described in following parts.
-
-\subsection{TDC settings}
-
-Under the address \verb+http://ctshost:1234/thresh/tdc.htm+ we can configure
-TDCs.
\begin{figure}[!ht]
\centering
\caption{TDC settings panel}
\end{figure}
-\subsection{Gigabit Ethernet settings}
-
-Under the address \verb+http://ctshost:1234/thresh/gbe.htm+ we can configure
-GbE registers.
-
\begin{figure}[!ht]
\centering
\includegraphics[width=1.0\textwidth]{trb3qs_img/GbEregs}
\caption{Gigabit Ethernet settings panel}
\end{figure}
-\subsection{Threshold for different modules}
-
-Under the address \verb+http://ctshost:1234/thresh/threshold.htm+ we can set
-threshold for different modules.
-
\begin{figure}[!ht]
\centering
\includegraphics[width=1.0\textwidth]{trb3qs_img/Threshreg}
\caption{Threshold settings panel}
\end{figure}
+
+
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