+++ /dev/null
-#!/usr/bin/perl
-use Data::Dumper;
-use warnings;
-use strict;
-
-
-
-
-###################################################################################
-#Settings for this project
-my $TOPNAME = "trb3_periph_sodaslave"; #Name of top-level entity
-my $lattice_path = '/d/jspc29/lattice/diamond/2.01';
-my $synplify_path = '/d/jspc29/lattice/synplify/F-2012.03-SP1/';
-my $lm_license_file_for_synplify = "27000\@lxcad01.gsi.de";
-#my $lm_license_file_for_par = "1702\@hadeb05.gsi.de";
-my $lm_license_file_for_par = "1710\@cronos.e12.physik.tu-muenchen.de";
-###################################################################################
-
-$ENV{'PAR_DESIGN_NAME'}=$TOPNAME;
-
-
-
-
-
-
-use FileHandle;
-
-$ENV{'SYNPLIFY'}=$synplify_path;
-$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
-
-
-
-
-my $FAMILYNAME="LatticeECP3";
-my $DEVICENAME="LFE3-150EA";
-my $PACKAGE="FPBGA672";
-my $SPEEDGRADE="8";
-
-
-#create full lpf file
-system("cp ../../trb3/base/trb3_periph_hub.lpf workdir/$TOPNAME.lpf");
-#system("cat ../tdc_releases/tdc_v1.1.1/tdc_constraints.lpf >> workdir/$TOPNAME.lpf");
-system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
-
-
-#set -e
-#set -o errexit
-
-#generate timestamp
-my $t=time;
-my $fh = new FileHandle(">version.vhd");
-die "could not open file" if (! defined $fh);
-print $fh <<EOF;
-
---## attention, automatically generated. Don't change by hand.
-library ieee;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.std_logic_ARITH.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
-use ieee.numeric_std.all;
-
-package version is
-
- constant VERSION_NUMBER_TIME : integer := $t;
-
-end package version;
-EOF
-$fh->close;
-
-system("env| grep LM_");
-my $r = "";
-
-my $c="$synplify_path/bin/synplify_premier_dp -batch $TOPNAME.prj";
-$r=execute($c, "do_not_exit" );
-
-
-chdir "workdir";
-$fh = new FileHandle("<$TOPNAME".".srr");
-my @a = <$fh>;
-$fh -> close;
-
-
-
-foreach (@a)
-{
- if(/\@E:/)
- {
- print "\n";
- $c="cat $TOPNAME.srr | grep \"\@E\"";
- system($c);
- print "\n\n";
- exit 129;
- }
-}
-
-
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
-
-
-$c=qq| $lattice_path/ispfpga/bin/lin/edif2ngd -path "../" -path "." -l $FAMILYNAME -d $DEVICENAME "$TOPNAME.edf" "$TOPNAME.ngo" |;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/edfupdate -t "$TOPNAME.tcy" -w "$TOPNAME.ngo" -m "$TOPNAME.ngo" "$TOPNAME.ngx"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/ngdbuild -a $FAMILYNAME -d $DEVICENAME -p "$lattice_path/ispfpga/ep5c00/data" -dt "$TOPNAME.ngo" "$TOPNAME.ngd"|;
-execute($c);
-
-my $tpmap = $TOPNAME . "_map" ;
-
-$c=qq|$lattice_path/ispfpga/bin/lin/map -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -pr "$TOPNAME.prf" -o "$tpmap.ncd" -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
-execute($c);
-
-system("rm $TOPNAME.ncd");
-
-
-$c=qq|$lattice_path/ispfpga/bin/lin/multipar -pr "$TOPNAME.prf" -o "mpar_$TOPNAME.rpt" -log "mpar_$TOPNAME.log" -p "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd"|;
-#$c=qq|$lattice_path/ispfpga/bin/lin/par -f "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-# IOR IO Timing Report
-# $c=qq|$lattice_path/ispfpga/bin/lin/iotiming -s "$TOPNAME.ncd" "$TOPNAME.prf"|;
-# execute($c);
-
-# TWR Timing Report
-$c=qq|$lattice_path/ispfpga/bin/lin/trce -c -v 15 -o "$TOPNAME.twr.setup" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/trce -hld -c -v 5 -o "$TOPNAME.twr.hold" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/ltxt2ptxt $TOPNAME.ncd|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w -g CfgMode:Disable -g RamCfg:Reset -g ES:No $TOPNAME.ncd $TOPNAME.bit $TOPNAME.prf|;
-# $c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-chdir "..";
-
-exit;
-
-sub execute {
- my ($c, $op) = @_;
- #print "option: $op \n";
- $op = "" if(!$op);
- print "\n\ncommand to execute: $c \n";
- $r=system($c);
- if($r) {
- print "$!";
- if($op ne "do_not_exit") {
- exit;
- }
- }
-
- return $r;
-
-}
--- /dev/null
+#!/bin/sh -x
+cd /usr/local/diamond/2.1_x64/bin/lin64
+export bindir=`pwd`
+
+#export bindirs=/usr/local/diamond/2.1_x64/bin/lin64
+. /usr/local/diamond/2.1_x64/bin/lin64/diamond_env
+
+cd /local/lemmens/lattice/soda/soda_source
+exec ./compile_periph_kvi.pl
+++ /dev/null
-#!/usr/bin/perl
-use Data::Dumper;
-use warnings;
-use strict;
-
-
-
-
-###################################################################################
-#Settings for this project
-my $TOPNAME = "trb3_periph_sodasource"; #Name of top-level entity
-my $lattice_path = '/d/jspc29/lattice/diamond/2.01';
-my $synplify_path = '/d/jspc29/lattice/synplify/F-2012.03-SP1/';
-my $lm_license_file_for_synplify = "27000\@lxcad01.gsi.de";
-#my $lm_license_file_for_par = "1702\@hadeb05.gsi.de";
-my $lm_license_file_for_par = "1710\@cronos.e12.physik.tu-muenchen.de";
-###################################################################################
-
-$ENV{'PAR_DESIGN_NAME'}=$TOPNAME;
-
-
-
-
-
-
-use FileHandle;
-
-$ENV{'SYNPLIFY'}=$synplify_path;
-$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
-
-
-
-
-my $FAMILYNAME="LatticeECP3";
-my $DEVICENAME="LFE3-150EA";
-my $PACKAGE="FPBGA672";
-my $SPEEDGRADE="8";
-
-
-#create full lpf file
-system("cp ../../trb3/base/trb3_periph_hub.lpf workdir/$TOPNAME.lpf");
-#system("cat ../tdc_releases/tdc_v1.1.1/tdc_constraints.lpf >> workdir/$TOPNAME.lpf");
-system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
-
-
-#set -e
-#set -o errexit
-
-#generate timestamp
-my $t=time;
-my $fh = new FileHandle(">version.vhd");
-die "could not open file" if (! defined $fh);
-print $fh <<EOF;
-
---## attention, automatically generated. Don't change by hand.
-library ieee;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.std_logic_ARITH.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
-use ieee.numeric_std.all;
-
-package version is
-
- constant VERSION_NUMBER_TIME : integer := $t;
-
-end package version;
-EOF
-$fh->close;
-
-system("env| grep LM_");
-my $r = "";
-
-my $c="$synplify_path/bin/synplify_premier_dp -batch $TOPNAME.prj";
-$r=execute($c, "do_not_exit" );
-
-
-chdir "workdir";
-$fh = new FileHandle("<$TOPNAME".".srr");
-my @a = <$fh>;
-$fh -> close;
-
-
-
-foreach (@a)
-{
- if(/\@E:/)
- {
- print "\n";
- $c="cat $TOPNAME.srr | grep \"\@E\"";
- system($c);
- print "\n\n";
- exit 129;
- }
-}
-
-
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
-
-
-$c=qq| $lattice_path/ispfpga/bin/lin/edif2ngd -path "../" -path "." -l $FAMILYNAME -d $DEVICENAME "$TOPNAME.edf" "$TOPNAME.ngo" |;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/edfupdate -t "$TOPNAME.tcy" -w "$TOPNAME.ngo" -m "$TOPNAME.ngo" "$TOPNAME.ngx"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/ngdbuild -a $FAMILYNAME -d $DEVICENAME -p "$lattice_path/ispfpga/ep5c00/data" -dt "$TOPNAME.ngo" "$TOPNAME.ngd"|;
-execute($c);
-
-my $tpmap = $TOPNAME . "_map" ;
-
-$c=qq|$lattice_path/ispfpga/bin/lin/map -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -pr "$TOPNAME.prf" -o "$tpmap.ncd" -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
-execute($c);
-
-system("rm $TOPNAME.ncd");
-
-
-$c=qq|$lattice_path/ispfpga/bin/lin/multipar -pr "$TOPNAME.prf" -o "mpar_$TOPNAME.rpt" -log "mpar_$TOPNAME.log" -p "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd"|;
-#$c=qq|$lattice_path/ispfpga/bin/lin/par -f "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-# IOR IO Timing Report
-# $c=qq|$lattice_path/ispfpga/bin/lin/iotiming -s "$TOPNAME.ncd" "$TOPNAME.prf"|;
-# execute($c);
-
-# TWR Timing Report
-$c=qq|$lattice_path/ispfpga/bin/lin/trce -c -v 15 -o "$TOPNAME.twr.setup" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/trce -hld -c -v 5 -o "$TOPNAME.twr.hold" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/ltxt2ptxt $TOPNAME.ncd|;
-execute($c);
-
-$c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w -g CfgMode:Disable -g RamCfg:Reset -g ES:No $TOPNAME.ncd $TOPNAME.bit $TOPNAME.prf|;
-# $c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w "$TOPNAME.ncd" "$TOPNAME.prf"|;
-execute($c);
-
-chdir "..";
-
-exit;
-
-sub execute {
- my ($c, $op) = @_;
- #print "option: $op \n";
- $op = "" if(!$op);
- print "\n\ncommand to execute: $c \n";
- $r=system($c);
- if($r) {
- print "$!";
- if($op ne "do_not_exit") {
- exit;
- }
- }
-
- return $r;
-
-}
--- /dev/null
+#!/usr/bin/perl -W
+use Data::Dumper;
+use warnings;
+use strict;
+
+
+
+
+###################################################################################
+#Settings for this project
+my $TOPNAME = "trb3_periph_sodasource"; #Name of top-level entity
+my $PRJNAME = "soda_source"; #Name of the project
+my $lattice_path = '/usr/local/diamond/2.1_x64';
+my $synplify_path = '/usr/local/diamond/2.1_x64';
+my $lm_license_file_for_synplify = "27031\@kvivs17.kvi.nl";
+#my $lm_license_file_for_par = "1702\@hadeb05.gsi.de";
+my $lm_license_file_for_par = "27031\@kvivs17.kvi.nl";
+###################################################################################
+
+
+use FileHandle;
+
+$ENV{'SYNPLIFY'}=$synplify_path;
+$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
+$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
+
+
+my $FAMILYNAME="LatticeECP3";
+my $DEVICENAME="LFE3-150EA";
+my $PACKAGE="FPBGA672";
+my $SPEEDGRADE="8";
+
+
+#create full lpf file
+system("cp ../../trb3/base/trb3_periph_hub.lpf workdir/$TOPNAME.lpf");
+system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
+
+
+#set -e
+#set -o errexit
+
+#generate timestamp
+my $t=time;
+my $fh = new FileHandle(">version.vhd");
+die "could not open file" if (! defined $fh);
+print $fh <<EOF;
+
+--## attention, automatically generated. Don't change by hand.
+library ieee;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.std_logic_ARITH.ALL;
+USE IEEE.std_logic_UNSIGNED.ALL;
+use ieee.numeric_std.all;
+
+package version is
+
+ constant VERSION_NUMBER_TIME : integer := $t;
+
+end package version;
+EOF
+$fh->close;
+
+system("env| grep LM_");
+my $r = "";
+
+## timestamp to remember compiletime
+my $c="$synplify_path/bin/lin64/synpwrap -prj $PRJNAME"."_syn.prj"; ##$TOPNAME.prj";
+$r=execute($c, "do_not_exit" );
+
+
+chdir "workdir";
+##$fh = new FileHandle("<$TOPNAME".".srr");
+$fh = new FileHandle("../$PRJNAME".".srr");
+my @a = <$fh>;
+$fh -> close;
+
+
+
+foreach (@a)
+{
+ if(/\@E:/)
+ {
+ print "\n";
+ $c="cat $PRJNAME.srr | grep \"\@E\"";
+ system($c);
+ print "\n\n";
+ exit 129;
+ }
+}
+
+
+$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
+
+
+$c=qq| $lattice_path/ispfpga/bin/lin64/edif2ngd -path "../" -path "." -l $FAMILYNAME -d $DEVICENAME "../$PRJNAME.edn" "$PRJNAME.ngo" |;
+execute($c);
+
+$c=qq|$lattice_path/ispfpga/bin/lin64/edfupdate -t "$PRJNAME.tcy" -w "$PRJNAME.ngo" -m "$PRJNAME.ngo" "$PRJNAME.ngx"|;
+execute($c);
+
+$c=qq|$lattice_path/ispfpga/bin/lin64/ngdbuild -a $FAMILYNAME -d $DEVICENAME -p "$lattice_path/ispfpga/ep5c00/data" -dt "$PRJNAME.ngo" "$PRJNAME.ngd"|;
+execute($c);
+
+my $tpmap = $TOPNAME . "_map" ;
+
+system("mv $TOPNAME.ncd guidefile.ncd");
+# $c=qq|$lattice_path/ispfpga/bin/lin/map -g guidefile.ncd -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -pr "$TOPNAME.prf" -o "$tpmap.ncd" -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
+$c=qq|$lattice_path/ispfpga/bin/lin64/map -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -pr "$TOPNAME.prf" -o "$tpmap.ncd" -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
+execute($c);
+
+
+#$c=qq|$lattice_path/ispfpga/bin/lin/multipar -pr "$TOPNAME.prf" -o "mpar_$TOPNAME.rpt" -log "mpar_$TOPNAME.log" -p "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd"|;
+$c=qq|$lattice_path/ispfpga/bin/lin64/par -f "../$TOPNAME.p2t" "$tpmap.ncd" "$TOPNAME.ncd" "$TOPNAME.prf"|;
+execute($c);
+
+# IOR IO Timing Report
+$c=qq|$lattice_path/ispfpga/bin/lin64/iotiming -s "$TOPNAME.ncd" "$TOPNAME.prf"|;
+#execute($c);
+
+# TWR Timing Report
+$c=qq|$lattice_path/ispfpga/bin/lin64/trce -c -v 15 -o "$TOPNAME.twr.setup" "$TOPNAME.ncd" "$TOPNAME.prf"|;
+execute($c);
+
+$c=qq|$lattice_path/ispfpga/bin/lin64/trce -hld -c -v 5 -o "$TOPNAME.twr.hold" "$TOPNAME.ncd" "$TOPNAME.prf"|;
+execute($c);
+
+$c=qq|$lattice_path/ispfpga/bin/lin64/ltxt2ptxt $TOPNAME.ncd|;
+execute($c);
+
+$c=qq|$lattice_path/ispfpga/bin/lin64/bitgen -w -g CfgMode:Disable -g RamCfg:Reset -g ES:No $TOPNAME.ncd $TOPNAME.bit $TOPNAME.prf|;
+# $c=qq|$lattice_path/ispfpga/bin/lin/bitgen -w "$TOPNAME.ncd" "$TOPNAME.prf"|;
+execute($c);
+
+chdir "..";
+
+exit;
+
+sub execute {
+ my ($c, $op) = @_;
+ #print "option: $op \n";
+ $op = "" if(!$op);
+ print "\n\ncommand to execute: $c \n";
+ $r=system($c);
+ if($r) {
+ print "$!";
+ if($op ne "do_not_exit") {
+ exit;
+ }
+ }
+
+ return $r;
+
+}
--- /dev/null
+#-- Synopsys, Inc.
+#-- Version G-2012.09L-1
+#-- Project file /local/lemmens/lattice/soda/soda_source/soda_source_syn.prj
+#-- Written on Thu Apr 25 11:58:16 2013
+
+
+#project files
+add_file -vhdl -lib work "/usr/local/diamond/2.1_x64/cae_library/synthesis/vhdl/ecp3.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/version.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/soda_components.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/soda_d8crc8.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/soda_packet_builder.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/soda_packet_handler.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/soda_superburst_gen.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_components.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_term_buf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_CRC.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_CRC8.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_onewire.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trb3/base/trb3_components.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trb3/base/cores/pll_in200_out100.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/handler_lvl1.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/handler_data.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/handler_ipu.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/handler_trigger_and_data.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/trb_net_reset_handler.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/spi_slim.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/ecp3_sfp/serdes_sync_0.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/spi_master.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/spi_databus_memory.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/special/spi_ltc2600.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/rom_16x8.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/ram.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/pulse_sync.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/state_sync.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/ram_16x8_dp.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/ram_16x16_dp.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/ram_dp.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/signal_sync.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/ram_dp_rw.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/basics/pulse_stretch.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_std.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_addresses.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_term.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_sbuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_sbuf5.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_sbuf6.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_sbuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_regIO.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_regio_bus_handler.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_priority_encoder.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_dummy_fifo.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_dummy_fifo.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_term_ibuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_priority_arbiter.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net_pattern_gen.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_obuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_obuf_nodata.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_ibuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_api_base.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_iobuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_io_multiplexer.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_ipudata.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_trigger.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_endpoint_hades_full.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_endpoint_hades_full_handler.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/lattice_ecp3_fifo_16bit_dualport.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/trb_net_fifo_16bit_bram_dualport.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x256_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x512_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x1k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x2k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x4k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x8k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x16k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_36x32k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_18x256_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_18x512_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_18x1k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_18x2k_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/fifo/fifo_19x16_obuf.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp2m/fifo/fifo_var_oreg.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/lattice_ecp3_fifo_16x16_dualport.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/lattice/ecp3/spi_dpram_32_to_8.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/ecp3_sfp/sfp_1_125_int.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/trb_net16_lsm_sfp.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/ecp3_sfp/sfp_1_200_int.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/sync/med_sync_define.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/sync/rx_control.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/sync/rx_reset_fsm.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/sync/tx_control.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/sync/tx_reset_fsm.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_hub_base.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/trb_net16_hub_func.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/trb_net16_med_ecp3_sfp.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/trbnet/media_interfaces/med_ecp3_sfp_sync.vhd"
+add_file -vhdl -lib work "/local/lemmens/lattice/soda/source/trb3_periph_sodasource.vhd"
+
+
+#implementation: "soda_source"
+impl -add soda_source -type fpga
+
+#
+#implementation attributes
+
+set_option -vlog_std v2001
+set_option -project_relative_includes 1
+
+#device options
+set_option -technology LATTICE-ECP3
+set_option -part LFE3_150EA
+set_option -package FN672C
+set_option -speed_grade -8
+set_option -part_companion ""
+
+#compilation/mapping options
+set_option -top_module "trb3_periph_sodasource"
+
+# mapper_options
+set_option -frequency auto
+set_option -write_verilog 0
+set_option -write_vhdl 0
+set_option -srs_instrumentation 1
+
+# Lattice XP
+set_option -maxfan 1000
+set_option -disable_io_insertion 0
+set_option -retiming 0
+set_option -pipe 1
+set_option -forcegsr false
+set_option -fix_gated_and_generated_clocks 1
+set_option -RWCheckOnRam 1
+set_option -update_models_cp 0
+set_option -syn_edif_array_rename 1
+
+# sequential_optimization_options
+set_option -symbolic_fsm_compiler 1
+
+# Compiler Options
+set_option -compiler_compatible 0
+set_option -resource_sharing 1
+set_option -multi_file_compilation_unit 1
+
+#automatic place and route (vendor) options
+set_option -write_apr_constraint 1
+
+#set result format/file last
+project -result_file "./soda_source.edi"
+impl -active "soda_source"
+++ /dev/null
-
-# implementation: "workdir"
-impl -add workdir -type fpga
-
-# device options
-set_option -technology LATTICE-ECP3
-set_option -part LFE3_150EA
-set_option -package FN672C
-set_option -speed_grade -8
-set_option -part_companion ""
-
-# compilation/mapping options
-set_option -default_enum_encoding sequential
-set_option -symbolic_fsm_compiler 1
-set_option -top_module "trb3_periph_sodasource"
-set_option -resource_sharing true
-
-# map options
-set_option -frequency 200
-set_option -fanout_limit 100
-set_option -disable_io_insertion 0
-set_option -retiming 0
-set_option -pipe 0
-#set_option -force_gsr
-set_option -force_gsr false
-set_option -fixgatedclocks false #3
-set_option -fixgeneratedclocks false #3
-set_option -compiler_compatible true
-
-
-# simulation options
-set_option -write_verilog 0
-set_option -write_vhdl 1
-
-# automatic place and route (vendor) options
-set_option -write_apr_constraint 0
-
-# set result format/file last
-project -result_format "edif"
-project -result_file "workdir/trb3_periph_sodasource.edf"
-
-#implementation attributes
-
-set_option -vlog_std v2001
-set_option -project_relative_includes 1
-impl -active "workdir"
-
-####################
-
-
-
-#add_file options
-
-add_file -vhdl -lib work "version.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd"
-add_file -vhdl -lib "work" "../../trb3/base/trb3_components.vhd"
-
-add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_CRC.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_CRC8.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_onewire.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/rom_16x8.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/pulse_sync.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/state_sync.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_16x8_dp.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_16x16_dp.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_addresses.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_dp.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_term.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_sbuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_sbuf5.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_sbuf6.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_sbuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_regIO.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_priority_encoder.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_dummy_fifo.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_dummy_fifo.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_term_ibuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_priority_arbiter.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net_pattern_gen.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_obuf_nodata.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_obuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_ibuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_api_base.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_iobuf.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_io_multiplexer.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_trigger.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/signal_sync.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
-add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_hub_func.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_hub_base.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_hub_logic.vhd"
-
-
-add_file -vhdl -lib work "../../trbnet/special/handler_lvl1.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_data.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_ipu.vhd"
-add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
-add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
-add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload.vhd"
-
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_16bit_dualport.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net_fifo_16bit_bram_dualport.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x256_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x512_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x1k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x2k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x4k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x8k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x16k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_36x32k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_18x256_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_18x512_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_18x1k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_18x2k_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp2m/fifo/fifo_var_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/fifo/fifo_19x16_obuf.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_16x16_dualport.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd"
-add_file -vhdl -lib work "../../trbnet/lattice/ecp3/spi_dpram_32_to_8.vhd"
-
-add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_master.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
-add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
-add_file -vhdl -lib work "../../trbnet/optical_link/f_divider.vhd"
-
-
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/med_sync_define.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/rx_control.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/tx_control.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/rx_reset_fsm.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/sync/tx_reset_fsm.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/serdes_sync_0.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp3_sfp_sync.vhd"
-
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_1_200_int.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp3_sfp/sfp_1_125_int.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_lsm_sfp.vhd"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp.vhd"
-
-add_file -vhdl -lib "work" "../../trb3/base/cores/pll_in200_out100.vhd"
-
-
-
-add_file -vhdl -lib "work" "trb3_periph_sodasource.vhd"
-
use work.trb_net_std.all;
use work.trb_net_components.all;
use work.trb_net16_hub_func.all;
-use work.trb3_components.all;
+use work.trb3_components.all;
+use work.soda_components.all;
use work.med_sync_define.all;
use work.version.all;
signal spimem_unknown_addr_out : std_logic;
signal spimem_write_ack_out : std_logic;
- --media interface
signal sci1_ack : std_logic;
signal sci1_write : std_logic;
signal sci1_read : std_logic;
signal sci2_data_out : std_logic_vector(7 downto 0);
signal sci2_addr : std_logic_vector(8 downto 0);
-
--TDC
signal hit_in_i : std_logic_vector(63 downto 0);
signal rx_dlm_i : std_logic;
signal tx_dlm_word : std_logic_vector(7 downto 0);
signal rx_dlm_word : std_logic_vector(7 downto 0);
-
+\r
+ --SODA
+ signal rst_S : std_logic;
+ signal clk_S : std_logic;
+ signal enable_S : std_logic := '0';
+ signal soda_cmd_word_S : std_logic_vector(31 downto 0) := (others => '0');
+ signal soda_cmd_strobe_S : std_logic := '0';
+ signal SOS_S : std_logic := '0';
+ signal super_burst_nr_S : std_logic_vector(30 downto 0) := (others => '0'); -- from super-burst-nr-generator
+ signal SOB_S : std_logic := '0';
+ signal dlm_word_S : std_logic_vector(7 downto 0) := (others => '0');
+ signal dlm_valid_S : std_logic;
begin
---------------------------------------------------------------------------
-- Reset Generation
CTRL_DEBUG => (others => '0')
);
+
+---------------------------------------------------------------------------
+-- Endpoint
+---------------------------------------------------------------------------
+-- THE_ENDPOINT : trb_net16_endpoint_hades_full_handler
+-- generic map(
+-- REGIO_NUM_STAT_REGS => REGIO_NUM_STAT_REGS, --4, --16 stat reg
+-- REGIO_NUM_CTRL_REGS => REGIO_NUM_CTRL_REGS, --3, --8 cotrol reg
+-- ADDRESS_MASK => x"FFFF",
+-- BROADCAST_BITMASK => x"FF",
+-- BROADCAST_SPECIAL_ADDR => x"45",
+-- REGIO_COMPILE_TIME => std_logic_vector(to_unsigned(VERSION_NUMBER_TIME, 32)),
+-- REGIO_HARDWARE_VERSION => x"91000000",
+-- REGIO_INIT_ADDRESS => x"f306",
+-- REGIO_USE_VAR_ENDPOINT_ID => c_YES,
+-- CLOCK_FREQUENCY => 100,
+-- TIMING_TRIGGER_RAW => c_YES,
+-- --Configure data handler
+-- DATA_INTERFACE_NUMBER => 1,
+-- DATA_BUFFER_DEPTH => 9, --13
+-- DATA_BUFFER_WIDTH => 32,
+-- DATA_BUFFER_FULL_THRESH => 256,
+-- TRG_RELEASE_AFTER_DATA => c_YES,
+-- HEADER_BUFFER_DEPTH => 9,
+-- HEADER_BUFFER_FULL_THRESH => 256
+-- )
+-- port map(
+-- CLK => clk_sys_i,
+-- RESET => reset_i,
+-- CLK_EN => '1',
+-- MED_DATAREADY_OUT => med_dataready_out,
+-- MED_DATA_OUT => med_data_out,
+-- MED_PACKET_NUM_OUT => med_packet_num_out,
+-- MED_READ_IN => med_read_in,
+-- MED_DATAREADY_IN => med_dataready_in,
+-- MED_DATA_IN => med_data_in,
+-- MED_PACKET_NUM_IN => med_packet_num_in,
+-- MED_READ_OUT => med_read_out,
+-- MED_STAT_OP_IN => med_stat_op,
+-- MED_CTRL_OP_OUT => med_ctrl_op,
+--
+-- --Timing trigger in
+-- TRG_TIMING_TRG_RECEIVED_IN => '0',
+-- --LVL1 trigger to FEE
+-- LVL1_TRG_DATA_VALID_OUT => open,
+-- LVL1_VALID_TIMING_TRG_OUT => open,
+-- LVL1_VALID_NOTIMING_TRG_OUT => open,
+-- LVL1_INVALID_TRG_OUT => open,
+--
+-- LVL1_TRG_TYPE_OUT => open,
+-- LVL1_TRG_NUMBER_OUT => open,
+-- LVL1_TRG_CODE_OUT => open,
+-- LVL1_TRG_INFORMATION_OUT => open,
+-- LVL1_INT_TRG_NUMBER_OUT => open,
+--
+-- --Information about trigger handler errors
+-- TRG_MULTIPLE_TRG_OUT => open,
+-- TRG_TIMEOUT_DETECTED_OUT => open,
+-- TRG_SPURIOUS_TRG_OUT => open,
+-- TRG_MISSING_TMG_TRG_OUT => open,
+-- TRG_SPIKE_DETECTED_OUT => open,
+--
+-- --Response from FEE
+-- FEE_TRG_RELEASE_IN(0) => '1',
+-- FEE_TRG_STATUSBITS_IN => (others => '0'),
+-- FEE_DATA_IN => (others => '0'),
+-- FEE_DATA_WRITE_IN(0) => '0',
+-- FEE_DATA_FINISHED_IN(0) => '1',
+-- FEE_DATA_ALMOST_FULL_OUT(0) => open,
+--
+-- -- Slow Control Data Port
+-- REGIO_COMMON_STAT_REG_IN => common_stat_reg, --0x00
+-- REGIO_COMMON_CTRL_REG_OUT => common_ctrl_reg, --0x20
+-- REGIO_COMMON_STAT_STROBE_OUT => common_stat_reg_strobe,
+-- REGIO_COMMON_CTRL_STROBE_OUT => common_ctrl_reg_strobe,
+-- REGIO_STAT_REG_IN => stat_reg, --start 0x80
+-- REGIO_CTRL_REG_OUT => ctrl_reg, --start 0xc0
+-- REGIO_STAT_STROBE_OUT => stat_reg_strobe,
+-- REGIO_CTRL_STROBE_OUT => ctrl_reg_strobe,
+-- REGIO_VAR_ENDPOINT_ID(1 downto 0) => CODE_LINE,
+-- REGIO_VAR_ENDPOINT_ID(15 downto 2) => (others => '0'),
+--
+-- BUS_ADDR_OUT => regio_addr_out,
+-- BUS_READ_ENABLE_OUT => regio_read_enable_out,
+-- BUS_WRITE_ENABLE_OUT => regio_write_enable_out,
+-- BUS_DATA_OUT => regio_data_out,
+-- BUS_DATA_IN => regio_data_in,
+-- BUS_DATAREADY_IN => regio_dataready_in,
+-- BUS_NO_MORE_DATA_IN => regio_no_more_data_in,
+-- BUS_WRITE_ACK_IN => regio_write_ack_in,
+-- BUS_UNKNOWN_ADDR_IN => regio_unknown_addr_in,
+-- BUS_TIMEOUT_OUT => regio_timeout_out,
+-- ONEWIRE_INOUT => TEMPSENS,
+-- ONEWIRE_MONITOR_OUT => open,
+--
+-- TIME_GLOBAL_OUT => global_time,
+-- TIME_LOCAL_OUT => local_time,
+-- TIME_SINCE_LAST_TRG_OUT => time_since_last_trg,
+-- TIME_TICKS_OUT => timer_ticks,
+--
+-- STAT_DEBUG_IPU => open,
+-- STAT_DEBUG_1 => open,
+-- STAT_DEBUG_2 => open,
+-- STAT_DEBUG_DATA_HANDLER_OUT => open,
+-- STAT_DEBUG_IPU_HANDLER_OUT => open,
+-- STAT_TRIGGER_OUT => open,
+-- CTRL_MPLEX => (others => '0'),
+-- IOBUF_CTRL_GEN => (others => '0'),
+-- STAT_ONEWIRE => open,
+-- STAT_ADDR_DEBUG => open,
+-- DEBUG_LVL1_HANDLER_OUT => open
+-- );
+
+
---------------------------------------------------------------------------
--- Hub
+-- Hub
---------------------------------------------------------------------------
THE_HUB : trb_net16_hub_base
INT_NUMBER => 0,
USE_ONEWIRE => c_YES,
COMPILE_TIME => std_logic_vector(to_unsigned(VERSION_NUMBER_TIME,32)),
+-- COMPILE_TIME => VERSION_NUMBER_TIME,
HARDWARE_VERSION => x"91003200",
INIT_ENDPOINT_ID => x"0000",
INIT_ADDRESS => x"F355",
BUS_DATA_IN(1*32+7 downto 1*32) => sci1_data_out,
BUS_DATAREADY_IN(1) => sci1_ack,
BUS_WRITE_ACK_IN(1) => sci1_ack,
- BUS_NO_MORE_DATA_IN(1) => '0',
+ BUS_NO_MORE_DATA_IN(1) => '0',
BUS_UNKNOWN_ADDR_IN(1) => '0',
--SCI soda test Media Interface
BUS_READ_ENABLE_OUT(2) => sci2_read,
BUS_DATAREADY_IN(2) => sci2_ack,
BUS_WRITE_ACK_IN(2) => sci2_ack,
BUS_NO_MORE_DATA_IN(2) => '0',
- BUS_UNKNOWN_ADDR_IN(2) => sci2_nack,
+ BUS_UNKNOWN_ADDR_IN(2) => sci2_nack,
STAT_DEBUG => open
);
-
-
---------------------------------------------------------------------------
--- SPI / Flash
+-- SPI / Flash
---------------------------------------------------------------------------
THE_SPI_RELOAD : entity work.spi_flash_and_fpga_reload
-- The synchronous interface for Soda tests
---------------------------------------------------------------------------
-THE_SODA_SOURCE : med_ecp3_sfp_sync
+THE_SODA_SOURCE : entity work.med_ecp3_sfp_sync
generic map(
SERDES_NUM => 0, --number of serdes in quad
IS_SYNC_SLAVE => c_NO
SD_REFCLK_N_IN => '0',
SD_PRSNT_N_IN => SFP_MOD0(1),
SD_LOS_IN => SFP_LOS(1),
- SD_TXDIS_OUT => open,
+ SD_TXDIS_OUT => SFP_TXDIS(1),
SCI_DATA_IN => sci2_data_in,
SCI_DATA_OUT => sci2_data_out,
-- Status and control port
STAT_OP => med_stat_op(31 downto 16),
CTRL_OP => med_ctrl_op(31 downto 16),
- STAT_DEBUG => med_stat_debug(127 downto 64),
+ STAT_DEBUG => open,
CTRL_DEBUG => (others => '0')
);
- SFP_TXDIS(1) <= reset_i;
---------------------------------------------------------------------------
-- The Soda Source
---------------------------------------------------------------------------
tx_dlm_i <= '0';
- tx_dlm_word <= x"00";
-
+ tx_dlm_word <= x"00";\r
+
+ \r
+ superburst_gen : super_burst_generator
+ generic map(BURST_COUNT => 16)
+ port map(
+ SYSCLK => clk_sys_i, --clk_S,
+ RESET => reset_i, --rst_S,
+ CLEAR => '0',
+ CLK_EN => '0',
+ --Internal Connection
+ SODA_BURST_PULSE_IN => SOB_S,
+ START_OF_SUPERBURST => SOS_S,
+ SUPER_BURST_NR_OUT => super_burst_nr_S
+ );
+
+ packet_builder : soda_packet_builder
+ port map(
+ SYSCLK => clk_sys_i, --clk_S,
+ RESET => reset_i, --rst_S,
+ CLEAR => '0',
+ CLK_EN => '0',
+ --Internal Connection
+ SODA_CMD_STROBE_IN => soda_cmd_strobe_S,
+ START_OF_SUPERBURST => SOS_S,
+ SUPER_BURST_NR_IN => super_burst_nr_S,
+ SODA_CMD_WORD_IN => soda_cmd_word_S,
+ TX_DLM_OUT => dlm_valid_S,
+ TX_DLM_WORD_OUT => dlm_word_S
+
+ );
---------------------------------------------------------------------------
-- LED
LED_GREEN <= not med_stat_op(9);
LED_RED <= not (med_stat_op(10) or med_stat_op(11));
- LED_LINKOK(1) <= not med_stat_op(16+9); --link established
- LED_TX(1) <= not (med_stat_op(16+10) or med_stat_op(16+11)); --data RX or TX
- LED_RX(1) <= not med_stat_op(16+12); --DLM RX
-
- LED_LINKOK(6 downto 2) <= "11111";
- LED_TX(6 downto 2) <= "11111";
- LED_RX(6 downto 2) <= "11111";
-
-
-
---------------------------------------------------------------------------
-- Test Connector
---------------------------------------------------------------------------
- TEST_LINE(15 downto 0) <= med_stat_debug(79 downto 64);
-
+-- TEST_LINE(15 downto 0) <= (others => '0');
---------------------------------------------------------------------------
-- Test Circuits
---------------------------------------------------------------------------
--- /dev/null
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;\r
+
+library work;
+use work.trb_net_std.all;\r
+use work.trb_net_components.all;
+use work.trb_net16_hub_func.all; \r
+
+package soda_components is
+
+
+ component super_burst_generator
+ generic(
+ BURST_COUNT : integer range 1 to 64 := 16 -- number of bursts to be counted between super-bursts
+ );
+ port(
+ SYSCLK : in std_logic; -- fabric clock
+ RESET : in std_logic; -- synchronous reset
+ CLEAR : in std_logic; -- asynchronous reset
+ CLK_EN : in std_logic;
+ --Internal Connection
+ SODA_BURST_PULSE_IN : in std_logic := '0'; --
+ START_OF_SUPERBURST : out std_logic := '0';
+ SUPER_BURST_NR_OUT : out std_logic_vector(30 downto 0) := (others => '0')
+ );
+ end component;
+
+ component soda_packet_builder
+ port(
+ SYSCLK : in std_logic; -- fabric clock
+ RESET : in std_logic; -- synchronous reset
+ CLEAR : in std_logic; -- asynchronous reset
+ CLK_EN : in std_logic;
+ --Internal Connection
+ SODA_CMD_STROBE_IN : in std_logic := '0'; --
+ START_OF_SUPERBURST : in std_logic := '0';
+ SUPER_BURST_NR_IN : in std_logic_vector(30 downto 0) := (others => '0');
+ SODA_CMD_WORD_IN : in std_logic_vector(31 downto 0) := (others => '0'); --REGIO_CTRL_REG in trbnet handler is 32 bit
+ TX_DLM_OUT : out std_logic := '0'; --
+ TX_DLM_WORD_OUT : out std_logic_vector(7 downto 0) := (others => '0')
+ );
+ end component;
+
+ component soda_packet_handler
+ port(
+ SYSCLK : in std_logic; -- fabric clock
+ RESET : in std_logic; -- synchronous reset
+ CLEAR : in std_logic; -- asynchronous reset
+ CLK_EN : in std_logic;
+ --Internal Connection
+ RX_DLM_WORD_IN : in std_logic_vector(7 downto 0) := (others => '0');
+ RX_DLM_IN : in std_logic
+ );
+ end component;
+\r
+ component soda_d8crc8 -- crc-calculator/checker
+ port(
+ clock : in std_logic;
+ reset : in std_logic;
+ soc : in std_logic;
+ data : in std_logic_vector(7 downto 0);
+ data_valid : in std_logic;
+ eoc : in std_logic;
+ crc : out std_logic_vector(7 downto 0);\r
+ crc_valid : out std_logic
+ );
+ end component;\r
+ \r
+component spi_flash_and_fpga_reload
+ port(
+ CLK_IN : in std_logic;
+ RESET_IN : in std_logic;
+
+ BUS_ADDR_IN : in std_logic_vector(8 downto 0);
+ BUS_READ_IN : in std_logic;
+ BUS_WRITE_IN : in std_logic;
+ BUS_DATAREADY_OUT : out std_logic;
+ BUS_WRITE_ACK_OUT : out std_logic;
+ BUS_UNKNOWN_ADDR_OUT : out std_logic;
+ BUS_NO_MORE_DATA_OUT : out std_logic;
+ BUS_DATA_IN : in std_logic_vector(31 downto 0);
+ BUS_DATA_OUT : out std_logic_vector(31 downto 0);
+
+ DO_REBOOT_IN : in std_logic;
+ PROGRAMN : out std_logic;
+
+ SPI_CS_OUT : out std_logic;
+ SPI_SCK_OUT : out std_logic;
+ SPI_SDO_OUT : out std_logic;
+ SPI_SDI_IN : in std_logic
+ );
+end component;
+
+end package;
use ieee.std_logic_1164.all;\r
use ieee.numeric_std.all;\r
\r
-library work;\r
---use work.trb_net_std.all;\r
---use work.trb_net_components.all;\r
---use work.trb3_components.all;\r
---use work.med_sync_define.all;\r
---use work.version.all;\r
+\r
\r
entity soda_packet_builder is\r
port(\r
SYSCLK : in std_logic; -- fabric clock\r
RESET : in std_logic; -- synchronous reset\r
CLEAR : in std_logic; -- asynchronous reset\r
- CLK_EN : in std_logic;\r
+ CLK_EN : in std_logic; \r
--Internal Connection\r
SODA_CMD_STROBE_IN : in std_logic := '0'; -- \r
START_OF_SUPERBURST : in std_logic := '0';\r
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-library work;
---use work.trb_net_std.all;
---use work.trb_net_components.all;
---use work.trb3_components.all;
---use work.med_sync_define.all;
---use work.version.all;
entity soda_packet_handler is
port(
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
+use IEEE.STD_LOGIC_ARITH.ALL;
+use ieee.std_logic_signed.all;
-library work;
-use work.trb_net_std.all;
-use work.trb_net_components.all;
-use work.trb3_components.all;
-use work.med_sync_define.all;
-use work.version.all;
-
-entity soda_packet_builder is
--- generic(
--- INTERCEPT_MODE : integer range 0 to 1 := c_NO --use the RX clock for internal logic and transmission. Should be NO for soda tests!
--- );
-port(
- SYSCLK : in std_logic; -- fabric clock
- RESET : in std_logic; -- synchronous reset
- CLEAR : in std_logic; -- asynchronous reset
- CLK_EN : in std_logic;
- --Internal Connection
- START_OF_BURST : in std_logic := '0';
- SUPER_BURST_NR_OUT : out std_logic_vector(30 downto 0) := (others => '0');
- SUPER_BURST_NR_VALID : out std_logic
- START_OF_SUPERBURST : out std_logic
- );\r
-end soda_packet_builder;
-\r
-architecture Behavioral of soda_packet_builder is
- constant c_K287 : std_logic_vector(7 downto 0) := x"FB";\r
+
+entity soda_superburst_gen is
+ generic(
+ BURST_COUNT : natural range 1 to 256 := 16 -- number of bursts to be counted between super-bursts
+ );
+ port(
+ SYSCLK : in std_logic; -- fabric clock
+ RESET : in std_logic; -- synchronous reset
+ CLEAR : in std_logic; -- asynchronous reset
+ CLK_EN : in std_logic;
+ --Internal Connection
+ SODA_BURST_PULSE_IN : in std_logic := '0'; --
+ START_OF_SUPERBURST : out std_logic := '0';
+ SUPER_BURST_NR_OUT : out std_logic_vector(30 downto 0) := (others => '0')
+ );
+end soda_superburst_gen;
+
+architecture Behavioral of soda_superburst_gen is
+
+ constant cBURST_COUNT : std_logic_vector(7 downto 0) := conv_std_logic_vector(BURST_COUNT - 1,8);
signal clk_S : std_logic;
signal rst_S : std_logic;
- signal soda_cmd_strobe_S : std_logic;
- signal start_of_burst_S : std_logic;
- signal start_of_superburst_S : std_logic;
- signal super_burst_nr_S : std_logic_vector(30 downto 0) := (others => '0'); -- from super-burst-nr-generator
- signal superburst_nr_valid_S : std_logic;
- \r
- signal burst_count_S : std_logic_vector(3 downto 0) := (others => '0');\r
+ signal soda_burst_pulse_S : std_logic := '0';
+ signal start_of_superburst_S : std_logic := '0';
+ signal super_burst_nr_S : std_logic_vector(30 downto 0) := (others => '0'); -- from super-burst-nr-generator
+ signal burst_counter_S : std_logic_vector(7 downto 0) := (others => '0'); -- from super-burst-nr-generator
+
begin
-\r
- clk_S <= SYSCLK;\r
- rst_S <= RESET;\r
- start_of_burst_S <= START_OF_BURST;\r
- \r
- SUPER_BURST_NR_OUT <= soda_pkt_word_S;\r
- SUPER_BURST_NR_VALID <= soda_pkt_valid_S;\r
- START_OF_SUPERBURST <= start_of_burst_S;
- \r
+
+ clk_S <= SYSCLK;
+ rst_S <= RESET;
+ START_OF_SUPERBURST <= start_of_superburst_S;
+ SUPER_BURST_NR_OUT <= super_burst_nr_S;
+
+ burst_pulse_edge_proc : process(clk_S, rst_S, SODA_BURST_PULSE_IN, soda_burst_pulse_S, burst_counter_S)
+ begin
+ if rising_edge(clk_S) then
+ soda_burst_pulse_S <= SODA_BURST_PULSE_IN;
+ if (rst_S='1') then
+ burst_counter_S <= cBURST_COUNT;
+ start_of_superburst_S <= '0';
+ super_burst_nr_S <= (others => '0');
+ elsif ((SODA_BURST_PULSE_IN = '1') and (soda_burst_pulse_S = '0')) then
+ if (burst_counter_S = x"00") then
+ start_of_superburst_S <= '1';
+ super_burst_nr_S <= super_burst_nr_S + 1;
+ burst_counter_S <= cBURST_COUNT;
+ else
+ start_of_superburst_S <= '0';
+ burst_counter_s <= burst_counter_s - 1;
+ end if;
+ else
+ start_of_superburst_S <= '0';
+ end if;
+ end if;
+ end process;
-\r
-end architecture;
\ No newline at end of file
+
+end Behavioral;
jspc29 / soda.git / commitdiff