]> jspc29.x-matter.uni-frankfurt.de Git - daqtools.git/commitdiff
add media interface registers to xml-db
authorJan Michel <michel@physik.uni-frankfurt.de>
Wed, 23 Aug 2023 14:53:56 +0000 (16:53 +0200)
committerJan Michel <michel@physik.uni-frankfurt.de>
Wed, 23 Aug 2023 14:53:56 +0000 (16:53 +0200)
web/htdocs/network/media.pl [new file with mode: 0755]
xml-db/database/MediaECP3.xml [new file with mode: 0644]
xml-db/database/MediaECP5.xml [new file with mode: 0644]
xml-db/database/TrbNet.xml

diff --git a/web/htdocs/network/media.pl b/web/htdocs/network/media.pl
new file mode 100755 (executable)
index 0000000..d509000
--- /dev/null
@@ -0,0 +1,44 @@
+#!/usr/bin/perl
+if ($ENV{'SERVER_SOFTWARE'} =~ /HTTPi/i) {
+  print "HTTP/1.0 200 OK\n";
+  print "Content-type: text/html\r\n\r\n";
+  }
+else {
+  use lib '..';
+  use if (!($ENV{'SERVER_SOFTWARE'} =~ /HTTPi/i)), apacheEnv;
+  print "Content-type: text/html\n\n";
+  }
+
+use CGI ':standard';
+use XML::LibXML;
+use POSIX;
+use CGI::Carp qw(fatalsToBrowser);
+
+use lib qw|../commands htdocs/commands|;
+use xmlpage;
+
+my $page;
+
+$page->{title} = "Media Interfaces";
+$page->{link}  = "../";
+
+my @setup;
+
+push(@setup,({name      => "ECP3", 
+              cmd       => "MediaECP3-0xffff-ControlStatus",
+              period    => 10000,
+              address   => 1}));
+
+push(@setup,({name      => "ECP5", 
+              cmd       => "MediaECP5-0xffff-ControlStatus",
+              period    => 10000,
+              address   => 1}));
+
+xmlpage::initPage(\@setup,$page);
+
+
+1;
+
+
diff --git a/xml-db/database/MediaECP3.xml b/xml-db/database/MediaECP3.xml
new file mode 100644 (file)
index 0000000..77f74b3
--- /dev/null
@@ -0,0 +1,80 @@
+<?xml version="1.0"  encoding="utf-8" ?>
+<TrbNetEntity xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+              xsi:noNamespaceSchemaLocation="../schema/TrbNetEntity.xsd"
+              name="MediaECP3"
+              address="b000"
+              >
+  <description>Registers for the Media Interface</description>
+
+
+  <group name="Status" address="0000"  size="4096" purpose="status" mode="r" continuous="false">
+    <group name="ControlStatus" address="0140"   size="512" repeat="4" purpose="status" mode="r" continuous="false">
+      <description>Link status register for ECP3, Trb3sc and newer. Does not support Trb3</description>
+      <register name="RxControl" address="0000" >
+        <description>RX Control Status</description>
+        <field name="RxControlFull" start="0" bits="32" format="raw" />
+        <field name="RxState" start="0" bits="4" format="hex" />
+        <field name="GotLinkReady" start="4" bits="1" format="boolean" />
+        <field name="FifoAfull" start="5" bits="1" format="boolean" errorflag="true"/>
+        <field name="FifoEmpty" start="6" bits="1" format="boolean" />
+        <field name="FifoWrite" start="7" bits="1" format="boolean" noflag="true"/>
+        <field name="RxData" start="8" bits="8" format="hex" />            
+      </register>      
+      <register name="TxControl" address="0001" >
+        <description>TX Control Status</description>
+        <field name="TxControlFull" start="0" bits="32" format="raw" />
+        <field name="TxState" start="0" bits="4" format="hex" /> 
+        <field name="TxRamAddr" start="8" bits="8" format="unsigned" />
+        <field name="RamEmpty" start="17" bits="1" format="boolean" noflag="true"/>
+      </register>     
+      <register name="ResetFSMCh0" address="0002" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull0" start="0" bits="32" format="raw"  invertflag="true" errorflag="true" />
+        <field name="RxFsmState0" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState0" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow0" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow0" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol0"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos0"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol0"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer0"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>         
+      </register>      
+      <register name="ResetFSMCh1" address="0003" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull1" start="0" bits="32" format="raw" invertflag="true" errorflag="true"/>
+        <field name="RxFsmState1" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState1" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow1" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow1" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol1"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos1"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol1"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer1"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>         
+      </register> 
+      <register name="ResetFSMCh2" address="0004" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull2" start="0" bits="32" format="raw"  invertflag="true" errorflag="true"/>
+        <field name="RxFsmState2" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState2" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow2" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow2" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol2"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos2"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol2"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer2"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>         
+      </register> 
+      <register name="ResetFSMCh3" address="0005" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull3" start="0" bits="32" format="raw"  invertflag="true" errorflag="true"/>
+        <field name="RxFsmState3" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState3" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow3" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow3" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol3"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos3"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol3"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer3"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>         
+      </register>       
+    </group>        
+  </group>
+</TrbNetEntity>
diff --git a/xml-db/database/MediaECP5.xml b/xml-db/database/MediaECP5.xml
new file mode 100644 (file)
index 0000000..cd18491
--- /dev/null
@@ -0,0 +1,100 @@
+<?xml version="1.0"  encoding="utf-8" ?>
+<TrbNetEntity xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+              xsi:noNamespaceSchemaLocation="../schema/TrbNetEntity.xsd"
+              name="MediaECP5"
+              address="b000"
+              >
+  <description>Registers for the Media Interface</description>
+
+
+  <group name="Status" address="0000"  size="4096" purpose="status" mode="r" continuous="false">
+    <group name="ControlStatus" address="0140" size="512" repeat="2" purpose="status" mode="r" continuous="false">
+      <register name="RxControl0" address="0000" >
+        <description>RX Control Status</description>
+        <field name="RxControlFull" start="0" bits="32" format="raw" />
+        <field name="RxState" start="0" bits="4" format="hex" />
+        <field name="GotLinkReady" start="4" bits="1" format="boolean" />
+        <field name="FifoAfull" start="5" bits="1" format="boolean" errorflag="true"/>
+        <field name="FifoEmpty" start="6" bits="1" format="boolean" />
+        <field name="FifoWrite" start="7" bits="1" format="boolean" noflag="true"/>
+        <field name="RxData" start="8" bits="8" format="hex" />
+      </register>      
+      <register name="TxControl0" address="0001" >
+        <description>TX Control Status</description>
+        <field name="TxControlFull" start="0" bits="32" format="raw" />
+        <field name="TxState" start="0" bits="4" format="hex" /> 
+        <field name="TxRamAddr" start="8" bits="8" format="unsigned" />
+        <field name="RamEmpty" start="17" bits="1" format="boolean" noflag="true"/>
+      </register>     
+      <register name="ResetFSM0" address="0002" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull" start="0" bits="32" format="raw"  invertflag="true" errorflag="true"/>
+        <field name="RxFsmState" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>         
+      </register>      
+      <register name="StatPCS0" address="0003" >
+        <description>PCS Status Flags</description>
+        <field name="StatPCSFull" start="0" bits="32" format="raw" />
+        <field name="RstQd"  start="0" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxPcsRst"  start="1" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxPcsRst"  start="2" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxSerdesRst"  start="3" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxPllLol"  start="4" bits="1" format="boolean" errorflag="true"/>
+        <field name="CdrLol"  start="5" bits="1" format="boolean" errorflag="true"/>
+        <field name="LosLow"  start="6" bits="1" format="boolean" errorflag="true"/>
+        <field name="PcsRxReady"  start="7" bits="1" format="boolean" errorflag="true" invertflag="true"/>
+        <field name="PcsTxReady"  start="8" bits="1" format="boolean" noflag="true"/>
+        <field name="LsmStatus"  start="9" bits="1" format="boolean" noflag="true" invertflag="true"/>
+      </register>      
+      <register name="RxControl1" address="0005" >
+        <description>RX Control Status</description>
+        <field name="RxControlFull1" start="0" bits="32" format="raw" />
+        <field name="RxState1" start="0" bits="4" format="hex" />
+        <field name="GotLinkReady1" start="4" bits="1" format="boolean" />
+        <field name="FifoAfull1" start="5" bits="1" format="boolean" errorflag="true"/>
+        <field name="FifoEmpty1" start="6" bits="1" format="boolean" />
+        <field name="FifoWrite1" start="7" bits="1" format="boolean" noflag="true"/>
+        <field name="RxData1" start="8" bits="8" format="hex" />    
+      </register>      
+      <register name="TxControl1" address="0006" >
+        <description>TX Control Status</description>
+        <field name="TxControlFull1" start="0" bits="32" format="raw" />
+        <field name="TxState1" start="0" bits="4" format="hex" /> 
+        <field name="TxRamAddr1" start="8" bits="8" format="unsigned" />
+        <field name="RamEmpty1" start="17" bits="1" format="boolean" noflag="true"/>
+      </register>      
+      <register name="ResetFSM1" address="0007" >
+        <description>Reset FSM Status</description>
+        <field name="ResetFSMFull1" start="0" bits="32" format="raw"  invertflag="true" errorflag="true"/>
+        <field name="RxFsmState1" start="0" bits="4" format="hex" /> 
+        <field name="TxFsmState1" start="4" bits="4" format="hex" /> 
+        <field name="TxAllow1" start="8" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxAllow1" start="9" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+        <field name="RxCdrLol1"  start="16" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxLos1"  start="17" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxLol1"  start="20" bits="1" format="boolean" errorflag="true"/>
+        <field name="StartTimer1"  start="31" bits="1" format="boolean" invertflag="true" errorflag="true"/>
+      </register>      
+      <register name="StatPCS1" address="0004" >
+        <description>PCS Status Flags </description>
+        <field name="StatPCSFull1" start="0" bits="32" format="raw" />
+        <field name="RstQd1"  start="0" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxPcsRst1"  start="1" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxPcsRst1"  start="2" bits="1" format="boolean" errorflag="true"/>
+        <field name="RxSerdesRst1"  start="3" bits="1" format="boolean" errorflag="true"/>
+        <field name="TxPllLol1"  start="4" bits="1" format="boolean" errorflag="true"/>
+        <field name="CdrLol1"  start="5" bits="1" format="boolean" errorflag="true"/>
+        <field name="LosLow1"  start="6" bits="1" format="boolean" errorflag="true"/>
+        <field name="PcsRxReady1"  start="7" bits="1" format="boolean" errorflag="true" invertflag="true"/>
+        <field name="PcsTxReady1"  start="8" bits="1" format="boolean" noflag="true"/>
+        <field name="LsmStatus1"  start="9" bits="1" format="boolean" noflag="true" invertflag="true"/>
+      </register>           
+    </group>     
+  </group>
+</TrbNetEntity>
index ac4fcc6c4c17f8abc7b1f4feb52c9c400c68b2e5..4965bb7e1cb1fb41512d7b91f3e0a20fe0f153ed 100644 (file)
         <description>Update Address enable bit. </description>
       </field>
     </register>
+    
+     <register name="CommonControlReg" address="0020" purpose="trigger" mode="rw">
+      <description>Common Control Strobe Signals </description>
+      <field name="ResetTriggerLogic" start="1" bits="1" format="bitmask" >
+        <description>Reset trigger logic</description>
+      </field>
+      <field name="ResetDataHandler" start="2" bits="1" format="bitmask" >
+        <description>Reset data handler logic</description>
+      </field>
+      <field name="ResetErrorFlags" start="4" bits="1" format="bitmask" >
+        <description>Reset error flags</description>
+      </field>
+      <field name="ResetStatistics" start="5" bits="1" format="bitmask" >
+        <description>Reset statistic counters</description>
+      </field>
+      <field name="Reload" start="15" bits="1" format="bitmask" >
+        <description>Reload FPGA</description>
+      </field>       
+     </register>  
   </group>  
 
   <group name="BoardInformation" address="0040" mode="r" >