updated CbController.xml

diff --git a/xml-db/database/CbController.xml b/xml-db/database/CbController.xml
index 62f7da5eee6efcfa43d584141b4ec0e47cb0e35f..54e6fc902054530aef3738bcdcf7762ce6a5d96b 100644 (file)
--- a/xml-db/database/CbController.xml
+++ b/xml-db/database/CbController.xml
@@ -207,97 +207,103 @@
       </field>
       <field name="ZeroCalib" start="6" bits="1" format="bitmask" >
       </field>
-      <field name="ADC0_chan0" start="8" bits="1" format="bitmask" >
-      </field>
+      <field name="ADC0_chan" start="8" bits="3" format="integer" >
+<!--      </field>
       <field name="ADC0_chan1" start="9" bits="1" format="bitmask" >
       </field>
-      <field name="ADC0_chan2" start="10" bits="1" format="bitmask" >
-      </field>
-      <field name="ADC1_chan0" start="12" bits="1" format="bitmask" >
+      <field name="ADC0_chan2" start="10" bits="1" format="bitmask" > -->
       </field>
+      <field name="ADC1_chan" start="12" bits="3" format="integer" >
+<!--      </field>
       <field name="ADC1_chan1" start="13" bits="1" format="bitmask" >
       </field>
-      <field name="ADC1_chan2" start="14" bits="1" format="bitmask" >
+      <field name="ADC1_chan2" start="14" bits="1" format="bitmask" > -->
       </field>
     </register>
 
     <register  name="ADC_read" address="0004" purpose="config" mode="r" >
       <description></description>
-      <field name="ADC_read" start="0" bits="16" format="bitmask" >
+      <field name="ADC_read" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacCurLimA0" address="0005" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacCurLimA0" start="0" bits="16" format="bitmask" >
+      <field name="DacCurLimA0" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacCurLimD0" address="0006" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacCurLimD0" start="0" bits="16" format="bitmask" >
+      <field name="DacCurLimD0" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacVClp0" address="0007" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacVClp0" start="0" bits="16" format="bitmask" >
+      <field name="DacVClp0" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacCurLimA1" address="0008" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacCurLimA1" start="0" bits="16" format="bitmask" >
+      <field name="DacCurLimA1" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacCurLimD1" address="0009" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacCurLimD1" start="0" bits="16" format="bitmask" >
+      <field name="DacCurLimD1" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="DacVClp1" address="000A" purpose="config" mode="rw" >
       <description></description>
-      <field name="DacVClp1" start="0" bits="16" format="bitmask" >
+      <field name="DacVClp1" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="SpiDebugConf" address="000B" purpose="config" mode="rw" >
       <description></description>
-      <field name="spiSpeed" start="8" bits="4" format="bitmask" >
+      <field name="spiSpeed" start="8" bits="4" format="integer" >
       </field>
       <field name="16bit_8bit" start="5" bits="1" format="bitmask" >
       </field>
       <field name="DebugMode" start="4" bits="1" format="bitmask" >
       </field>
-      <field name="SpiNo_1" start="1" bits="1" format="bitmask" >
-      </field>
-      <field name="SpiNo_0" start="0" bits="1" format="bitmask" >
+      <field name="SpiNo" start="1" bits="2" format="integer" >
+<!--      </field>
+      <field name="SpiNo_0" start="0" bits="1" format="bitmask" > -->
       </field>
     </register>
 
     <register  name="SpiDebugCs" address="000C" purpose="config" mode="rw" >
       <description></description>
-      <field name="SpiDebugCs" start="0" bits="16" format="bitmask" >
+      <field name="SpiDebugCs" start="0" bits="1" format="bitmask" >
       </field>
     </register>
 
     <register  name="SpiDebugWordIn" address="000D" purpose="config" mode="rw" >
       <description></description>
-      <field name="SpiDebugWordIn" start="0" bits="16" format="bitmask" >
+      <field name="SpiDebugWordIn" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="SpiDebugWordOut" address="000E" purpose="config" mode="r" >
       <description></description>
-      <field name="SpiDebugWordOut" start="0" bits="16" format="bitmask" >
+      <field name="SpiDebugWordOut" start="0" bits="16" format="hex" >
       </field>
     </register>
 
     <register  name="OvCurStatus" address="000F" purpose="config" mode="r" >
       <description></description>
-      <field name="OvCurStatus" start="0" bits="16" format="bitmask" >
+      <field name="OvCA_C1" start="3" bits="1" format="bitmask" >
+      </field>
+      <field name="OvCD_C1" start="2" bits="1" format="bitmask" >
+      </field>
+      <field name="OvCA_C0" start="1" bits="1" format="bitmask" >
+      </field>
+      <field name="OvCD_C0" start="0" bits="1" format="bitmask" >
       </field>
     </register>
 
@@ -305,6 +311,22 @@
       <description></description>
       <field name="MiscConf" start="0" bits="16" format="bitmask" >
       </field>
+      <field name="OvRideLed4" start="7" bits="1" format="bitmask" >
+      </field>
+      <field name="OvRideLed3" start="6" bits="1" format="bitmask" >
+      </field>
+      <field name="OvRideLed2" start="5" bits="1" format="bitmask" >
+      </field>
+      <field name="OvRideLed1" start="4" bits="1" format="bitmask" >
+      </field>
+      <field name="Led4" start="3" bits="1" format="bitmask" >
+      </field>
+      <field name="Led3" start="2" bits="1" format="bitmask" >
+      </field>
+      <field name="Led2" start="1" bits="1" format="bitmask" >
+      </field>
+      <field name="Led1" start="0" bits="1" format="bitmask" >
+      </field>
     </register>