SYNC_TX_PLL_IN : in std_logic; -- bit0 alignment for TX serializer
LINK_TX_READY_IN : in std_logic; -- from TX reset generator
DESTROY_LINK_IN : in std_logic_vector(3 downto 0); -- hard reset for links
+ WAP_REQUESTED_IN : in std_logic_vector(3 downto 0); -- TESTTESTTEST
+ RX_INDEX_OUT : out std_logic_vector(3 downto 0); -- TESTTESTTEST
--SFP Connection
SD_PRSNT_N_IN : in std_logic_vector(3 downto 0); -- SFP Present ('0' = SFP in place, '1' = no SFP mounted)
SD_LOS_IN : in std_logic_vector(3 downto 0); -- SFP Loss Of Signal ('0' = OK, '1' = no signal)
signal link_active_i : std_logic_vector(3 downto 0);
+ signal wap_requested_i : std_logic_vector(15 downto 0);
+
+ signal rx_index_i : std_logic_vector(3 downto 0);
+
signal quad_mode : integer range 0 to 100;
begin
WORD_SYNC_OUT <= word_sync_sel;
+ -- if a SP is in the quad, we use the received WORD_SYNC.
+ -- in a MP only configuration, the TX WORD_SYNC is used as reference.
+
-------------------------------------------------
-- reset komma receive
-- output only if a slave port is available in QUAD
tx_rst_i(2) <= TX_RST_IN when (IS_MODE(2) = c_IS_MASTER) else '0';
tx_rst_i(3) <= TX_RST_IN when (IS_MODE(3) = c_IS_MASTER) else '0';
+-------------------------------------------------
+-- WAP request (for testing)
+-------------------------------------------------
+ wap_requested_i(0*4+3 downto 0*4) <= WAP_REQUESTED_IN when (IS_MODE(0) = c_IS_MASTER) else x"0";
+ wap_requested_i(1*4+3 downto 1*4) <= WAP_REQUESTED_IN when (IS_MODE(1) = c_IS_MASTER) else x"0";
+ wap_requested_i(2*4+3 downto 2*4) <= WAP_REQUESTED_IN when (IS_MODE(2) = c_IS_MASTER) else x"0";
+ wap_requested_i(3*4+3 downto 3*4) <= WAP_REQUESTED_IN when (IS_MODE(3) = c_IS_MASTER) else x"0";
+
+-------------------------------------------------
+-------------------------------------------------
+ RX_INDEX_OUT <= rx_index_i;
+
-------------------------------------------------
-- Serdes
-------------------------------------------------
RX_LSM_IN => lsm_status(i),
TX_PLL_LOL_IN => TX_PLL_LOL_IN,
WA_POSITION_IN => wa_position_i(i*4+3 downto i*4),
+ WAP_REQUESTED_IN => wap_requested_i(i*4+3 downto i*4),
-- control signals to SerDes
RX_SERDES_RST => rx_serdes_rst(i),
RX_PCS_RST => rx_pcs_rst(i),
LINK_TX_READY_IN => LINK_TX_READY_IN,
LINK_RX_READY_OUT => link_rx_ready_i(i),
LINK_ACTIVE_OUT => link_active_i(i),
+ RX_INDEX_OUT => rx_index_i(i),
-- komma operation
TX_DLM_IN => TX_DLM_IN,
TX_DLM_WORD_IN => TX_DLM_WORD_IN,
powerup_ch(i) <= '0'; -- keep in power down
rx_serdes_rst(i) <= '1'; -- keep in reset
rx_pcs_rst(i) <= '1'; -- keep in reset
+ rx_index_i(i) <= '0';
MEDIA_MED2INT(i).dataready <= '0';
MEDIA_MED2INT(i).tx_read <= '1';
MEDIA_MED2INT(i).stat_op <= x"0007";
RX_LSM_IN : in std_logic; -- SerDes TX LinkStateMachine status
TX_PLL_LOL_IN : in std_logic; -- wired'or from all QUADs
WA_POSITION_IN : in std_logic_vector(3 downto 0); -- WordAlignment Position
+ WAP_REQUESTED_IN : in std_logic_vector(3 downto 0); -- TESTTESTTEST
-- control signals to SerDes
RX_SERDES_RST : out std_logic; -- reset RX (SerDes + CDR)
RX_PCS_RST : out std_logic; -- reset RX (PCS)
RX_K_IN : in std_logic; -- komma designator from RX SerDes
-- ports for synchronous operation
WORD_SYNC_IN : in std_logic; -- sync signal for Byte/Word Alignment
- WORD_SYNC_OUT : out std_logic;
+ WORD_SYNC_OUT : out std_logic;
GLOBAL_RESET_OUT : out std_logic; -- global reset from slave port
LINK_TX_READY_IN : in std_logic; --
LINK_RX_READY_OUT : out std_logic; --
LINK_ACTIVE_OUT : out std_logic; --
+ RX_INDEX_OUT : out std_logic; --
-- komma handling
TX_DLM_IN : in std_logic; -- transmit one DLM komma
TX_DLM_WORD_IN : in std_logic_vector(7 downto 0);
D_OUT(1) => RX_SERDES_RST
);
- is_wap_zero_i <= '1' when (WA_POSITION_IN = x"0") else '0';
+ is_wap_zero_i <= '1' when (WA_POSITION_IN = WAP_REQUESTED_IN) else '0';
LINK_RX_READY_OUT <= link_rx_ready_i;
DEBUG_RX_CONTROL <= debug_rx_control_i;
+ RX_INDEX_OUT <= word_sync_rx_i;
+
-- clocks for media interface
media_med2int_i.clk_half <= CLK_RXHALF; -- goes to clock and reset handler
media_med2int_i.clk_full <= CLK_RXI; -- goes to clock and reset handler