-const char trbnet_version[] = "$Revision: 4.26 $ Local";
+#ifdef PEXOR
+const char trbnet_version[] = "$Revision: 4.27 $ Local Pexor";
+#elif defined TRB3
+const char trbnet_version[] = "$Revision: 4.27 $ Local TRB3";
+#else
+const char trbnet_version[] = "$Revision: 4.27 $ Local Etrax";
+#endif
#include <stdlib.h>
#include <signal.h>
return status;
}
+int trb_register_modify(uint16_t trb_address,
+ uint16_t reg_address,
+ int mode,
+ uint32_t bitMask,
+ uint32_t bitValue)
+{
+ static const size_t NUM_ENDPOINTS = 1024;
+ int status = 0;
+
+ uint32_t value;
+ int singleWrite = 0;
+ uint32_t *data = NULL;
+ int i;
+
+ if (lockPorts(1) == -1) return -1;
+
+ data = (uint32_t *) malloc(sizeof(uint32_t) * NUM_ENDPOINTS * 2);
+ if (data == NULL) abort();
+
+ status = trb_register_read(trb_address, reg_address,
+ data, NUM_ENDPOINTS * 2);
+ if (status == -1) {
+ free(data);
+ unlockPorts(1);
+ return -1;
+ }
+
+ /* Now set bits on all endpoints */
+ /* check, whether all registers are the same */
+ singleWrite = 1;
+ value = data[1];
+ for (i = 2; (i + 1) < status; i += 2) {
+ if (data[i + 1] != value) {
+ singleWrite = 0;
+ break;
+ }
+ }
+
+ /* Write modified register value(s) */
+ for (i = 0; (i + 1) < (singleWrite == 0 ? status : 2); i += 2) {
+ if (singleWrite == 0) {
+ trb_address = data[i];
+ value = data[i + 1];
+ }
+ switch (mode) {
+ case 1:
+ value |= bitMask;
+ break;
+
+ case 2:
+ value &= ~bitMask;
+ break;
+
+ case 3:
+ value = (value & ~bitMask) | (bitValue & bitMask);
+ break;
+
+ default:
+ free(data);
+ unlockPorts(1);
+ return -1;
+ }
+
+ if (trb_register_write(trb_address, reg_address, value) == -1) {
+ free(data);
+ unlockPorts(1);
+ return -1;
+ }
+ }
+
+ free(data);
+ if (unlockPorts(1) == -1) return -1;
+
+ return 0;
+}
+
#ifdef PEXOR
int fpga_register_read_mem(uint32_t reg_address,
uint32_t* data,
return 0;
}
-int trb_register_modify(uint16_t trb_address,
- uint16_t reg_address,
- int mode,
- uint32_t bitMask,
- uint32_t bitValue)
-{
- static const size_t NUM_ENDPOINTS = 1024;
- int status = 0;
-
- uint32_t value;
- int singleWrite = 0;
- uint32_t *data = NULL;
- int i;
-
- if (lockPorts(1) == -1) return -1;
-
- data = (uint32_t *) malloc(sizeof(uint32_t) * NUM_ENDPOINTS * 2);
- if (data == NULL) abort();
-
- status = trb_register_read(trb_address, reg_address,
- data, NUM_ENDPOINTS * 2);
- if (status == -1) {
- free(data);
- unlockPorts(1);
- return -1;
- }
-
- /* Now set bits on all endpoints */
- /* check, whether all registers are the same */
- singleWrite = 1;
- value = data[1];
- for (i = 2; (i + 1) < status; i += 2) {
- if (data[i + 1] != value) {
- singleWrite = 0;
- break;
- }
- }
-
- /* Write modified register value(s) */
- for (i = 0; (i + 1) < (singleWrite == 0 ? status : 2); i += 2) {
- if (singleWrite == 0) {
- trb_address = data[i];
- value = data[i + 1];
- }
- switch (mode) {
- case 1:
- value |= bitMask;
- break;
-
- case 2:
- value &= ~bitMask;
- break;
-
- case 3:
- value = (value & ~bitMask) | (bitValue & bitMask);
- break;
-
- default:
- free(data);
- unlockPorts(1);
- return -1;
- }
-
- if (trb_register_write(trb_address, reg_address, value) == -1) {
- free(data);
- unlockPorts(1);
- return -1;
- }
- }
-
- free(data);
- if (unlockPorts(1) == -1) return -1;
-
- return 0;
-}
#else /* NOT TRB3 */
int trb_ipu_data_read(uint8_t type,