Little fix in testbench

diff --git a/ADC/sim/tb_adcprocessor.vhd b/ADC/sim/tb_adcprocessor.vhd
index a035a9da6425a9f07645aabc6661def214f0323f..f78397aebb27eab3e118b0bb3337f07f7f187a75 100644 (file)
--- a/ADC/sim/tb_adcprocessor.vhd
+++ b/ADC/sim/tb_adcprocessor.vhd
@@ -100,8 +100,9 @@ config.processing_mode   <= 2;
 config.buffer_depth      <= to_unsigned(128 ,11);
 config.samples_after     <= to_unsigned(8  ,11);
 config.block_count       <= to_unsigned(2   , 2); 
-config.trigger_threshold <= to_unsigned(30  ,18);
-config.trigger_threshold(16) <= '1'; -- invert polarity 
+config.trigger_threshold(15 downto 0) <= to_unsigned(30  ,16);
+config.trigger_threshold(16) <= '1'; -- invert polarity
+config.trigger_threshold(17) <= '1'; -- unused 
 config.readout_threshold <= to_unsigned(30  ,18);
 config.presum            <= to_unsigned(0   , 8);           
 config.averaging         <= to_unsigned(6   , 4);