]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
*** empty log message ***
authorhadeshyp <hadeshyp>
Thu, 21 Jun 2012 21:05:46 +0000 (21:05 +0000)
committerhadeshyp <hadeshyp>
Thu, 21 Jun 2012 21:05:46 +0000 (21:05 +0000)
gbe2_ecp3/trb_net16_gbe_buf.vhd
gbe2_ecp3/trb_net16_gbe_main_control.vhd
gbe2_ecp3/trb_net16_gbe_packet_constr_simple_sender.vhd
gbe2_ecp3/trb_net16_gbe_response_constructor_DHCP.vhd
gbe2_ecp3/trb_net16_gbe_response_constructor_SCTRL.vhd
gbe2_ecp3/trb_net16_gbe_transmit_control.vhd
gbe2_ecp3/trb_net16_med_ecp_sfp_gbe_8b.vhd
gbe2_ecp3/trb_net_gbe_protocols.vhd

index 13c691c95eb5bafeeaa4d1cb46be727061e84b14..436793451d229a8ca0eedef9c595491f2f6cb77d 100755 (executable)
@@ -119,7 +119,7 @@ architecture trb_net16_gbe_buf of trb_net16_gbe_buf is
 --attribute HGROUP of trb_net16_gbe_buf : architecture is "GBE_BUF_group";
 
 
-component tsmac34
+component tsmac35
 port(
        --------------- clock and reset port declarations ------------------
        hclk                                    : in    std_logic;
@@ -1293,7 +1293,7 @@ imp_gen: if (DO_SIMULATION = 0) generate
        --------------------------------------------------------------------------------------------
        
        -- MAC part
-       MAC: tsmac34
+       MAC: tsmac35
        port map(
        ----------------- clock and reset port declarations ------------------
                hclk                            => CLK,
index 6ee29153cfe8427e8024c5fc9d35e5b857a73140..482ba9dfd2ed74e152a2c68f64f53aeb3420f703 100644 (file)
@@ -621,9 +621,9 @@ MC_LINK_OK_OUT <= link_ok;
 
 --*************
 -- GENERATE MAC_ADDRESS
-g_MY_MAC <= unique_id(15 downto 0) & x"efbe0000";
+g_MY_MAC <= unique_id(63 downto 48) & x"efbe0000";
 
-g_MAX_FRAME_SIZE <= x"0040";
+g_MAX_FRAME_SIZE <= x"0578";
 --
 --*************
 
index 49cf13efc4fdfc277a23296c28948f15b93a9570..67a8e6c17f9e0231aa91fcff6306771c779489d2 100644 (file)
@@ -162,6 +162,13 @@ signal constrSimpleFrameCurrentState, constrSimpleFrameNextState : constructSimp
 
 signal gen_data_ctr         : std_logic_vector(15 downto 0);
 
+signal state                : std_logic_vector(3 downto 0);
+
+attribute syn_preserve : boolean;
+attribute syn_keep : boolean;
+attribute syn_keep of state : signal is true;
+attribute syn_preserve of state : signal is true;
+
 begin
 
 costrSimpleFrameMachineProc : process(CLK)
@@ -180,6 +187,7 @@ begin
        case constrSimpleFrameCurrentState is
        
                when IDLE =>
+                       state <= x"1";
                        if (PC_START_OF_SUB_IN = '1') then
                                constrSimpleFrameNextState <= WAIT_FOR_HEADERS;
                        else
@@ -187,6 +195,7 @@ begin
                        end if;
                
                when WAIT_FOR_HEADERS =>
+                       state <= x"2";
                        if (TC_H_READY_IN = '1') then
                                constrSimpleFrameNextState <= PUT_DATA;
                        else
@@ -194,6 +203,7 @@ begin
                        end if;
                
                when PUT_DATA =>
+                       state <= x"3";
                        if (gen_data_ctr = x"0100") then
                                constrSimpleFrameNextState <= FINISH;
                        else
@@ -201,6 +211,7 @@ begin
                        end if;
                
                when FINISH =>
+                       state <= x"4";
                        if (TC_READY_IN = '1') then
                                constrSimpleFrameNextState <= IDLE;
                        else
@@ -229,6 +240,7 @@ PC_READY_OUT <= '1' when constrSimpleFrameCurrentState = IDLE else '0';
 PC_TRANSMIT_ON_OUT <= '0' when constrSimpleFrameCurrentState = IDLE and PC_START_OF_SUB_IN = '0' else '1';
 TC_IP_SIZE_OUT <= x"0100";
 TC_UDP_SIZE_OUT <= x"0100";
+TC_FLAGS_OFFSET_OUT <= (others => '0');
 
 --PC_TRANSMIT_ON_OUT <= '1' when constructCurrentState = WAIT_FOR_LOAD else '0';
 --PC_TRANSMIT_ON_OUT <= '0';
@@ -243,8 +255,8 @@ TC_UDP_SIZE_OUT <= x"0100";
 -- max_frame_size <= PC_MAX_FRAME_SIZE_IN;
 -- 
 -- -- Ready signal for PacketConstructor
--- pc_ready <= '1' when (constructCurrentState = CIDLE) and (df_empty = '1') else '0';
-pc_ready <= '0';
+ --pc_ready <= '1' when (constructCurrentState = CIDLE) and (df_empty = '1') else '0';
+--pc_ready <= '0';
 
 -- store event information on Start_of_Subevent
 -- THE_EVT_INFO_STORE_PROC: process( CLK )
index 62928ad18acd9c28746c47e53c3624fb06721b69..f596659466cdd073118c92367b57d36fbfa9e8f8 100644 (file)
@@ -552,10 +552,10 @@ begin
        end if;
 end process LOAD_CTR_PROC;
 
-TC_DATA_PROC : process(construct_current_state, load_ctr, bootp_hdr, g_MY_MAC, main_current_state)
+TC_DATA_PROC : process(CLK, construct_current_state, load_ctr, bootp_hdr, g_MY_MAC, main_current_state)
 begin
 
-       tc_data(8) <= '0';
+       if rising_edge(CLK) then
 
        case (construct_current_state) is
 
@@ -563,6 +563,7 @@ begin
                        for i in 0 to 7 loop
                                tc_data(i) <= bootp_hdr(load_ctr * 8 + i);
                        end loop;
+                       tc_data(8) <= '0';
                        
                when CLIENT_IP =>
                        if (main_current_state = SENDING_DISCOVER) then
@@ -572,48 +573,59 @@ begin
                                        tc_data(i) <= saved_proposed_ip((load_ctr - 12) * 8 + i);
                                end loop;
                        end if;
+                       tc_data(8) <= '0';
                
                when YOUR_IP =>
                        tc_data(7 downto 0) <= x"00";
+                       tc_data(8) <= '0';
                
                when ZEROS1 =>
                        tc_data(7 downto 0) <= x"00";
+                       tc_data(8) <= '0';
                
                when MY_MAC =>
                        for i in 0 to 7 loop
                                tc_data(i) <= g_MY_MAC((load_ctr - 28) * 8 + i);
                        end loop;
+                       tc_data(8) <= '0';
                
                when ZEROS2 =>
                        tc_data(7 downto 0) <= x"00";
+                       tc_data(8) <= '0';
                        
                when VENDOR_VALS =>
                        for i in 0 to 7 loop
                                tc_data(i) <= vendor_values((load_ctr - 236) * 8 + i);
                        end loop;
+                       tc_data(8) <= '0';
                        
                -- needed only for DHCP Request message
                when VENDOR_VALS2 =>
                        for i in 0 to 7 loop
                                tc_data(i) <= vendor_values2((load_ctr - 258) * 8 + i);
                        end loop;
+                       tc_data(8) <= '0';
                        
                when TERMINATION =>
                        tc_data(7 downto 0) <= x"ff";
                        tc_data(8)          <= '1';
                
-               when others => tc_data(7 downto 0) <= x"00";
+               when others => 
+                       tc_data(7 downto 0) <= x"00";
+                       tc_data(8) <= '0';
        
        end case;
        
+       end if;
+       
 end process;
 
-TC_DATA_SYNC : process(CLK)
-begin
-       if rising_edge(CLK) then
+--TC_DATA_SYNC : process(CLK)
+--begin
+       --if rising_edge(CLK) then
                TC_DATA_OUT <= tc_data;
-       end if;
-end process TC_DATA_SYNC;
+       --end if;
+--end process TC_DATA_SYNC;
 
 
 PS_BUSY_OUT <= '0' when (construct_current_state = IDLE) else '1';
index 880b0604f7b186c67338de4c048021abd8d12634..8d37790fcb82720b2847aefe949aa00b1646a47d 100644 (file)
@@ -129,7 +129,7 @@ attribute syn_keep : boolean;
 attribute syn_keep of tx_data_ctr, tx_loaded_ctr : signal is true;
 attribute syn_preserve of tx_data_ctr, tx_loaded_ctr : signal is true;
 
-
+signal temp_ctr                : std_logic_vector(7 downto 0);
        
 begin
 
@@ -180,13 +180,25 @@ transmit_fifo : fifo_65536x18x9
   );
 
 tx_fifo_wr              <= '1' when GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1' else '0';
-tx_fifo_rd              <= '1' when TC_RD_EN_IN = '1' and dissect_current_state = LOAD_FRAME else '0';
+tx_fifo_rd              <= '1' when TC_RD_EN_IN = '1' and dissect_current_state = LOAD_FRAME and (tx_frame_loaded /= g_MAX_FRAME_SIZE) else '0';
+
+--temp_ctr_proc : process(CLK)
+--begin
+--     if rising_edge(CLK) then
+--             if RESET = '1' then
+--                     temp_ctr <= (others => '0');
+--             elsif tx_fifo_rd = '1' then
+--                     temp_ctr <= temp_ctr + x"1";
+--             end if;
+--     end if; 
+--end process temp_ctr_proc;
 
 TC_DATA_PROC : process(dissect_current_state, tx_loaded_ctr, tx_data_ctr, tx_frame_loaded, g_MAX_FRAME_SIZE)
 begin
        if (dissect_current_state = LOAD_FRAME) then
        
                TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0);
+               --TC_DATA_OUT(7 downto 0) <= temp_ctr;
                
                --if (tx_loaded_ctr = tx_data_ctr + x"1" or tx_frame_loaded = g_MAX_FRAME_SIZE + x"1") then
                if (tx_loaded_ctr = tx_data_ctr or tx_frame_loaded = g_MAX_FRAME_SIZE - x"1") then
index ba837cab9c555803d2fd04d7ebc723663494e8a8..b30d5a4a7f289646414ce8dfcbaa1d29834ca2a6 100644 (file)
@@ -8,6 +8,8 @@ use work.trb_net_std.all;
 use work.trb_net_components.all;
 use work.trb_net16_hub_func.all;
 
+use work.trb_net_gbe_protocols.all;
+
 --********
 -- multiplexes the output stream between data and slow control frames
 -- creates slow control frames
@@ -207,18 +209,14 @@ begin
        FC_FLAGS_OFFSET_OUT  <= PC_FLAGS_OFFSET_IN;
        FC_IDENT_OUT         <= sent_packets_ctr;
 
-       DEST_MAC_ADDRESS_OUT <= x"9a680f201300"; --IC_DEST_MAC_ADDRESS_IN;
-       DEST_IP_ADDRESS_OUT  <= x"0100a8c0";     --IC_DEST_IP_ADDRESS_IN;
-       DEST_UDP_PORT_OUT    <= (others => '0'); --IC_DEST_UDP_PORT_IN;
-       SRC_MAC_ADDRESS_OUT  <= x"beefbeef0000"; --IC_SRC_MAC_ADDRESS_IN;
-       SRC_IP_ADDRESS_OUT   <= x"0b00a8c0";     --IC_SRC_IP_ADDRESS_IN;
-       SRC_UDP_PORT_OUT     <= (others => '0'); --IC_SRC_UDP_PORT_IN;
+       DEST_MAC_ADDRESS_OUT <= x"ffffffffffff"; --IC_DEST_MAC_ADDRESS_IN;
+       DEST_IP_ADDRESS_OUT  <= x"ff00a8c0";     --IC_DEST_IP_ADDRESS_IN;
+       DEST_UDP_PORT_OUT    <= x"1111"; --IC_DEST_UDP_PORT_IN;
+       SRC_MAC_ADDRESS_OUT  <= g_MY_MAC; --x"0096beef0000"; --IC_SRC_MAC_ADDRESS_IN;
+       SRC_IP_ADDRESS_OUT   <= g_MY_IP; --x"0b00a8c0";     --IC_SRC_IP_ADDRESS_IN;
+       SRC_UDP_PORT_OUT     <= x"1111"; --IC_SRC_UDP_PORT_IN;
        
-       if (sent_packets_ctr(0) = '0') then
-               FC_IP_PROTOCOL_OUT   <= x"dd";
-       else
-               FC_IP_PROTOCOL_OUT   <= x"ee";
-       end if;
+       FC_IP_PROTOCOL_OUT   <= x"11";
        
 
       when TRANSMIT_CTRL =>
@@ -240,7 +238,11 @@ begin
 
        if (MC_FRAME_TYPE_IN = x"0008") then  -- in case of ip
                FC_IP_SIZE_OUT  <= MC_IP_SIZE_IN;
-               FC_UDP_SIZE_OUT <= MC_UDP_SIZE_IN;              
+               if (MC_UDP_SIZE_IN > g_MAX_FRAME_SIZE) then
+                       FC_UDP_SIZE_OUT <= MC_UDP_SIZE_IN - x"1";
+               else
+                       FC_UDP_SIZE_OUT <= MC_UDP_SIZE_IN;
+               end if;         
        else
                FC_IP_SIZE_OUT <= temp_frame_size; --MC_FRAME_SIZE_IN;
                FC_UDP_SIZE_OUT <= temp_frame_size; --MC_FRAME_SIZE_IN;
index a91388b278442958c2cbc3f090412d38f552bb41..52a5df5845f02d3915482c6c9520c8c3f171a3bb 100755 (executable)
@@ -231,7 +231,7 @@ end component;
 --     );\r
 -- end component;\r
 \r
-component sgmii_gbe_pcs34\r
+component sgmii_gbe_pcs35\r
 port( rst_n                  : in      std_logic;\r
          signal_detect          : in   std_logic;\r
          gbe_mode               : in   std_logic;\r
@@ -742,7 +742,7 @@ buf_stat_debug(11 downto 0)  <= sd_rx_debug(11 downto 0);
    \r
 \r
  \r
- SGMII_GBE_PCS : sgmii_gbe_pcs34\r
+ SGMII_GBE_PCS : sgmii_gbe_pcs35\r
  port map(\r
        rst_n                           => GSR_N,\r
        signal_detect                   => signal_detected,\r
@@ -768,7 +768,7 @@ buf_stat_debug(11 downto 0)  <= sd_rx_debug(11 downto 0);
        tx_d                            => FT_TXD_IN, -- TX data from MAC\r
        tx_en                           => FT_TX_EN_IN, -- TX data enable from MAC\r
        tx_er                           => FT_TX_ER_IN, -- TX error from MAC\r
-               rx_clk_125                      => CLK_125_IN, --refclkcore, -- original clock from SerDes\r
+               rx_clk_125                      => sd_rx_clk, --CLK_125_IN, --refclkcore, -- original clock from SerDes\r
        rx_clock_enable_source          => rx_clk_en,\r
        rx_clock_enable_sink            => rx_clk_en,\r
        rx_d                            => pcs_rx_d, -- RX data to MAC\r
index 1895b868675edbdda06791c76561d0bf4d99537e..cec05530126a138a99eb10fba0fa094c057f49e4 100644 (file)
@@ -15,7 +15,7 @@ signal g_MY_IP                : std_logic_vector(31 downto 0);
 signal g_MY_MAC               : std_logic_vector(47 downto 0);
 
 -- size of ethernet frame use for fragmentation of outgoing packets
-signal g_MAX_FRAME_SIZE     : std_logic_vector(15 downto 0) := x"0578";  -- truly set up in main controller
+signal g_MAX_FRAME_SIZE     : std_logic_vector(15 downto 0); -- set up in main controller
 
 constant c_MAX_FRAME_TYPES    : integer range 1 to 16 := 2;
 constant c_MAX_PROTOCOLS      : integer range 1 to 16 := 5;