--- /dev/null
+#read files like my @config = do "CONF_allregisters43.pl";
+#with DACs for Sensor 43
+ #General Control
+ [0x0020, 0x60 ], #RUNMODE -> table 8
+ [0x0021, 0x6E ], #TRIMDAC -> table 9
+ [0x0022, 0x00 ], #INJCURR -> table 10
+ [0x0023, 0x00 ], #INJVOLT1 -> table 11
+ [0x0024, 0x00 ], #INJVOLT2 -> table 12
+ [0x0025, 0x00 ], #MONCURR -> table 13
+ [0x0026, 0x00 ], #MONVOLT -> table 14
+ #[0x0027, 0x01 ], #CLKGEN1 -> table 15
+ [0x0027, 0x03 ], #CLKGEN1 -> table 15, with software start
+ [0x0028, 0x01 ], #CLKGEN2 -> table 16
+ [0x0029, 0x16 ], #PLL -> table 17
+ [0x002a, 0x00 ], #PLLLOCK -> table 18
+ [0x002b, 0x00 ], #MONTEMP -> table 19
+ [0x002c, 0x15 ], #SLVSTX -> table 20
+ [0x002d, 0x00 ], #SLVSRX -> table 21
+ [0x002e, 0x17 ], #OUTPUT -> table 22
+ [0x002f, 0x00 ], #MONPWR -> table 23
+
+ #DACs
+ [0x0040, 0x40 ], #IBIAS 0 - 80 nA , 312 pA Pixel current
+ [0x0041, 0x34 ], #ITHR 0 - 2.5 nA , 9.8 pA Pixel current
+ [0x0042, 0x1c ], #IDB 0 - 40 nA , 157 pA Pixel current
+ [0x0043, 0xab ], #VRESET 0.37 - 1.79 V , 6 mV Pixel input amplifier reset voltage
+ [0x0044, 0x46 ], #VPL 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (low value)
+ [0x0045, 0x55 ], #VPH 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (high
+ [0x0046, 0x00 ], #VPH_FINE 0 - 256 mV , 1 mV value) VPH+VPH_FINE
+ [0x0047, 0x43 ], #VCASP 0 - 1.54 V , 6 mV Pixel voltage
+ [0x0048, 0x00 ], #VCASNA 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix A
+ [0x0049, 0xb1 ], #VCASNB 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix B
+ [0x004a, 0x00 ], #VCASNC 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix C
+ [0x004b, 0x00 ], #VCASND 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix D
+ [0x004c, 0xb1 ], #VCASN2 0 - 1.54 V , 6 mV Pixel voltage
+ [0x004d, 0xbe ], #VCLIP 0 - 1.54 V , 6 mV Pixel clipping amplifier voltage
+ [0x004e, 0x7d ], #IBUFBIAS 0 - 10 μA , 312 pA Internal buffer bias (not in pixel)
+
+ #Sequencer - 0x0100 registers are upper byte of the word
+ [0x0060, ], # PIXLOAD_A 0x00
+ [0x0160, ], # 0x00
+ [0x0070, ], # PIXLOAD_B 0x01
+ [0x0170, ], # 0x00
+ [0x0061, ], # PIXREAD_A 0x00
+ [0x0161, ], # 0x00
+ [0x0071, ], # PIXREAD_B 0x97
+ [0x0171, ], # 0x00
+ [0x0062, ], # PIXRSTB_A 0x98
+ [0x0162, ], # 0x00
+ [0x0072, ], # PIXRSTB_B 0x99
--- /dev/null
+#read files like my @config = do "CONF_allregisters8.pl";
+#For 0xa000 Sensor8
+ #General Control
+ [0x0020, 0x60 ], #RUNMODE -> table 8
+ [0x0021, 0x6E ], #TRIMDAC -> table 9
+ [0x0022, 0x00 ], #INJCURR -> table 10
+ [0x0023, 0x00 ], #INJVOLT1 -> table 11
+ [0x0024, 0x00 ], #INJVOLT2 -> table 12
+ [0x0025, 0x00 ], #MONCURR -> table 13
+ [0x0026, 0x00 ], #MONVOLT -> table 14
+ #[0x0027, 0x01 ], #CLKGEN1 -> table 15
+ [0x0027, 0x03 ], #CLKGEN1 -> table 15, with software start
+ [0x0028, 0x01 ], #CLKGEN2 -> table 16
+ [0x0029, 0x16 ], #PLL -> table 17
+ [0x002a, 0x00 ], #PLLLOCK -> table 18
+ [0x002b, 0x00 ], #MONTEMP -> table 19
+ [0x002c, 0x15 ], #SLVSTX -> table 20
+ [0x002d, 0x00 ], #SLVSRX -> table 21
+ [0x002e, 0x17 ], #OUTPUT -> table 22
+ [0x002f, 0x00 ], #MONPWR -> table 23
+
+ #DACs
+ [0x0040, 0x40 ], #IBIAS 0 - 80 nA , 312 pA Pixel current
+ [0x0041, 0x34 ], #ITHR 0 - 2.5 nA , 9.8 pA Pixel current
+ [0x0042, 0x1c ], #IDB 0 - 40 nA , 157 pA Pixel current
+ [0x0043, 0xab ], #VRESET 0.37 - 1.79 V , 6 mV Pixel input amplifier reset voltage
+ [0x0044, 0x46 ], #VPL 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (low value)
+ [0x0045, 0x55 ], #VPH 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (high
+ [0x0046, 0x00 ], #VPH_FINE 0 - 256 mV , 1 mV value) VPH+VPH_FINE
+ [0x0047, 0x43 ], #VCASP 0 - 1.54 V , 6 mV Pixel voltage
+ [0x0048, 0x78 ], #VCASNA 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix A
+ [0x0049, 0x78 ], #VCASNB 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix B
+ [0x004a, 0x78 ], #VCASNC 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix C
+ [0x004b, 0x60 ], #VCASND 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix D
+ [0x004c, 0x4f ], #VCASN2 0 - 1.54 V , 6 mV Pixel voltage
+ [0x004d, 0x37 ], #VCLIP 0 - 1.54 V , 6 mV Pixel clipping amplifier voltage
+ [0x004e, 0x7D ], #IBUFBIAS 0 - 10 μA , 312 pA Internal buffer bias (not in pixel)
+
+ #Sequencer - 0x0100 registers are upper byte of the word
+ [0x0060, ], # PIXLOAD_A 0x00
+ [0x0160, ], # 0x00
+ [0x0070, ], # PIXLOAD_B 0x01
+ [0x0170, ], # 0x00
+ [0x0061, ], # PIXREAD_A 0x00
+ [0x0161, ], # 0x00
+ [0x0071, ], # PIXREAD_B 0x97
+ [0x0171, ], # 0x00
+ [0x0062, ], # PIXRSTB_A 0x98
+ [0x0162, ], # 0x00
+ [0x0072, ], # PIXRSTB_B 0x99
--- /dev/null
+#read files like my @config = do "CONF_allregisters.pl";
+
+ #General Control
+ [0x0020, 0x60 ], #RUNMODE -> table 8
+ [0x0021, 0x6E ], #TRIMDAC -> table 9
+ [0x0022, 0x00 ], #INJCURR -> table 10
+ [0x0023, 0x00 ], #INJVOLT1 -> table 11
+ [0x0024, 0x00 ], #INJVOLT2 -> table 12
+ [0x0025, 0x00 ], #MONCURR -> table 13
+ [0x0026, 0x00 ], #MONVOLT -> table 14
+ [0x0027, 0x00 ], #CLKGEN1 -> table 15
+ #[0x0027, 0x01 ], #CLKGEN1 -> table 15
+ #[0x0027, 0x03 ], #CLKGEN1 -> table 15, with software start
+ [0x0028, 0x01 ], #CLKGEN2 -> table 16
+ [0x0029, 0x17 ], #PLL -> table 17
+ [0x002a, 0x00 ], #PLLLOCK -> table 18
+ [0x002b, 0x00 ], #MONTEMP -> table 19
+ [0x002c, 0x15 ], #SLVSTX -> table 20
+ [0x002d, 0x00 ], #SLVSRX -> table 21
+ [0x002e, 0x17 ], #OUTPUT -> table 22
+ [0x002f, 0x00 ], #MONPWR -> table 23
+
+ #DACs
+ [0x0040, 0x40 ], #IBIAS 0 - 80 nA , 312 pA Pixel current
+ [0x0041, 0x34 ], #ITHR 0 - 2.5 nA , 9.8 pA Pixel current
+ [0x0042, 0x1c ], #IDB 0 - 40 nA , 157 pA Pixel current
+ [0x0043, 0xab ], #VRESET 0.37 - 1.79 V , 6 mV Pixel input amplifier reset voltage
+ [0x0044, 0x46 ], #VPL 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (low value)
+ [0x0045, 0x55 ], #VPH 0.37 - 1.79 V , 6 mV Pixel voltage for charge injection (high
+ [0x0046, 0x00 ], #VPH_FINE 0 - 256 mV , 1 mV value) VPH+VPH_FINE
+ [0x0047, 0x43 ], #VCASP 0 - 1.54 V , 6 mV Pixel voltage
+ [0x0048, 0x78 ], #VCASNA 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix A
+ [0x0049, 0x78 ], #VCASNB 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix B
+ [0x004a, 0x78 ], #VCASNC 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix C
+ [0x004b, 0x60 ], #VCASND 0 - 1.54 V , 6 mV Pixel threshold voltage for submatrix D
+ [0x004c, 0x3c ], #VCASN2 0 - 1.54 V , 6 mV Pixel voltage
+ [0x004d, 0x37 ], #VCLIP 0 - 1.54 V , 6 mV Pixel clipping amplifier voltage
+ [0x004e, 0x7d ], #IBUFBIAS 0 - 10 μA , 312 pA Internal buffer bias (not in pixel)
+
+ #Sequencer - 0x0100 registers are upper byte of the word
+ [0x0060, ], # PIXLOAD_A 0x00
+ [0x0160, ], # 0x00
+ [0x0070, ], # PIXLOAD_B 0x01
+ [0x0170, ], # 0x00
+ [0x0061, ], # PIXREAD_A 0x00
+ [0x0161, ], # 0x00
+ [0x0071, ], # PIXREAD_B 0x97
+ [0x0171, ], # 0x00
+ [0x0062, ], # PIXRSTB_A 0x98
+ [0x0162, ], # 0x00
+ [0x0072, ], # PIXRSTB_B 0x99
+ [0x0172, ], # 0x00
+ [0x0063, ], # DPSTART_A 0x00
+ [0x0163, ], # 0x00
+ [0x0073, ], # DPSTART_B 0x01
+ [0x0173, ], # 0x00
+ [0x0064, ], # DPTOKEN_A 0x01
+ [0x0164, ], # 0x00
+ [0x0074, ], # DPTOKEN_B 0x02
+ [0x0174, ], # 0x00
+ [0x0065, ], # DPEND_A 0x98
+ [0x0165, ], # 0x00
+ [0x0075, ], # DPEND_B 0x99
+ [0x0175, ], # 0x00
+ [0x0066, ], # PIXPULSEA_A 0x00
+ [0x0166, ], # 0x00
+ [0x0076, ], # PIXPULSEA_B 0x00
+ [0x0176, ], # 0x00
+ [0x0067, ], # PIXPULSED_A 0x00
+ [0x0167, ], # 0x00
+ [0x0077, ], # PIXPULSED_B 0x00
+ [0x0177, ], # 0x00
+ [0x0068, ], # MKSEQ1_A 0x00
+ [0x0168, ], # 0x00
+ [0x0078, ], # MKSEQ1_B 0x02
+ [0x0178, ], # 0x00
+ [0x0069, ], # MKSEQ2_A 0x00
+ [0x0169, ], # 0x00
+ [0x0079, ], # MKSEQ2_B 0x02
+ [0x0179, ], # 0x00
+ [0x007A, ], # POLARITY 0x05
+ [0x017A, ], # 0x00
+ [0x007B, ], # FRAMELENGTH 100
+ [0x017B, ], # 0x00
+ [0x007C, ], # MAXFRAME 0x00
+ [0x017C, ], # 0x00
+ [0x007D, ], # MODPULSE 0x00
+ [0x007E, ], # MODPIXRSTB 0x00
+ [0x007F, ], # MODMKSEQ1 0x00
+
+ #Monitoring (read only)
+ [0x00E0, ], # MON_POR_LOCK Power On Rest and PLL lock
+ [0x00E1, ], # MON_PAD PADs
+ [0x00E2, ], # MON_FR_CPT_0 Frame counter bits 7-0
+ [0x00E3, ], # MON_FR_CPT_1 Frame counter bits 15-8
+ [0x00E4, ], # MON_FR_CPT_2 Frame counter bits 23-16
+ [0x00E5, ], # MON_FR_CPT_3 Frame counter bits 31-24
+ [0x00E6, ], # EV_TMR_SEQ Triple Modular Redundancy Error in sequencer
+ [0x00E7, ], # EV_LOCK PLL lock
+ [0x00E8, ], # EV_LOCKFILTER PLL lock after filtering
+ [0x00E9, ], # EV_POR1 Power On Reset 1
+ [0x00EA, ], # EV_POR2 Power On Reset 2
+ [0x00EB, ], # EV_POR3 Power On Reset 3
+ [0x00EC, ], # EV_RSTB RSTB pad
+ [0x00ED, ], # EV_START START all types (auto, pad, and soft)
+ [0x00EE, ], # EV_DPSTART Digital Periphery Start
+
+ #Analog pixel selection
+ [0x8020, ], # SEL_ANAPIX0 Analogue Pixel Selection LSB
+ [0x8021, ], # SEL_ANAPIX1 Analogue Pixel Selection MSB
+
+ #Readout test configuration
+ [0x8040, 0xaa ], # PATTERN0
+ [0x8041, 0xfc ], # PATTERN1
+ [0x8042, 0xaa ], # PATTERN2
+ [0x8043, 0xfc ], # PATTERN3
+ [0x8044, 0xaa ], # PATTERN4
+ [0x8045, 0xfc ], # PATTERN5
+ [0x8046, 0xaa ], # PATTERN6
+ [0x8047, 0xfc ], # PATTERN7
+ [0x8048, 0xaa ], # PATTERN8
+ [0x8049, 0xfc ], # PATTERN9
+ [0x804A, 0xaa ], # PATTERN10
+ [0x804B, 0xfc ], # PATTERN11
+ [0x804C, 0xaa ], # PATTERN12
+ [0x804D, 0xfc ], # PATTERN13
+ [0x804E, 0xaa ], # PATTERN14
+ [0x804F, 0xfc ], # PATTERN15
+ [0x8050, ], # BANDWIDTH0
+ [0x8051, ], # BANDWIDTH1
+ [0x8052, 0x00 ], # FILLLEVEL0 #custom level at 1536
+ [0x8053, 0x06 ], # FILLLEVEL1
+
+ #Pixel control registers TBD
+
+ #Multi frame emulation memories TBD
jspc29 / mimosis_chain.git / commitdiff