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diff --git a/lvl1trigger.tex b/lvl1trigger.tex
index ca9ea479e7d6a1543c9f2b4f9e49f5cef8b47de4..6de688a62da74e1438eb7fc7ffa4167aa1613486 100755 (executable)
--- a/lvl1trigger.tex
+++ b/lvl1trigger.tex
@@ -105,14 +105,18 @@ The CTS will include features to set these bits via slow control either to a sta
 
 \begin{table}
 \begin{center}
-\begin{tabularx}{\textwidth}{c|c|C}
+\begin{tabularx}{\textwidth}{|c|c|C|}
+\hline
 \textbf{Bits} & \textbf{Name} & \textbf{Description} \\
+\hline\hline
 0 & Suppress Output & Run a normal trigger as requested but suppress writing all data to the IPU channel. Small status words or debug output are acceptable. \\
 1 - 6 & t.b.d. & Not yet defined \\
 7 & no timing trigger & Marks a LVL1 trigger which was not preceded by a timing trigger (e.g. calibration) \\
 8 - 10 & RICH & RICH data configuration bits \\
 11 - 13 & Shower & 11: update pedestals, 12: calibrate even (0) or odd (1) channels, 13: tbd\\
-14 - 23 & t.b.d. & Not yet defined \\
+14 - 16 & MDC & 14: data format select (0: debug, 1: compressed (2 hits in 1 word))\\
+17 - 23 & t.b.d. & Not yet defined \\
+\hline
 \end{tabularx}
 \caption{Trigger Information Bits.}
 \label{LVL1TrgInformation}