constant buffer_half_threshold : integer := 2** (DATA_BUFFER_DEPTH-1);
constant buffer_end_threshold : integer := 2**DATA_BUFFER_DEPTH - 2*(2**DATA_BUFFER_DEPTH-DATA_BUFFER_FULL_THRESH);
+ --double set threshold to set flag in error pattern and register
constant data_width : integer := DATA_BUFFER_WIDTH + 4;
type buffer_state_t is (IDLE, BUSY, WAITING);
type lvl1_state_t is (IDLE, WAIT_BUSY, BUSY_RELEASE);
next_error_pattern(18) <= LVL1_ERROR_PATTERN_IN(18) or mult_trg_found; -- multiple timing triggers
next_error_pattern(17) <= LVL1_ERROR_PATTERN_IN(17) or invalid_trg; -- timing trigger missing
-next_error_pattern(16) <= LVL1_ERROR_PATTERN_IN(16) or (not trg_num_match); -- trigger counter mismatch
+next_error_pattern(16) <= LVL1_ERROR_PATTERN_IN(16) or (not next_trg_num_match); -- trigger counter mismatch
next_error_pattern(15 downto 0) <= LVL1_ERROR_PATTERN_IN(15 downto 0);
---------------------------------------------------------------------------